0009-Part-9.-Enable-bootstrap-GCC-with-CET-flags

Part#9. Enable bootstrap GCC with CET flags. 0009-Part-9.-Enable-bootstrap-GCC-with-CET-flags.patch Description: 0009-Part-9.-Enable-bootstrap-GCC-with-CET-flags.patch

0008-Part-8.-Add-Intel-CET-support-for-EH-in-libgcc

Part#8. Add Intel CET support for EH in libgcc. Control-flow Enforcement Technology (CET), published by Intel, introduces the Shadow Stack feature, which ensures a return from a function is done to exactly the same location from where the function was called. When EH is present the control-flow

0004-Part-4.-Update-x86-backend-to-enable-Intel-CET

Part#4. Update x86 backend to enable Intel CET. All platforms except i386 will report the error and do no instrumentation with -finstrument-control-flow option. i386 will provide the implementation based on a specification published by Intel for a new technology called Control-flow Enforcement

Re: [PING #2] [PATCH] enhance -Wrestrict to handle string built-ins (PR 78918)

On Tue, Aug 1, 2017 at 4:27 AM, Martin Sebor wrote: > Richard, > > in discussing this work Jeff mentioned that your comments on > the tree-ssa-alias.c parts would be helpful. When you have > a chance could you please give it a once over and let me know > if you have any

Re: [PATCH] Fix when -lssp is added by driver (PR middle-end/81400).

On 07/31/2017 09:21 AM, Martin Liška wrote: On 07/26/2017 07:45 PM, Jeff Law wrote: On 07/12/2017 07:38 AM, Martin Liška wrote: Hi. Following patch adds -lspp when one uses -mstack-protector-guard=global. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be

Re: [PATCH] Fix reassoc var_bound range test optimization (PR tree-optimization/81588)

On Mon, 31 Jul 2017, Jakub Jelinek wrote: > Hi! > > This patch fixes a couple of issues in optimize_range_tests_var_bound. > One is that if we have ranges[i].in_p, we should be inverting the comparison > rather than just swapping or not swapping operands. Then because > we want to handle only

Re: [PATCH] Switch vec_init and vec_extract optabs to 2 mode optab to allow extraction of vector from vector or initialization of vector from smaller vectors (PR target/80846)

On 25/07/17 10:14, Jakub Jelinek wrote: > Hi! > > The following patch adjusts the vec_init and vec_extract optabs, so that > they don't have in the expander names just the vector mode, but also another > mode, for vec_extract the mode of the result and for vec_init the mode of > the elts of the

0001-Part-1.-Add-generic-part-for-Intel-CET-enabling

Part#1. Add generic part for Intel CET enabling. The spec is available at https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf High-level design. -- A proposal is to introduce a target independent flag

0002-Part-2.-Document-finstrument-control-flow-and-notrack attribute

Part#2. Document -finstrument-control-flow and notrack attribute. 0002-Part-2.-Document-finstrument-control-flow-and-notrac.patch Description: 0002-Part-2.-Document-finstrument-control-flow-and-notrac.patch

0003-Part-3.-Add-tests-for-finstrument-control-flow-and-notrack attribute

Part#3. Add tests for -finstrument-control-flow and notrack attribute. 0003-Part-3.-Add-tests-for-finstrument-control-flow-and-n.patch Description: 0003-Part-3.-Add-tests-for-finstrument-control-flow-and-n.patch

Re: [PATCH][AArch64] Remove '*' from movsi/di/ti patterns

ping From: Wilco Dijkstra Sent: 26 July 2017 14:46 To: GCC Patches; James Greenhalgh Cc: nd Subject: [PATCH][AArch64] Remove '*' from movsi/di/ti patterns   Remove the remaining uses of '*' from the movsi/di/ti patterns. Using '*' in alternatives is typically incorrect at it tells the

Patch ping : Aarch64/ARM

Hi! I'd like to ping the aarch64/arm parts of the http://gcc.gnu.org/ml/gcc-patches/2017-07/msg01511.html vec_init/vec_extract patch. The generic part of the patch has been approved by Richard, and the other config/*/ parts have either been approved by their respective maintainers, or I'm going

Re: [PATCH][AArch64] Simplify frame layout for stack probing

ping From: Wilco Dijkstra Sent: 25 July 2017 14:58 To: GCC Patches; James Greenhalgh; Jeff Law Cc: nd Subject: [PATCH][AArch64] Simplify frame layout for stack probing   This patch makes some changes to the frame layout in order to simplify stack probing.  We want to use the save of LR as a

Re: [RFC][PATCH][AArch64] Cleanup frame pointer usage

       ping     Wilco Dijkstra wrote: > James Greenhalgh wrote: > > > I note this is still marked as an RFC, are you now proposing it as a > > patch to be merged to trunk? > > Absolutely. It was marked as an RFC to get some comments - I thought it > may be controversial to separate the frame

Re: [PATCH v3][AArch64] Fix symbol offset limit

      ping From: Wilco Dijkstra Sent: 17 January 2017 15:14 To: Richard Earnshaw; GCC Patches; James Greenhalgh Cc: nd Subject: Re: [PATCH v3][AArch64] Fix symbol offset limit     Here is v3 of the patch - tree_fits_uhwi_p was necessary to ensure the size of a declaration is an integer. So

Re: [PATCH][AArch64] Improve aarch64_legitimate_constant_p

    ping     This patch further improves aarch64_legitimate_constant_p.  Allow all integer, floating point and vector constants.  Allow label references and non-anchor symbols with an immediate offset.  This allows such constants to be rematerialized, resulting in smaller code and fewer stack

Re: [Patch] Testsuite fixes for failures caused by patch for PR 80925 (part deux)

On Tue, Aug 1, 2017 at 2:00 AM, Steve Ellcey wrote: > Here is a second set of patches to fix tests that started failing > with the patch for PR 80925. It uses the same testsuite changes > I did for no-section-anchors-vect-69.c and section-anchors-vect-69.c > on new set of

Re: [PATCH][GCC] Simplification of 1U << (31 - x)

Sorry about the delayed response but looking at the above discussion, should I conclude that this is a valid tree simplification? I am pasting the diff of the assembly that AArch64 generates with the test case that I added. I see fewer instructions generated with the patch. --- pr80131-1.s 

[PATCH, rs6000] altivec_resolve_overloaded_builtin fixes (PR target/81622)

Hi! On Mon, Jul 31, 2017 at 02:42:21PM -0500, Bill Schmidt wrote: > > On Jul 31, 2017, at 11:27 AM, Jakub Jelinek wrote: > > On Mon, Jul 31, 2017 at 11:19:26AM -0500, Bill Schmidt wrote: > >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81622 reports an > >> ICE-on-invalid >

Re: Patch ping : Aarch64/ARM

On Tue, Aug 01, 2017 at 09:06:38AM +0200, Jakub Jelinek wrote: > Hi! > > I'd like to ping the aarch64/arm parts of the > http://gcc.gnu.org/ml/gcc-patches/2017-07/msg01511.html > vec_init/vec_extract patch. The generic part of the patch > has been approved by Richard, and the other config/*/

Re: [PATCH PR81267]Rewrite into loop closed ssa form in case of any store-store chain

On Mon, Jul 31, 2017 at 4:14 PM, Bin Cheng wrote: > Hi, > This simple patch fixes the ICE by rewriting into loop closed ssa form in case > of any store-store chain. We maybe able to avoid that for some cases that > eliminated stores only store loop invariant values, but only

Re: [PATCH gfortran] PR53542 USE-associated variables shows original instead of renamed symbol name

Committed as revision r250762. Dominique

Re: [PING #2] [PATCH] enhance -Wrestrict to handle string built-ins (PR 78918)

On Tue, Aug 1, 2017 at 11:23 AM, Richard Biener wrote: > On Tue, Aug 1, 2017 at 4:27 AM, Martin Sebor wrote: >> Richard, >> >> in discussing this work Jeff mentioned that your comments on >> the tree-ssa-alias.c parts would be helpful. When you have

RE: [PATCH][Aarch64] Add support for overflow add and sub operations

Updated the patch per Richard's comments in particular the issues relating to use of NE: " Use of ne is wrong here. The condition register should be set to the result of a compare rtl construct. The same applies elsewhere within this patch. NE is then used on the result of the comparison.

Re: [PATCH 0/13] D: Submission of D Front End

On 13 July 2017 at 10:46, Iain Buclaw wrote: > On 24 June 2017 at 19:23, Iain Buclaw wrote: >> Hi, >> >> Just doing an update of the patch series, rebased against trunk, and >> applied changes as requested by every comment so far. >> >> Notes on

Re: [PATCH][GCC][AArch64] optimize float immediate moves (3 /4) - testsuite.

On Mon, Jun 26, 2017 at 11:49 AM, Tamar Christina wrote: > Hi, > > With the changes in the patches the testsuite had a minor update in the > assembler scan. > I've posted the patch but will assume it's OK based on the previous OK for > trunk and > the fact that this can

Re: [Patch (preapproved)] Guard Copy Header pass on flag_tree_loop_vectorize

On Thu, Jul 27, 2017 at 03:21:01PM +0100, James Greenhalgh wrote: > On Thu, Jul 27, 2017 at 02:26:03PM +0200, Richard Biener wrote: > > On Thu, Jul 27, 2017 at 2:08 PM, Jakub Jelinek wrote: > > > On Thu, Jul 27, 2017 at 01:54:21PM +0200, Richard Biener wrote: > > >> ---

Re: [PATCH][AArch64] Improve addressing of TI/TFmode

ping From: Wilco Dijkstra Sent: 20 July 2017 13:49 To: GCC Patches; James Greenhalgh Cc: nd Subject: [PATCH][AArch64] Improve addressing of TI/TFmode   In https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong pointed out some addressing inefficiencies due to a recent change in

[GCC][AArch64][PATHC] Only allow 0s unconditionally for floating point values.

Hi All, Previously I allowed 0s unconditionally through aarch64_can_const_movi_rtx_p because we should always be able to use movi with 0 regardless of the mode. However this was causing issues when a vector contained a 0 element and another value which was too complex for a movi. In theory this

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt wrote: > >> On Jul 31, 2017, at 8:19 AM, Bill Schmidt >> wrote: >> >> That would certainly be much simpler! I'll regstrap it and test it on the >> other >> occurrence I've found to be

Re: [PATCH GCC]Make pointer overflow always undefined and remove the macro

On Tue, Jul 25, 2017 at 8:26 AM, Richard Biener wrote: > On Mon, Jul 24, 2017 at 10:43 AM, Bin Cheng wrote: >> Hi, >> This is a followup patch to PR81388's fix. According to Richi, >> POINTER_TYPE_OVERFLOW_UNDEFINED was added in -fstrict-overflow

[PATCH] PRE TLC, improve fake exit edge placement

When working on PR81181 I ran into some things I wanted to clean up several times. First a few PRE cleanups done for the fix. Second, the fake exit edges we add for infinite loops happen to start from loop headers rather than latches which is somewhat confusing and making PRE dataflow order

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

I'm wondering if the messages could use a slight rewording, to give a clue to the user about the reason *why* the expression has changed signedness. The old message "signed and unsigned type in conditional expression" gave the clue (but failed to underline the subexpression changing sign, and

Re: [PATCH] Fix thread_prologue_and_epilogue_insns (PR middle-end/79499)

On August 1, 2017 10:35:43 PM GMT+02:00, Jakub Jelinek wrote: >Hi! > >In this function we insert 0-2 prologue sequences (which can sometimes >contain jumps and other insns that need to end basic blocks) on edges, >then commit edge insertions and then finally attempts to find out

Re: [PATCH][2/2] early LTO debug, main part

On 05/19/2017 06:42 AM, Richard Biener wrote: + /* ??? In some cases the C++ FE (at least) fails to +set DECL_CONTEXT properly. Simply globalize stuff +in this case. For example +__dso_handle created via iostream line 74 col 25. */ + parent = comp_unit_die ();

Re: [PATCH 0/3 v2] C/C++: show pertinent open token when missing a close token

On Tue, Aug 01, 2017 at 04:21:41PM -0400, David Malcolm wrote: > On Wed, 2017-07-12 at 09:13 -0400, Trevor Saunders wrote: > > On Tue, Jul 11, 2017 at 11:24:45AM -0400, David Malcolm wrote: > > > + public: > > > + /* token_pair's ctor. */ > > > + token_pair () : m_open_loc (UNKNOWN_LOCATION) {}

Re: [PATCH 1/2] add unique_ptr header

On Tue, Aug 01, 2017 at 10:40:53AM -0400, David Malcolm wrote: > On Mon, 2017-07-31 at 19:46 -0400, tbsaunde+...@tbsaunde.org wrote: > > From: Trevor Saunders > > > > For most of the history of this see > > https://sourceware.org/ml/gdb-patches/2016-10/msg00223.html >

Re: [PATCH] Switch vec_init and vec_extract optabs to 2 mode optab to allow extraction of vector from vector or initialization of vector from smaller vectors (PR target/80846)

On Tue, Aug 01, 2017 at 06:21:34PM +0200, Jakub Jelinek wrote: > Apparently I broke power bootstrap with this, because two new spots were > introduced after I wrote the patch and my cross-compiler which didn't have > HAVE_AS_POWER9 defined didn't reveal that. Fixed thusly, committed as > obvious

[PATCH] minor readability tweaks to print_node

This is a small readability tweak to the tree printer to have it consistently use dashes and colons in tree attribute names in favor of spaces. It's been tested on x86_64-linux. The tree printer tends to avoid using spaces to separate tree attribute names (not the __attribute__ kind but things

[PATCH 2/3] Matching tokens: C parts (v2)

Changed in v2: * Renamed template argument to traits_t; eliminated subclasses, just using traits struct. * Moved enum constants into struct bodies (string constants can't be without constexpr, which isn't available in C++98). * Fixed typo. OK for trunk? gcc/c/ChangeLog: * c-parser.c

[PATCH 1/3] matching tokens: c-family parts

(Unchanged since v1; already approved by Marek, assuming rest is approved) gcc/c-family/ChangeLog: * c-common.c (c_parse_error): Add rich_location * param, using it rather implicitly using input_location. * c-common.h (c_parse_error): Add rich_location * param.

[PATCH 0/3 v2] C/C++: show pertinent open token when missing a close token

On Wed, 2017-07-12 at 09:13 -0400, Trevor Saunders wrote: > On Tue, Jul 11, 2017 at 11:24:45AM -0400, David Malcolm wrote: > > +/* Some tokens naturally come in pairs e.g.'(' and ')'. > > + This class is for tracking such a matching pair of symbols. > > + In particular, it tracks the location

[PATCH] 386: Disallow naked attribute with interrupt attribute

OK for trunk? H.J. --- gcc/ PR target/81654 * config/i386/i386.c (ix86_set_func_type): Disallow naked attribute with interrupt attribute. gcc/testsuite/ PR target/81654 * gcc.target/i386/pr81654.c: New test. --- gcc/config/i386/i386.c |

[PATCH] Fix thread_prologue_and_epilogue_insns (PR middle-end/79499)

Hi! In this function we insert 0-2 prologue sequences (which can sometimes contain jumps and other insns that need to end basic blocks) on edges, then commit edge insertions and then finally attempts to find out into which basic blocks the sequences were inserted and calls

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

On Thu, Jul 20, 2017 at 08:59:29AM +0200, Martin Liška wrote: > Hello. > > Following patch does sharing of expansion for mem{p,}cpy and also strpcy > (with a known constant as source) > so that we use same type of expansion (direct insns emission, direct emission > with a loop instruction and >

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak wrote: > On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu wrote: >> Add some tests for implementing interrupt handlers with naked attribute. >> >> OK for trunk? >> >> H.J. >> --- >> * gcc.dg/guality/pr25967-1.c:

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

On Mon, 2017-07-31 at 18:05 +0200, Marek Polacek wrote: > On Mon, Jul 31, 2017 at 09:54:03AM -0600, Martin Sebor wrote: > > On 07/31/2017 08:14 AM, Marek Polacek wrote: > > > This patch improves the diagnostic of -Wsign-compare for ?: by > > > also printing > > > the types, similarly to my recent

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu wrote: > On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak wrote: >> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu wrote: >>> Add some tests for implementing interrupt handlers with naked attribute. >>>

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 2:25 PM, Uros Bizjak wrote: > On Tue, Aug 1, 2017 at 11:23 PM, H.J. Lu wrote: >> On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak wrote: >>> On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu wrote: On

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 11:23 PM, H.J. Lu wrote: > On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak wrote: >> On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu wrote: >>> On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak wrote: On

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 11:35 PM, H.J. Lu wrote: > On Tue, Aug 1, 2017 at 2:25 PM, Uros Bizjak wrote: >> On Tue, Aug 1, 2017 at 11:23 PM, H.J. Lu wrote: >>> On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak wrote: On

[PATCH] i386: Add some naked attribute tests

Add some tests for implementing interrupt handlers with naked attribute. OK for trunk? H.J. --- * gcc.dg/guality/pr25967-1.c: New test. * gcc.dg/guality/pr25967-2.c: Likewise. * gcc.dg/torture/pr25967-1.c: Likewise. * gcc.dg/torture/pr25967-2.c: Likewise. ---

Re: [PATCH] 386: Disallow naked attribute with interrupt attribute

On Tue, Aug 1, 2017 at 10:20 PM, H.J. Lu wrote: > OK for trunk? > > H.J. > --- > gcc/ > > PR target/81654 > * config/i386/i386.c (ix86_set_func_type): Disallow naked > attribute with interrupt attribute. > > gcc/testsuite/ > > PR target/81654

Restore proper operation of -fdump-ada-spec in C++

It was broken by the recent removal of TYPE_METHODS. Bootstrapped/regtested on x86_64-suse-linux, applied on the mainline. 2017-08-01 Eric Botcazou c-family/ * c-ada-spec.c (has_static_fields): Look only into fields. (dump_generic_ada_node): Small

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

On Tue, Aug 1, 2017 at 12:50 PM, Jakub Jelinek wrote: > On Thu, Jul 20, 2017 at 08:59:29AM +0200, Martin Liška wrote: >> Hello. >> >> Following patch does sharing of expansion for mem{p,}cpy and also strpcy >> (with a known constant as source) >> so that we use same type of

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 2:11 PM, Uros Bizjak wrote: > On Tue, Aug 1, 2017 at 11:05 PM, H.J. Lu wrote: >> On Tue, Aug 1, 2017 at 1:49 PM, Uros Bizjak wrote: >>> On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu wrote:

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

On Tue, 2017-08-01 at 16:15 +0200, Marek Polacek wrote: > On Mon, Jul 31, 2017 at 11:31:44AM -0400, David Malcolm wrote: > > On Mon, 2017-07-31 at 16:14 +0200, Marek Polacek wrote: > > > This patch improves the diagnostic of -Wsign-compare for ?: by > > > also > > > printing > > > the types,

Add support for const-qualified variables to -fdump-ada-spec

Plus a couple of minor tweaks left and right. Bootstrapped/regtested on x86_64-suse-linux, applied on the mainline. 2017-08-01 Eric Botcazou c-family/ * c-ada-spec.c (print_generic_ada_decl):Pass correctly-typed constant

Re: [PATCH] i386: Add some naked attribute tests

On Tue, Aug 1, 2017 at 9:46 PM, H.J. Lu wrote: > Add some tests for implementing interrupt handlers with naked attribute. > > OK for trunk? > > H.J. > --- > * gcc.dg/guality/pr25967-1.c: New test. > * gcc.dg/guality/pr25967-2.c: Likewise. > *

[PATCH 3/3] matching tokens: C++ parts (v2)

Changed in v2: * Renamed template argument to traits_t; eliminated subclasses, just using traits struct. * Moved constants into struct bodies. * Fixed typo. OK for trunk? gcc/cp/ChangeLog: * parser.c (cp_parser_error): Update for new param to c_parse_error. (class

[GCC]][AArch64][PATCH] Fix big endian float immediate moves.

Hi All, real_to_target seems to return the order of the elements in the array differently depending on the endiannes. This undoes the endianness when combining the values back to a HOST_WIDE_INT. Regtested on aach64-none-linux-gnu and aarch64_be-none-linux-gnu and no issues. Thanks, Tamar

Re: [PATCH] libstdc++: Support std::is_aggregate on clang++ (was [cfe-dev] clang++: std::is_aggregate unusable with clang-5.0/libstdc++-7)

On Mon, Jul 31, 2017 at 03:53:42PM +0100, Jonathan Wakely wrote: > This __has_bultin check only exists for Clang, so should be replaced > by the correct __is_identifier check, not left there in addition to > it. I see. Actually I've guessed so, and thank you for clarifying it. I'm attaching a

Re: [patch, fortran] Generate C prototypes from Fortran code

Hello world, here is a slight update on the patch, with the following changes: Fixed one ICE (yes, there was one) Added a bit to the documentation to recommend to edit function pointers Translates c_size_t into ssize_t now - we only have a signed type, unsigned makes little sense. OK for

Re: [PATCH 00/19] cleanup of memory stats prototypes

On Tue, Aug 1, 2017 at 2:11 AM, Martin Sebor wrote: > On 07/31/2017 05:11 PM, Trevor Saunders wrote: >> >> On Mon, Jul 31, 2017 at 04:58:15PM -0600, Martin Sebor wrote: >>> >>> On 07/31/2017 03:34 PM, Trevor Saunders wrote: On Mon, Jul 31, 2017 at 02:56:40PM -0600,

Re: [PATCH 1/2] add unique_ptr header

On Mon, 2017-07-31 at 19:46 -0400, tbsaunde+...@tbsaunde.org wrote: > From: Trevor Saunders > > For most of the history of this see > https://sourceware.org/ml/gdb-patches/2016-10/msg00223.html > The changes are mostly s/gdb/gtl/g > > include/ChangeLog: > >

*ping* [patch, fortran] Fix PR 79312, find invalid typespec for empty array constructors

Am 24.07.2017 um 23:27 schrieb Thomas Koenig: Hello world, the attached patch fixes the PR; patch and test case are rather self-explanatory. Regression-testing as I write this. OK for trunk if it passes? Regards Thomas OK? Regards Thomas

Re: [PATCH, Fortran] Correctly set -fd-lines-as-comments with -fdec

Hi Fritz, This is a simple patch. The original intent was for -fdec to set -fd-lines-as-comments by default if flag_d_lines was unspecified by the user. However, currently flag_d_lines is interrogated in set_dec_flags(), usually before its final value is determined. The attached patch fixes

Re: [PATCH, Fortran] Support for legacy %FILL fields in STRUCTUREs

Hi Fritz, Regtests on x86_64-redhat-linux. OK for trunk? Patch looks good in principle; I really find all these DEC extensions strange, but if they are needed for old code, why not? Just one point: + gfc_error ("%s not allowed outside STRUCTURE at %C", "%FILL"); This should

Improved support for arm-vxworks and arm-vxworks7

Hello, As mentioned in the thread rooted at https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00720.html, the arm-vxworks port needs refreshing. As mentioned earlier in other vxworks related threads, it was on my list of things to do and this patch implements a first batch of changes to this effect.

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

On Tue, Aug 1, 2017 at 3:50 PM, Bill Schmidt wrote: > On Aug 1, 2017, at 7:44 AM, Bill Schmidt wrote: >> >>> >>> On Aug 1, 2017, at 3:46 AM, Richard Biener >>> wrote: >>> >>> On Mon, Jul 31, 2017 at 4:03 PM,

Re: C PATCH to further improve diagnostic for -Wsign-compare (PR c/81417)

On Mon, Jul 31, 2017 at 11:31:44AM -0400, David Malcolm wrote: > On Mon, 2017-07-31 at 16:14 +0200, Marek Polacek wrote: > > This patch improves the diagnostic of -Wsign-compare for ?: by also > > printing > > the types, similarly to my recent patch. But we can do even better > > here if we > >

Re: [PATCH] Add libgcc support for cache clearing on ARM VxWorks

> On Aug 1, 2017, at 16:31 , Olivier Hainque wrote: > > This patch adds a variant implementation of _clear_cache > for arm-vxworks*, needed for proper functioning of trampolines > on targets with separate instruction/data caches. Forgot to mention: Tested by verifying

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote: > I don't see an easy way to correctly differentiate between "attribute" > nops and "bundle" nops, so XFAILing these tests on ia64 seems like a > valid approach. Make sense, given that the use of Itanium has gone done drastically. Gerald

[PATCH] Fix PR81633

I am testing the following pair of patches (first for trunk, 2nd for GCC 7 branch) to fix PR81633. On trunk recent refactoring made the PR71752 change obsolete, on the branch the patch installs the simpler originally suggested patch which works within the constraints vect_get_slp_defs is used

RE: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

> > Given review comment already pointed out big-endian issue and patch was > updated to address it, I would expect reg-test on a big-endian target before > applying patch, right? The patch spent 6 months in external review. Given that, I simply forgot to rerun big endian before the commit as I

Re: PATCH for Re: mirrors

On Sat, 15 Apr 2017, Gerald Pfeifer wrote: > On Sat, 8 Apr 2017, Ionut Vatavu wrote: >> I would like to announce a new mirror in Germany Gunzenhausen: >> >> http://www.bothelp.net/mirrors/gcc - updated daily by rsync > This is now part of our mirrors list per the patch below. And here is an

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

> On Aug 1, 2017, at 1:52 PM, Andreas Schwab wrote: > > On Aug 01 2017, Gerald Pfeifer wrote: > >> On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote: >>> I don't see an easy way to correctly differentiate between "attribute" >>> nops and "bundle" nops, so XFAILing

[PATCH] Add optab checks to vector extraction path in vectorizable_store

The following adds optab checks to see whether the target prefers vector from vector extracts or integer from punned integer vector extracts. But instead of falling back to elementwise operation we fall back to the vector from vector extract path as spilling the vector to extract from and then

[PATCH] Fix PR81181

The following fixes another case of endless compute_antic iteration in PRE. After a lengthy four-eyes discussion here we concluded that the way clean () operates on expressions rather than values can cause oscillation in the dataflow problem. Thus we have to delay it (at the cost of some

Re: [PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

On Fri, Jul 28, 2017 at 3:15 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford >> wrote: >>> Bin Cheng writes: Hi, This simple

Re: [PATCH] Fix segfault in gcov.c (PR gcov-profile/81561).

On Tue, Aug 1, 2017 at 2:02 PM, Martin Liška wrote: > On 07/27/2017 01:48 PM, Richard Biener wrote: >> >> On Thu, Jul 27, 2017 at 12:12 PM, Martin Liška wrote: >>> >>> Hello. >>> >>> As reported in mentioned PR, we segfault in gcov tool when one uses -a. >>> It's

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

On Aug 1, 2017, at 7:44 AM, Bill Schmidt wrote: > >> >> On Aug 1, 2017, at 3:46 AM, Richard Biener >> wrote: >> >> On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt >> wrote: >>> On Jul 31, 2017, at 8:19

Simplify nvptx/slp* test-cases

Hi, this patch simplifies the nvtpx/slp* test-cases by using signed loop iteration variables, in order to work around PR81635. Committed. Thanks, - Tom Simplify nvptx/slp* test-cases Use signed loop iteration variable in nvtpx/slp* test-cases to work around PR tree-optimizaion/81635.

[PATCH] Add libgcc support for cache clearing on ARM VxWorks

Hello, On top of previous changes reworking the arm-vxworks support https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00085.html https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00075.html https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00078.html This patch adds a variant implementation of

ARM Patch Ping

Hi, I would like to kindly remind you of the following patches, which are already waiting for over 6 months: [PATCH, ARM] correctly encode the CC reg data flow https://gcc.gnu.org/ml/gcc-patches/2017-01/msg01351.html [PATCH, ARM] Further improve stack usage in sha512 (PR 77308)

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

On Aug 01 2017, Maxim Kuvyrkov wrote: > Do you know a reliable way of checking whether target can issue nops in > simple code? Try inspecting one of the rtl dumps. Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE

Re: [PATCH] Add optab checks to vector extraction path in vectorizable_store

On Tue, Aug 01, 2017 at 03:19:28PM +0200, Richard Biener wrote: > + if (lvectype != vectype) > + { > + tree tem = make_ssa_name (lvectype); > + gimple *pun= gimple_build_assign (tem, build1 > + (VIEW_CONVERT_EXPR,

Re: [PATCH] Fix segfault in gcov.c (PR gcov-profile/81561).

On 08/01/2017 03:46 PM, Richard Biener wrote: On Tue, Aug 1, 2017 at 2:02 PM, Martin Liška wrote: On 07/27/2017 01:48 PM, Richard Biener wrote: On Thu, Jul 27, 2017 at 12:12 PM, Martin Liška wrote: Hello. As reported in mentioned PR, we segfault in gcov

RE: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.

Hi Bin, > Hi, > I saw below failure after svn+ssh://gcc.gnu.org/svn/gcc/trunk@250672 > > FAIL: gcc.target/aarch64/advsimd-intrinsics/vcvt_high_1.c -O1 > (internal compiler error) This should be fixed by r 250766 Cheers, Tamar > > Regression in patch updates? > > Thanks, > bin > > > > OK

Re: [ARM, VXworks] Fix build

Hi Richard, > On Jul 31, 2017, at 11:58 , Richard Earnshaw (lists) > wrote: > >> Regarding removal of old ABI support, which release were you >> targeting ? >> >> On the VxWorks front, where we adapt to what the system toolchains >> do, it will mean dropping support

Re: [PATCH] Fix PR81354 (rewrite gimple_split_edge)

> On Aug 1, 2017, at 3:46 AM, Richard Biener wrote: > > On Mon, Jul 31, 2017 at 4:03 PM, Bill Schmidt > wrote: >> >>> On Jul 31, 2017, at 8:19 AM, Bill Schmidt >>> wrote: >>> >>> That would certainly be

Re: RFA: Backport fix for PR80769

On Thu, Jul 27, 2017 at 11:36 PM, Richard Sandiford wrote: > This is a minimal-ish backport of the fix for PR80769. The trunk version > also replaced open-coded instances of get_next_strinfo with calls to the > new function. It also added asserts in various other

[PATCH, i386]: Fix PR81639, ICE in rtl_verify_bb_insns with a naked function

Hello! Naked functions should not sibcall, since in naked functions epilogue point (placed just above sibcal insn) is unreachable and marked with a trap insn. 2017-08-01 Uros Bizjak PR target/81639 * config/i386/i386.c (ix86_funciton_naked): New prototype.

Re: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.

On Wed, Jun 7, 2017 at 12:38 PM, Tamar Christina wrote: > Hi All, > > > This patch lays the ground work to fix the immediate moves for floats > to use a combination of mov, movi, fmov instead of ldr and adrp to load > float constants that fit within the 16-bit limit of

Re: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

On Tue, Aug 1, 2017 at 12:51 PM, Tamar Christina wrote: >> >> Given review comment already pointed out big-endian issue and patch was >> updated to address it, I would expect reg-test on a big-endian target before >> applying patch, right? > > The patch spent 6 months in

RE: [GCC][AArch64][PATCH][Committed] Fix failing dbl_mov_immediate_1.c test on big-endian

Hi, Sorry this fix is incorrect, I have reverted the patch to address the rest of the Big endian failures. Sorry, Tamar > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Tamar Christina > Sent: 01 August 2017 12:43 > To:

Re: [PATCH] PRE TLC, improve fake exit edge placement

On Tue, 1 Aug 2017, Richard Biener wrote: > > When working on PR81181 I ran into some things I wanted to clean up > several times. First a few PRE cleanups done for the fix. Second, > the fake exit edges we add for infinite loops happen to start from > loop headers rather than latches which is

Re: [PATCH v12] add -fpatchable-function-entry=N,M option

On Aug 01 2017, Gerald Pfeifer wrote: > On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote: >> I don't see an easy way to correctly differentiate between "attribute" >> nops and "bundle" nops, so XFAILing these tests on ia64 seems like a >> valid approach. > > Make sense, given that

Re: [Patch (preapproved)] Guard Copy Header pass on flag_tree_loop_vectorize

On Tue, Aug 1, 2017 at 12:08 PM, James Greenhalgh wrote: > > On Thu, Jul 27, 2017 at 03:21:01PM +0100, James Greenhalgh wrote: >> On Thu, Jul 27, 2017 at 02:26:03PM +0200, Richard Biener wrote: >> > On Thu, Jul 27, 2017 at 2:08 PM, Jakub Jelinek wrote:

[PATCH, i386]: Fix PR81641, assemble failure with named address spaces and -masm=intel

Using -O -masm=intel following testcase (gcc.target/i386/addr-space-2.c): --cut here-- int test(void) { int __seg_fs *f = (int __seg_fs *)16; int __seg_gs *g = (int __seg_gs *)16; return *f + *g; } --cut here-- compiles to: mov eax, DWORD PTR gs:ds:16 add eax,

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