Re: [PATCH] wwwdocs: contribute.html: Update consensus on patch content.

On Thu, 25 Apr 2024 at 17:44, Carlos O'Donell wrote: > > Discussion is here: > https://inbox.sourceware.org/gcc/CAPS5khZeWkAD=v8ka9g5eecdnk3bdhfnzjumpvc+hedmkvj...@mail.gmail.com/ > > Rough consensus from Jakub Jelinek, Richard Biener and others is > that maintainers are for the change. > > This

Re: [PATCH] wwwdocs: contribute.html: Update consensus on patch content.

On Fri, 26 Apr 2024 at 10:25, Christophe Lyon wrote: > > On Thu, 25 Apr 2024 at 17:44, Carlos O'Donell wrote: > > > > Discussion is here: > > https://inbox.sourceware.org/gcc/CAPS5khZeWkAD=v8ka9g5eecdnk3bdhfnzjumpvc+hedmkvj...@mail.gmail.com/ > > > > Rough consensus from Jakub Jelinek, Richard

Re: [PATCH] amdgcn: Add gfx90c target

On 25/04/2024 19:37, Frederik Harwath wrote: Hi Andrew, this patch adds support for gfx90c GCN5 APU integrated graphics devices. The LLVM AMDGPU documentation (https://llvm.org/docs/AMDGPUUsage.html) lists those devices as unsupported by rocm-amdhsa. As we have discussed elsewhere, I have tested

Re: [PATCH] arm: Zero/Sign extends for CMSE security

On 26/04/2024 09:39, Torbjorn SVENSSON wrote: > Hi, > > On 2024-04-25 16:25, Richard Ball wrote: >> Hi Torbjorn, >> >> Thanks very much for the comments. >> I think given that the code that handles this, is within a >> FOREACH_FUNCTION_ARGS loop. >> It seems a fairly safe assumption that if the

Re: [PATCH][GCC] aarch64: Fix SCHEDULER_IDENT for Cortex-A510

On 25/04/2024 15:59, Richard Ball wrote: > Hi Richard, > > I committed this combined patch (with Cortex-A520) for trunk > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=cab53aae43cf94171b01320c08302e47a5daa391 > >

Re: [PATCH] wwwdocs: Add note to changes.html for __has_{feature,extension}

On 17/04/2024 11:41, Marek Polacek wrote: > On Mon, Apr 15, 2024 at 11:13:27AM +0100, Alex Coplan wrote: > > On 04/04/2024 11:00, Alex Coplan wrote: > > > Hi, > > > > > > This adds a note to the GCC 14 release notes mentioning support for > > > __has_{feature,extension} (PR60512). > > > > > > OK

[wwwdocs] gcc-14/changes.html (AMD GCN): Mention gfx90c support

I will push this shortly. I think the gfx90c patch just made the cut for the GCC-14 branch! Andrew --- htdocs/gcc-14/changes.html | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index fce0fb44..47fef32d 100644

[committed, gcc-13] libstdc++: Update status tables to refer to GCC 13 not mainline

Pushed to gcc-13. -- >8 -- This should have been done before the 13.1.0 release. libstdc++-v3/ChangeLog: * doc/html/manual/status.html: Regenerate. * doc/xml/manual/status_cxx1998.xml: Replace references to mainline GCC. * doc/xml/manual/status_cxx2011.xml:

[PATCH] PR middle-end/111701: signbit(x*x) vs -fsignaling-nans

This patch addresses PR middle-end/111701 where optimization of signbit(x*x) using tree_nonnegative_p incorrectly eliminates a floating point multiplication when the operands may potentially be signaling NaNs. The above bug fix also provides a solution or work-around to the tricky issue in PR

[wwwdocs] gcc-14/changes.html (AMD GCN): Mention gfx90c support

I will push this shortly. I think the gfx90c patch just made the cut for the GCC-14 branch! Andrew --- htdocs/gcc-14/changes.html | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index fce0fb44..47fef32d 100644

[committed, gcc-14] libstdc++: Update status tables to refer to GCC 14 not mainline

Pushed to gcc-14. -- >8 -- libstdc++-v3/ChangeLog: * doc/html/manual/status.html: Regenerate. * doc/xml/manual/status_cxx1998.xml: Replace references to mainline GCC. * doc/xml/manual/status_cxx2011.xml: Likewise. * doc/xml/manual/status_cxx2014.xml:

[committed] libstdc++: Adjust whitespace in status tables in manual

Pushed to trunk. I'll also be following this with the non-whitespace equivalents for the gcc-14 and gcc-13 branches. -- >8 -- This simplifies the changes needed after branching for a new release, so that new line breaks don't need to be introduced every time we branch. libstdc++-v3/ChangeLog:

Re: [PATCH] arm: Zero/Sign extends for CMSE security

Hi, On 2024-04-25 16:25, Richard Ball wrote: Hi Torbjorn, Thanks very much for the comments. I think given that the code that handles this, is within a FOREACH_FUNCTION_ARGS loop. It seems a fairly safe assumption that if the code works for one that it will work for all. To go back and add

[COMMITTED] gcc-14: Add Ada changes

Co-authored-by: Fernando Oleo Blanco Co-authored-by: Piotr Trojanek Signed-off-by: Marc Poulhiès --- htdocs/gcc-14/changes.html | 67 +- 1 file changed, 66 insertions(+), 1 deletion(-) diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html

[PATCH] i386: Fix array index overflow in pr105354-2.c

Hi all, The array index should not be over 8 for v8hi, or it will fail under -O0 or using -fstack-protector. This patch aims to fix that, which is mentioned in PR110621. Commit as obvious and backport to GCC13. Thx, Haochen gcc/testsuite/ChangeLog: PR target/110621 *

Re: [PATCH] i386: Fix array index overflow in pr105354-2.c

On Fri, Apr 26, 2024 at 11:03 AM Haochen Jiang wrote: > > Hi all, > > The array index should not be over 8 for v8hi, or it will fail > under -O0 or using -fstack-protector. > > This patch aims to fix that, which is mentioned in PR110621. > > Commit as obvious and backport to GCC13. > > Thx, >

RE: [PATCH] i386: Fix array index overflow in pr105354-2.c

> -Original Message- > From: Uros Bizjak > Sent: Friday, April 26, 2024 5:13 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao > Subject: Re: [PATCH] i386: Fix array index overflow in pr105354-2.c > > On Fri, Apr 26, 2024 at 11:03 AM Haochen Jiang > wrote: > > > > Hi

[PATCH] aarch64: Fix normal returns inside functions which use eh_returns [PR114843]

The problem here is that on a normal return path, we still restore the eh data return when we should not. Instead of one return path in the case of eh_return, this changes over to use multiple returns pathes just like a normal function. On the normal path (non-eh return), we need to skip restoring

[PATCH] aarch64: Use cinc for small constants instead of just add [PR112304]

On many cores, the mov instruction is "free" so the sequence: cmp w0, #0 csetw0, ne add w0, w0, 42 is more expensive than just: cmp w0, #0 mov w1, #42 cincw0, w1, ne The reason why we get the add case is that the pattern

[PATCH] vax: resolve long-standing documentation bugs re floating-point codegen [PR79646]

Howdy, y`all. After many years away from contributing to GCC, I am rejoining as a "gardener": my intent/plan is to clean up the bug backlog, weeding out old bugs that are relatively-easy to fix yet have languished for a long time.  First for today`s gardening: a documentation-only bug or two

Re: [PATCH] wwwdocs: Add note to changes.html for __has_{feature,extension}

On Fri, Apr 26, 2024 at 11:12:54AM +0100, Alex Coplan wrote: > On 17/04/2024 11:41, Marek Polacek wrote: > > On Mon, Apr 15, 2024 at 11:13:27AM +0100, Alex Coplan wrote: > > > On 04/04/2024 11:00, Alex Coplan wrote: > > > > Hi, > > > > > > > > This adds a note to the GCC 14 release notes

Re: [COMMITTED] gcc-14: Add Ada changes

Marek Polacek writes: Hello, >> + Experimental features: >> +> href="https://gcc.gnu.org/onlinedocs/gnat_rm/Pragma-Storage_005fModel.html;>Storage >> +Model: this feature proposes to redesign the concepts of Storage >> Pools >> +into a more efficient model allowing higher

Re: [COMMITTED] gcc-14: Add Ada changes

On Fri, Apr 26, 2024 at 10:55:35AM +0200, Marc Poulhiès wrote: > Co-authored-by: Fernando Oleo Blanco > Co-authored-by: Piotr Trojanek > Signed-off-by: Marc Poulhiès > --- > htdocs/gcc-14/changes.html | 67 +- > 1 file changed, 66 insertions(+), 1

Re: Frontend access to target features (was Re: [PATCH] libgccjit: Add ability to get CPU features)

Now that we have a more general way to check if target-dependent types are supported (see this commit: https://github.com/rust-lang/gcc/commit/1c9a9b2f1fd914cad911467ec1d29f158643c2ce#diff-018089519ab2b14a34313ded0ae1a2f9fcab5f7bcb2fa31f147e1dc757bbdd7aR4016), perhaps we should remove

[committed] libstdc++: Do not apply localized formatting to NaN and inf [PR114863]

Tested x86_64-linux. Pushed to trunk. I'm going to push this to gcc-13 and gcc-14 too (approved by Jakub on IRC). -- >8 -- We don't want to add grouping to strings like "-inf", and there is no radix character to replace either. libstdc++-v3/ChangeLog: PR libstdc++/114863 *

Re: [PATCH] wwwdocs: Add note to changes.html for __has_{feature,extension}

On 26/04/2024 09:14, Marek Polacek wrote: > On Fri, Apr 26, 2024 at 11:12:54AM +0100, Alex Coplan wrote: > > On 17/04/2024 11:41, Marek Polacek wrote: > > > On Mon, Apr 15, 2024 at 11:13:27AM +0100, Alex Coplan wrote: > > > > On 04/04/2024 11:00, Alex Coplan wrote: > > > > > Hi, > > > > > > > > >

[PATCH] middle-end/114734 - wrong code with expand_call_mem_ref

When expand_call_mem_ref looks at the definition of the address argument to eventually expand a _MEM_REF argument together with a masked load it fails to honor constraints imposed by SSA coalescing decisions. The following fixes this. Boostrap and regtest running on x86_64-unknown-linux-gnu.

Re: [PATCH] c++: fix source printing for "required from here" message

On Thu, 25 Apr 2024, David Malcolm wrote: > On Wed, 2024-04-24 at 17:05 -0400, Patrick Palka wrote: > > On Wed, 24 Apr 2024, Jason Merrill wrote: > > > > > On 4/24/24 13:22, Patrick Palka wrote: > > > > Tested on x86_64-pc-linux-gnu, full bootstrap+regtest in > > > > progress, > > > > does this

[PATCH] LoongArch: Add constraints for bit string operation define_insn_and_split's [PR114861]

Without the constrants, the compiler attempts to use a stack slot as the target, causing an ICE building the kernel with -Os: drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c:3144:1: error: could not split insn (insn:TI 1764 67 1745 (set (mem/c:DI (reg/f:DI 3 $r3) [707 %sfp+-80 S8 A64])

Re: [PATCH v3 2/2] c++: Fix instantiation of imported temploid friends [PR114275]

On 4/19/24 09:29, Nathaniel Shead wrote: On Fri, Apr 19, 2024 at 12:14:06PM +1000, Nathaniel Shead wrote: On Wed, Apr 17, 2024 at 02:02:21PM -0400, Patrick Palka wrote: On Mon, 15 Apr 2024, Nathaniel Shead wrote: I'm not a huge fan of always streaming 'imported_temploid_friends' for all

[PATCH] arm: [MVE intrinsics] Fix support for predicate constants [PR target/114801]

In this PR, we have to handle a case where MVE predicates are supplied as a const_int, where individual predicates have illegal boolean values (such as 0xc for a 4-bit boolean predicate). To avoid the ICE, we canonicalize them, replacing a non-null value with -1. 2024-04-26 Christophe Lyon

[PATCH 1/2] Add verification of gimple_assign_nontemporal_move_p [PR112976]

Currently the middle-end only knows how to support temporal stores (the undocumented storent optab) so let's verify that the only time we set nontemporal_move on an assign is if the the lhs is not a gimple reg. Bootstrapped and tested on x86_64-linux-gnu no regressions. gcc/ChangeLog:

[PATCH 2/2] Remove support for nontemporal stores with ssa_names on lhs [PR112976]

When cfgexpand was changed to support expanding from tuple gimple (r0-95521-g28ed065ef9f345), the code was added to support doing nontemporal stores with LHS of a SSA_NAME but that will never be a nontemporal store. This patch removes that and asserts that expanding with a LHS of a SSA_NAME is not

Re: [PATCH] RISC-V: Add -X to link spec

LGTM :) Fangrui Song 於 2024年4月23日 週二 12:27 寫道： > From: Fangrui Song > > --discard-locals (-X) instructs the linker to remove local .L* symbols, > which occur a lot due to label differences for linker relaxation. The > arm port has a similar need and passes -X to ld. > > In contrast, the RISC-V

Re: [PATCH] vax: resolve long-standing documentation bugs re floating-point codegen [PR79646]

On Apr 26, 2024, at 11:17 AM, Abe Skolnik wrote: You never need to do any work in .po files, omit that part and repost.

[PATCH] Remove m_nloops field from loop_versioning

This is a small cleanup of loop_versioning where m_nloops is only used in the constructor so we can remove the whole field. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * gimple-loop-versioning.cc (loop_versioning): Remove m_nloops field.

Pushed: [PATCH] LoongArch: Add constraints for bit string operation define_insn_and_split's [PR114861]

On Sat, 2024-04-27 at 11:04 +0800, Lulu Cheng wrote: > LGTM! > > Thanks. Pushed r15-11 and r14-10142. > 在 2024/4/26 下午9:52, Xi Ruoyao 写道: > > Without the constrants, the compiler attempts to use a stack slot as the > > target, causing an ICE building the kernel with -Os: > > > >

Re: [PATCH] LoongArch: Add constraints for bit string operation define_insn_and_split's [PR114861]

LGTM! Thanks. 在 2024/4/26 下午9:52, Xi Ruoyao 写道: Without the constrants, the compiler attempts to use a stack slot as the target, causing an ICE building the kernel with -Os: drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c:3144:1: error: could not split insn (insn:TI 1764 67 1745