Richard,
On 10.08.2018 16:54, Richard Earnshaw (lists) wrote:
On 10/08/18 14:38, Anton Youdkevitch wrote:
The patch inlines strlen for 8-byte aligned strings on
AARCH64 like it's done on other platforms (power, s390).
The implementation falls back to the library call if the
string
Wilco,
On 10.08.2018 18:04, Wilco Dijkstra wrote:
Hi,
A quick benchmark shows it's faster up to about 10 bytes, but after that it
becomes extremely slow. At 16 bytes it's already 2.5 times slower and for
larger sizes its over 13 times slower than the GLIBC implementation...
The
found. OK for trunk?
2016-08-10 Anton Youdkevitch
* gcc/config/aarch64/aarch64.md (strlen) New pattern.
(UNSPEC_BUILTIN_STRLEN): Define.
* gcc/config/aarch64/aarch64.c (aarch64_expand_strlen):
Expand only in 8-byte aligned case, do not attempt to
adjust address
Andrew,
On 02.11.2019 2:22, Andrew Pinski wrote:
On Fri, Nov 1, 2019 at 7:03 AM Anton Youdkevitch
wrote:
Hello,
Here is the one-liner that fixes the incorrect
vec_perm cost for thunderx2t99 chip.
With the patch applied 526.blender of CPU2017
gets ~5% improvement with no measurable changes
Kyrill,
On 05.11.2019 14:43, Kyrylo Tkachov wrote:
Hi Andrew, Anton,
On 11/1/19 11:22 PM, Andrew Pinski wrote:
On Fri, Nov 1, 2019 at 7:03 AM Anton Youdkevitch
wrote:
Hello,
Here is the one-liner that fixes the incorrect
vec_perm cost for thunderx2t99 chip.
With the patch applied 526
On 05.11.2019 15:09, Kyrylo Tkachov wrote:
On 11/5/19 11:54 AM, Anton Youdkevitch wrote:
Kyrill,
On 05.11.2019 14:43, Kyrylo Tkachov wrote:
> Hi Andrew, Anton,
>
> On 11/1/19 11:22 PM, Andrew Pinski wrote:
>> On Fri, Nov 1, 2019 at 7:03 AM Anton Youdkevitch
>>
Hello,
Here is the one-liner that fixes the incorrect
vec_perm cost for thunderx2t99 chip.
With the patch applied 526.blender of CPU2017
gets ~5% improvement with no measurable changes
for other benchmarks.
Bootstrapped OK on aarch64-linux-gnu.
OK for trunk?
2019-11-01 Anton Youdkevitch
Here is the patch introducing thunderxt311 maching model
for the scheduler. A name for the new chip was added to the
list of the names to be recognized as a valid parameter for mcpu
and mtune flags. The TX2 cost model was reused for TX3.
Bootstrapped on AArch64.
2020-04-08 Anton Youdkevitch
Hi Kyrylo,
On 20.4.2020 20:13 , Kyrylo Tkachov wrote:
Hi Anton,
-Original Message-
From: Gcc-patches On Behalf Of Anton
Youdkevitch
Sent: 20 April 2020 18:05
To: gcc-patches@gcc.gnu.org
Cc: jo...@marvell.com
Subject: [PATCH v2] aarch64: Add TX3 machine model
Here is the patch
mmand line
parameter is replaced with the same "thunderxt311" name.
Bootstrapped on AArch64.
2020-04-20 Anton Youdkevitch
* config/aarch64/aarch64-cores.def: Add the chip name.
* config/aarch64/aarch64-tune.md: Regenerated.
* gcc/config/aarch64/aarch64.c:
mmand line
parameter is replaced with the same "thunderxt311" name.
Bootstrapped on AArch64.
2020-04-20 Anton Youdkevitch
* config/aarch64/aarch64-cores.def: Add the chip name.
* config/aarch64/aarch64-tune.md: Regenerated.
* gcc/config/aarch64/aarch64.c:
Andrew,
On 09.4.2020 00:50 , Andrew Pinski wrote:
On Wed, Apr 8, 2020 at 11:06 AM Anton Youdkevitch
wrote:
Here is the patch introducing thunderxt311 maching model
for the scheduler. A name for the new chip was added to the
list of the names to be recognized as a valid parameter for mcpu
. Fixed copyright
names and dates.
Lowering the chip capabilities to v8.3 to be on the safe side.
Bootstrapped on AArch64.
2020-04-27 Anton Youdkevitch
* config/aarch64/aarch64-cores.def: Add the chip name.
* config/aarch64/aarch64-tune.md: Regenerated.
* config/aarch64
This adds mentioning of Marvell ThunderX3 chip to
the list of supported processors.
---
htdocs/gcc-10/changes.html | 1 +
1 file changed, 1 insertion(+)
diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html
index 41c2dc0..b37b74d 100644
--- a/htdocs/gcc-10/changes.html
+++
On 27.4.2020 19:34 , Kyrylo Tkachov wrote:
Hi Anton,
-Original Message-
From: Anton Youdkevitch
Sent: 27 April 2020 11:24
To: gcc-patches@gcc.gnu.org
Cc: Richard Earnshaw ; Kyrylo Tkachov
; James Greenhalgh
; Richard Sandiford
; jjo...@marvell.com
Subject: [PATCH v5] aarch64: Add TX3
On Mon, Apr 27, 2020 at 04:34:49PM +, Kyrylo Tkachov wrote:
> Hi Anton,
>
> > -Original Message-
> > From: Anton Youdkevitch
> > Sent: 27 April 2020 11:24
> > To: gcc-patches@gcc.gnu.org
> > Cc: Richard Earnshaw ; Kyrylo Tkachov
> >
mmand line
parameter is replaced with the same "thunderxt311" name.
Added the new chip name to the documentation. Fixed
copyright names and dates.
Lowering the chip capabilities to v8.3 to be on the
safe side.
Bootstrapped on AArch64.
2020-04-23 Anton Youdkevitch
* config/aarch
Hi Kyrylo,
On 23.4.2020 11:29 , Kyrylo Tkachov wrote:
Hi Anton,
Thanks to you and Joel for clarifying the copyright assignment...
-Original Message-
From: Gcc-patches On Behalf Of Anton
Youdkevitch
Sent: 20 April 2020 19:29
To: gcc-patches@gcc.gnu.org
Cc: jo...@marvell.com
Subject
On 30.4.2020 13:05 , Kyrylo Tkachov wrote:
-Original Message-
From: Gerald Pfeifer
Sent: 30 April 2020 10:53
To: Kyrylo Tkachov
Cc: Anton Youdkevitch ; gcc-
patc...@gcc.gnu.org; Joseph S. Myers
Subject: RE: [PATCH] wwwdocs: Added mentioning of TX3 chip to the list of
the processors
On 28.4.2020 12:02 , Kyrylo Tkachov wrote:
Hi Anton,
-Original Message-
From: Anton Youdkevitch
Sent: 27 April 2020 18:21
To: Kyrylo Tkachov
Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw
; James Greenhalgh
; Richard Sandiford
; jjo...@marvell.com
Subject: Re: [PATCH v5] aarch64: Add
mmand line
parameter is replaced with the same "thunderxt311" name.
Added the new chip name to the documentation. Fixed
copyright names and dates.
Bootstrapped on AArch64.
2020-04-23 Anton Youdkevitch
* config/aarch64/aarch64-cores.def: Add the chip name.
* config/aar
ThunderxT2 chip has an odd property that nested scalar FP min and max are
slower than logically the same sequence of compares and branches.
Here is the patch where I'm trying to implement that transformation.
Please advise if the "combine" pass (actually after the pass itself) is the
appropriate
On Fri, Sep 11, 2020 at 8:43 AM Richard Biener
wrote:
> On Fri, Sep 11, 2020 at 8:27 AM Anton Youdkevitch
> wrote:
> >
> > Richard,
> >
> > On Thu, Sep 10, 2020 at 12:03 PM Richard Biener <
> richard.guent...@gmail.com> wrote:
> >>
>
Richard,
Can you approve the backporting of the patch to GCC10?
Also, since I don't have the commit permission can you push
it if approved?
--
Thanks,
Anton
On 06.7.2020 21:04 , Richard Sandiford wrote:
Joel Jones writes:
I approve of this patch. I'm responsible for GCC for TX2 at
As I don't have the commit privilege, if this is a sufficient approval
can someone commit it for me?
--
Thanks,
Anton
On 06.7.2020 21:04 , Richard Sandiford wrote:
Joel Jones writes:
I approve of this patch. I'm responsible for GCC for TX2 at Marvell. Andrew
Pinski should certainly
Youdkevitch
gcc/
* config/aarch64/aarch64.c (thunderx2t99_regmove_cost):
Change instruction cost
(thunderx2t99_vector_cost): Likewise
>From 3440e019c05fe5b565041cad549c6eefa2004a2b Mon Sep 17 00:00:00 2001
From: Anton Youdkevitch
Date: Tue, 26 May 2020 04:23:04 -0700
Subject: [PATCH] Cha
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