On 17 June 2014 17:42, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
On 17 June 2014 16:15, Richard Biener richard.guent...@gmail.com wrote:
On Tue, Jun 17, 2014 at 4:11 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
For some large constant, ports like ARM, need one more
On 18 June 2014 05:32, Jeff Law l...@redhat.com wrote:
On 06/11/14 03:35, Zhenqiang Chen wrote:
Thanks for the comments. df_live seams redundant.
With flag_ira_loop_pressure, the pass will call df_analyze () at the
beginning, which can make sure all the DF info are correct.
Can we
discussion about the hooks was in thread:
https://gcc.gnu.org/ml/gcc-patches/2013-10/msg02601.html
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* doc/md.texi (ccmp): Add description about conditional compare
instruction pattern
Hi,
The patch makes several functions global, which will be used when
expanding ccmp instructions.
The other change in this patch is to check CCMP when turning code into
jumpy sequence.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
functions.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* Makefile.in: Add ccmp.o
* ccmp.c: New file.
* ccmp.h: New file.
* recog.c (simplify_while_replacing): Check ccmp_insn_p.
diff --git a/gcc/Makefile.in b/gcc
in a COND_EXPR (checked by function
used_in_cond_stmt_p), it calls cstorecc4 pattern to store the CC to a
general register.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
Hi,
The patches defines ccmp operand predicate for AARCH64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-protos.h (aarch64_uimm5): New prototype.
* config/aarch64/constraints.md (Usn): Immediate
Hi,
The patches add a set of CC mode for AARCH64, which is similar as them for ARM.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-modes.def: Define new CC modes for ccmp.
* config/aarch64/aarch64.c
Hi,
The patch adds three help functions to output ccmp instructions.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-protos.h (aarch64_output_ccmp): New prototype.
* config/aarch64/aarch64.c
Hi,
The patches implements the two hooks for AARCH64 to generate ccmp instructions.
Bootstrap and no make check regression on qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64.c (aarch64_code_to_ccmode
on qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64.md (movmodecc): Handle ccmp_cc.
* ifcvt.c: #include ccmp.h.
(struct noce_if_info): Add a new field ccmp_p.
(noce_emit_cmove): Allow ccmp
Hi,
The patch adds two insn patterns for ccmp instructions.
cbranchcc4 is introduced to generate optimized conditional branch
without an additional compare against the result of ccmp.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-23 Zhenqiang Chen zhenqiang.c...@linaro.org
On 23 June 2014 15:09, Andrew Pinski pins...@gmail.com wrote:
On Mon, Jun 23, 2014 at 12:01 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
The patch enhances ifcvt to handle conditional compare instruction
(ccmp) to make it work with cmov. For ccmp, ALLOW_CC_MODE is set to
TRUE
On 26 June 2014 05:03, Jeff Law l...@redhat.com wrote:
On 06/25/14 08:44, Richard Earnshaw wrote:
On 23/06/14 07:58, Zhenqiang Chen wrote:
Hi,
Swapping operands in a ccmp will lead to illegal instructions. So the
patch disables it in simplify_while_replacing.
The patch is separated from
On 25 June 2014 22:44, Richard Earnshaw rearn...@arm.com wrote:
On 23/06/14 07:58, Zhenqiang Chen wrote:
Hi,
Swapping operands in a ccmp will lead to illegal instructions. So the
patch disables it in simplify_while_replacing.
The patch is separated from
https://gcc.gnu.org/ml/gcc-patches
On 26 June 2014 05:30, Jeff Law l...@redhat.com wrote:
On 06/11/14 04:05, Zhenqiang Chen wrote:
On 10 June 2014 19:06, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:22 AM, Zhenqiang Chen wrote:
Hi,
For loop2-invariant pass, when flag_ira_loop_pressure is enabled
On 25 June 2014 22:41, Richard Earnshaw rearn...@arm.com wrote:
On 23/06/14 07:57, Zhenqiang Chen wrote:
Hi,
The patch makes several functions global, which will be used when
expanding ccmp instructions.
The other change in this patch is to check CCMP when turning code into
jumpy sequence
On 10 June 2014 19:16, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:23 AM, Zhenqiang Chen wrote:
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno;
(create_new_invariant): Init eqno
On 25 June 2014 23:16, Richard Earnshaw rearn...@arm.com wrote:
On 23/06/14 07:59, Zhenqiang Chen wrote:
Hi,
This patch includes the main logic to expand ccmp instructions.
In the patch,
* ccmp_candidate_p is used to identify the CCMP candidate
* expand_ccmp_expr is the main entry
On 2 July 2014 03:54, Jeff Law l...@redhat.com wrote:
On 07/01/14 01:16, Zhenqiang Chen wrote:
ChangeLog:
2014-07-01 Zhenqiang Chen zhenqiang.c...@linaro.org
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno
check regression on qemu.
OK for trunk?
Thanks!
-Zhenqiang
2014-07-04 Zhenqiang Chen zhenqiang.c...@linaro.org
Andrew Pinski apin...@cavium.com
* config/aarch64/aarch64.md (cstorecc4): New.
(movmodecc): Handle ccmp_cc.
* ccmp.c (used_in_cond_stmt_p): Hande
Ping?
Thanks!
-Zhenqiang
On 17 June 2014 12:53, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping?
Thanks!
-Zhenqiang
On 9 June 2014 17:08, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping ^2?
Thanks!
-Zhenqiang
On 28 May 2014 15:02, Zhenqiang Chen zhenqiang.c...@linaro.org
the gcc.mo.
The patch tries to search relative dir ../share/locale from gcc.
Although it can not cover all cases, I think it can cover most cases.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-07-07 Zhenqiang Chen zhenqiang.c...@linaro.org
-Original Message-
From: Ulrich Weigand [mailto:uweig...@de.ibm.com]
Sent: Friday, November 07, 2014 12:11 AM
To: Richard Henderson
Cc: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Andreas Krebbel;
gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Allow CC mode
-Original Message-
From: Richard Earnshaw
Sent: Friday, November 07, 2014 8:51 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Cc: Ramana Radhakrishnan
Subject: Re: [PATCH, testsuite, ARM] Check lr other than r3
On 03/11/14 08:18, Zhenqiang Chen wrote:
Hi,
pr45701-1.c FAIL
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Thursday, November 06, 2014 4:23 PM
To: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Ulrich Weigand;
Andreas Krebbel
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Allow CC mode
.
Bootstrap and no make check regression on X86-64 and i686.
All the failed cases in PR63917 PASS.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-20 Zhenqiang Chen zhenqiang.c...@arm.com
PR rtl-optimization/63917
* ifcvt.c (clobber_cc_p, use_cc_p): New functions
.
Coremark on Cortex-M4 is 0.07% regression due to alignment change.
No Coremark change on Corter-M0 and Cortex-A15.
Unfortunately I failed to generate a meaningful small case for it. So no
test case is included in the patch.
Ok for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-21 Zhenqiang Chen
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Friday, November 21, 2014 2:27 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ifcvt] Fix PR63917
On 11/20/2014 10:48 AM, Zhenqiang Chen wrote:
+/* Check X clobber CC reg
.
No make check regression with qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-24 Zhenqiang Chen zhenqiang.c...@arm.com
PR target/64015
* config/aarch64/aarch64.c (aarch64_gen_ccmp_first): Recheck operand
after mode conversion.
(aarch64_gen_ccmp_next
-Original Message-
From: Eric Botcazou [mailto:ebotca...@adacore.com]
Sent: Saturday, November 22, 2014 6:15 PM
To: Zhenqiang Chen
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, combine] Try REG_EQUAL for nonzero_bits
The patch tries to use REG_EQUAL to get more precise info
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Richard Henderson
Sent: Monday, November 24, 2014 4:57 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Cc: Marcus Shawcroft
Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Tuesday, November 25, 2014 5:25 PM
To: Zhenqiang Chen
Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
On 11/25/2014 09:41 AM, Zhenqiang Chen wrote:
I
Hi,
The are two implementations of seq_cost. The function bodies are exactly the
same. The patch removes one of them and make the other global.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-09 Zhenqiang Chen zhenqiang.c...@arm.com
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Thursday, October 09, 2014 5:21 PM
To: Zhenqiang Chen
Cc: GCC Patches
Subject: Re: [PATCH] Clean up duplicated function seq_cost
On Thu, Oct 9, 2014 at 11:20 AM, Richard Biener
richard.guent
Zhenqiang Chen zhenqiang.c...@linaro.org
PR rtl-optimization/pr60663
* recog.c (check_asm_operands): Check the number of expected operands.
testsuite/ChangeLog:
2014-03-26 Zhenqiang Chen zhenqiang.c...@linaro.org
* gcc.dg/pr60663: New testcase.
diff --git a/gcc/recog.c b/gcc
On 26 March 2014 15:00, Jakub Jelinek ja...@redhat.com wrote:
On Wed, Mar 26, 2014 at 02:16:16PM +0800, Zhenqiang Chen wrote:
The patch checks the number of the expected operands in
ASM_OPERANDS_TEMPLATE with the same logic as it in output_asm_insn to
make sure the ASM_OPERANDS are legal
On 26 March 2014 15:45, Jakub Jelinek ja...@redhat.com wrote:
On Wed, Mar 26, 2014 at 03:30:44PM +0800, Zhenqiang Chen wrote:
Agree. CSE should never modify asm insns to drop some of the outputs.
So the right fix is top prevent this from happening, not papering over about
On 26 March 2014 15:45, Jakub Jelinek ja...@redhat.com wrote:
On Wed, Mar 26, 2014 at 03:30:44PM +0800, Zhenqiang Chen wrote:
Agree. CSE should never modify asm insns to drop some of the outputs.
So the right fix is top prevent this from happening, not papering over about
to the patch.
Thanks!
-Zhenqiang
On 27 March 2014 16:44, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
On 26 March 2014 15:45, Jakub Jelinek ja...@redhat.com wrote:
On Wed, Mar 26, 2014 at 03:30:44PM +0800, Zhenqiang Chen wrote:
Agree. CSE should never modify asm insns to drop some
On 11 April 2014 00:10, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Apr 01, 2014 at 11:41:12AM +0800, Zhenqiang Chen wrote:
Ping?
Bootstrap and no make check regression on X86-64.
Bootstrap on ARM. In ARM regression test, some new PASS and FAIL of
debug info check for gcc.dg/guality
Zhenqiang Chen zhenqiang.c...@linaro.org
* config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
GET_MODE_SIZE argument is enum machine_mode.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 773c353..822060d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm
Ping?
Rebase and test. Bootstrap and no make check regression with qemu.
OK for trunk?
Thanks!
-Zhenqiang
On 18 March 2014 16:16, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Hi,
For float value, movsfcc/movdfcc is required by emit_conditional_move
called in ifcvt pass to expand
On 28 April 2014 18:16, Marcus Shawcroft marcus.shawcr...@gmail.com wrote:
On 22 April 2014 10:36, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
+float f1 (float a, float b, float c, float d)
+{
+ if (a 0.0)
+return c;
+ else
+return 2.0;
+}
+
+double f2 (double a, double b
Ping? OK for trunk?
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
Sent: Tuesday, February 25, 2014 5:35 PM
To: gcc-patches@gcc.gnu.org
Cc: Ramana Radhakrishnan
Subject: [PATCH, ARM] Set
it out of the entry
block.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-05-08 Zhenqiang Chen zhenqiang.c...@linaro.org
* function.c (last_or_compare_p, try_copy_prop): new functions.
(move_insn_for_shrink_wrap): try copy propagation.
(prepare_shrink_wrap): Separate
Hi,
The patch splits the live_edge for move_insn_for_shrink_wrap to sink
the copy out of the entry block.
Bootstrap and no make check regression on X86-64 and ARM.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-05-08 Zhenqiang Chen zhenqiang.c...@linaro.org
* function.c
On 9 May 2014 14:08, Jeff Law l...@redhat.com wrote:
On 05/08/14 02:07, Zhenqiang Chen wrote:
Hi,
The patch splits the live_edge for move_insn_for_shrink_wrap to sink
the copy out of the entry block.
Bootstrap and no make check regression on X86-64 and ARM.
OK for trunk?
Thanks
On 9 May 2014 14:00, Jeff Law l...@redhat.com wrote:
On 05/08/14 02:06, Zhenqiang Chen wrote:
Hi,
Similar issue was discussed in thread
http://gcc.gnu.org/ml/gcc-patches/2013-04/msg01145.html. The patches
are close to Jeff's suggestion: sink just the moves out of the
incoming argument
Ping? OK for trunk?
Thanks!
-Zhenqiang
On 25 March 2014 16:13, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Hi
The patch enables shrink-wrap for apcs frame.
Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
No make check regression with -g/-mapcs/-marm.
Build
On 13 May 2014 15:55, Marek Polacek pola...@redhat.com wrote:
On Tue, May 13, 2014 at 03:14:34PM +0800, Zhenqiang Chen wrote:
Thanks. Committed the patch @r210351 with changes:
(1) Create shrink-wrap.h.
(2) Move all shrink-wrapping related interfaces from function.h to
shrink-wrap.h.
(3
On 13 May 2014 16:13, Marek Polacek pola...@redhat.com wrote:
On Tue, May 13, 2014 at 04:08:21PM +0800, Zhenqiang Chen wrote:
On 13 May 2014 15:55, Marek Polacek pola...@redhat.com wrote:
On Tue, May 13, 2014 at 03:14:34PM +0800, Zhenqiang Chen wrote:
Thanks. Committed the patch @r210351
On 9 May 2014 14:08, Jeff Law l...@redhat.com wrote:
On 05/08/14 02:07, Zhenqiang Chen wrote:
Hi,
The patch splits the live_edge for move_insn_for_shrink_wrap to sink
the copy out of the entry block.
Bootstrap and no make check regression on X86-64 and ARM.
OK for trunk?
Thanks
After reading the code in regcprop.c, I think I should reuse the
copyprop_hardreg_forward_1. So rewrite the patch, which is much simple
and should handle HAVE_cc0. But not sure we'd handle DEBUG_INSN or
not.
2014-05-13 Zhenqiang Chen zhenqiang.c...@linaro.org
* regcprop.c
On 13 May 2014 20:56, Richard Earnshaw rearn...@arm.com wrote:
On 25/03/14 08:13, Zhenqiang Chen wrote:
Hi
The patch enables shrink-wrap for apcs frame.
Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
No make check regression with -g/-mapcs/-marm.
Build linux-3.14
On 15 May 2014 02:03, Jeff Law l...@redhat.com wrote:
On 05/13/14 03:49, Zhenqiang Chen wrote:
On 9 May 2014 14:08, Jeff Law l...@redhat.com wrote:
On 05/08/14 02:07, Zhenqiang Chen wrote:
Hi,
The patch splits the live_edge for move_insn_for_shrink_wrap to sink
the copy out of the entry
On 15 May 2014 02:07, Jeff Law l...@redhat.com wrote:
On 05/13/14 04:04, Zhenqiang Chen wrote:
After reading the code in regcprop.c, I think I should reuse the
copyprop_hardreg_forward_1. So rewrite the patch, which is much simple
and should handle HAVE_cc0. But not sure we'd handle
On 13 May 2014 20:56, Richard Earnshaw rearn...@arm.com wrote:
On 25/03/14 08:13, Zhenqiang Chen wrote:
Hi
The patch enables shrink-wrap for apcs frame.
Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
No make check regression with -g/-mapcs/-marm.
Build linux-3.14
Hi,
The patch fix ICE issue triggered by shrink-wrapping enhancement.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
2014-05-20 Zhenqiang Chen zhenqiang.c...@linaro.org
PR rtl-optimization/61220
Part of PR rtl-optimization/61225
On 21 May 2014 00:54, Jeff Law l...@redhat.com wrote:
On 05/20/14 01:11, Zhenqiang Chen wrote:
Hi,
The patch fix ICE issue triggered by shrink-wrapping enhancement.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
2014-05-20 Zhenqiang Chen
adds another peephole2 rule to read one more
insn. From the register copy, it knows the address is the same.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-05-21 Zhenqiang Chen zhenqiang.c...@linaro.org
Part of PR rtl-optimization
On 21 May 2014 20:43, Steven Bosscher stevenb@gmail.com wrote:
On Wed, May 21, 2014 at 11:58 AM, Zhenqiang Chen wrote:
Hi,
The patch fixes the gcc.target/i386/pr49095.c FAIL in PR61225. The
test case tends to check a peephole2 optimization, which optimizes the
following sequence
2
On 21 May 2014 20:43, Steven Bosscher stevenb@gmail.com wrote:
On Wed, May 21, 2014 at 11:58 AM, Zhenqiang Chen wrote:
Hi,
The patch fixes the gcc.target/i386/pr49095.c FAIL in PR61225. The
test case tends to check a peephole2 optimization, which optimizes the
following sequence
2
Hi,
The patch fixes PR rtl-optimization/61278. Root cause for issue is
that df_live does not exist at -O1.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-05-23 Zhenqiang Chen zhenqiang.c...@linaro.org
PR rtl-optimization/61278
On 23 May 2014 17:05, Richard Biener richard.guent...@gmail.com wrote:
On Fri, May 23, 2014 at 9:23 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
The patch fixes PR rtl-optimization/61278. Root cause for issue is
that df_live does not exist at -O1.
Bootstrap and no make check
On 23 May 2014 19:56, Richard Biener richard.guent...@gmail.com wrote:
On Fri, May 23, 2014 at 12:33 PM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
On 23 May 2014 17:05, Richard Biener richard.guent...@gmail.com wrote:
On Fri, May 23, 2014 at 9:23 AM, Zhenqiang Chen
zhenqiang.c
for trunk?
Thanks!
-Zhenqiang
testsuite/ChangeLog:
2014-05-27 Zhenqiang Chen zhenqiang.c...@linaro.org
* gcc.target/arm/shrink-wrap-interrupt_1.c: New test.
* gcc.target/arm/shrink-wrap-interrupt_2.c: New test.
diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-interrupt_1.c
b/gcc
Ping?
Thanks!
-Zhenqiang
On 22 May 2014 17:52, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
On 21 May 2014 20:43, Steven Bosscher stevenb@gmail.com wrote:
On Wed, May 21, 2014 at 11:58 AM, Zhenqiang Chen wrote:
Hi,
The patch fixes the gcc.target/i386/pr49095.c FAIL in PR61225
Ping ^2?
Thanks!
-Zhenqiang
On 28 May 2014 15:02, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping?
Thanks!
-Zhenqiang
On 22 May 2014 17:52, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
On 21 May 2014 20:43, Steven Bosscher stevenb@gmail.com wrote:
On Wed, May 21, 2014 at 11
to
check only the register pressure of the invariant if possible.
Bootstrap and no make check regression on X86-64.
Bootstrap and no make check regression on X86-64 with
flag_ira_loop_pressure = true.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-10 Zhenqiang Chen zhenqiang.c...@linaro.org
regression on X86-64 with
flag_ira_loop_pressure = true.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-10 Zhenqiang Chen zhenqiang.c...@linaro.org
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno
= true.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-10 Zhenqiang Chen zhenqiang.c...@linaro.org
* loop-invariant.c (get_inv_cost): Skip invariants, which are marked
as move, from depends_on.
diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c
index e822bb6..fca9c2f
in move_invariant_reg.
Bootstrap and no make check regression on X86-64.
Bootstrap and no make check regression on X86-64 with
flag_ira_loop_pressure = true.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-10 Zhenqiang Chen zhenqiang.c...@linaro.org
* loop-invariant.c (find_invariant_insn
On 10 June 2014 19:01, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:55 AM, Zhenqiang Chen wrote:
* loop-invariant.c (find_invariant_insn): Skip invariants, which
can not make a valid insn during replacement in move_invariant_reg.
--- a/gcc/loop
On 10 June 2014 19:06, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:22 AM, Zhenqiang Chen wrote:
Hi,
For loop2-invariant pass, when flag_ira_loop_pressure is enabled,
function gain_for_invariant checks the pressures of all register
classes. This does not make sense
regression on X86-64 and ARM Chrome book.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-06-17 Zhenqiang Chen zhenqiang.c...@linaro.org
* cprop.c (try_replace_reg): Check cost for constants.
diff --git a/gcc/cprop.c b/gcc/cprop.c
index aef3ee8..c9cf02a 100644
--- a/gcc/cprop.c
+++ b/gcc
Ping?
Thanks!
-Zhenqiang
On 9 June 2014 17:08, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping ^2?
Thanks!
-Zhenqiang
On 28 May 2014 15:02, Zhenqiang Chen zhenqiang.c...@linaro.org wrote:
Ping?
Thanks!
-Zhenqiang
On 22 May 2014 17:52, Zhenqiang Chen zhenqiang.c...@linaro.org
On 17 June 2014 16:15, Richard Biener richard.guent...@gmail.com wrote:
On Tue, Jun 17, 2014 at 4:11 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Hi,
For some large constant, ports like ARM, need one more instructions to
operate it. e.g
#define MASK 0xfe00ff
void maskdata (int
On 18 June 2014 05:49, Jeff Law l...@redhat.com wrote:
On 06/11/14 04:05, Zhenqiang Chen wrote:
On 10 June 2014 19:06, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:22 AM, Zhenqiang Chen wrote:
Hi,
For loop2-invariant pass, when flag_ira_loop_pressure is enabled
On 10 June 2014 19:16, Steven Bosscher stevenb@gmail.com wrote:
On Tue, Jun 10, 2014 at 11:23 AM, Zhenqiang Chen wrote:
* loop-invariant.c (struct invariant): Add a new member: eqno;
(find_identical_invariants): Update eqno;
(create_new_invariant): Init eqno
On 28 January 2014 01:07, Ramana Radhakrishnan
ramana@googlemail.com wrote:
On Thu, Jan 16, 2014 at 5:44 AM, Zhenqiang Chen
zhenqiang.c...@linaro.org wrote:
Thanks for comments.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59837
The patch with a test case is attached.
+/* { dg-options
result is not used in a COND_EXPR, it calls cstorecc4 pattern
to store the CC to a general register.
Bootstrap and no make check regression on X86-64.
Is is OK for next stage1?
Thanks!
-Zhenqiang
ChangeLog:
2014-02-24 Zhenqiang Chen zhenqiang.c...@linaro.org
* cfgexpand.c
Zhenqiang Chen zhenqiang.c...@linaro.org
* config/aarch64/aarch64-modes.def (CC_DNE, CC_DEQ, CC_DLE, CC_DLT,
CC_DGE, CC_DGT, CC_DLEU, CC_DLTU, CC_DGEU, CC_DGTU): New modes.
* config/aarch64/aarch64-protos.h (aarch64_uimm5, aarch64_output_ccmp):
New prototypes.
* config/aarch64
:
2014-02-24 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/arm/arm-protos.h (arm_select_dominance_ccmp_mode,
arm_ccmode_to_code): New prototypes.
* config/arm/arm.c (arm_select_dominance_cc_mode_1): New function
extracted from arm_select_dominance_cc_mode
Please also check the two test cases in patch
https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg72712.html
Thanks!
-Zhenqiang
On 24 February 2014 17:11, Christian Bruel christian.br...@st.com wrote:
This patch improves the one sent previously,
size improvement for cortex-a9 and cortex-m4.
Is it OK?
Thanks!
-Zhenqiang
2014-02-25 Zhenqiang Chen zhenqiang.c...@arm.com
* config/arm/arm.c (arm_option_override): Set max_insns_skipped
to MAX_INSN_PER_IT_BLOCK when optimize_size for THUMB2.
testsuite/ChangeLog:
2014-02-25
on X84-64, ARM Chromebook and qemu-aarch64.
Is it OK for next stage1?
Thanks!
-Zhenqiang
ChangeLog:
2014-03-17 Zhenqiang Chen zhenqiang.c...@linaro.org
* ifcvt.c (struct noce_if_info): Add a new field ccmp_p.
(noce_emit_cmove): Allow ccmp condition.
(noce_get_alt_condition): Call
Hi,
For float value, movsfcc/movdfcc is required by emit_conditional_move
called in ifcvt pass to expand if-then-else to fcsel insn.
Bootstrap and no make check regression with qemu-aarch64.
Is it OK for next stage1?
Thanks!
-Zhenqiang
ChangeLog:
2014-03-18 Zhenqiang Chen zhenqiang.c
parts to
rtx parts[16];
Bootstrap and no make check regression on ARM Chrome book.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-03-19 Zhenqiang Chen zhenqiang.c...@linaro.org
* config/arm/arm.c (arm_dwarf_register_span): Update the element number
of parts.
testsuite/ChangeLog:
2014
Hi
The patch enables shrink-wrap for apcs frame.
Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
No make check regression with -g/-mapcs/-marm.
Build linux-3.14-rc7 without error.
Is it OK for next stage1?
Thanks!
-Zhenqiang
ChangeLog:
2014-03-25 Zhenqiang Chen
on X86-64.
No make check regression with Cortex-M0 qemu.
For CSiBE, ARM Cortex-m0 result is a little better. A little regression for
MIPS. Roughly no change for PowerPC.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-27 Zhenqiang Chen zhenqiang.c...@arm.com
* ifcvt.c
Thanks for the comments. All comments are accepted and the updated patch is
attached.
-Zhenqiang
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, October 11, 2014 11:00 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 1/10
Thanks for the comments. All comments are accepted and the updated patch is
attached.
-Zhenqiang
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, October 11, 2014 11:22 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 5/10
Thanks for the comments. Patch is updated.
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Richard Henderson
Sent: Saturday, October 11, 2014 11:03 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Saturday, October 11, 2014 11:32 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 6/10] aarch64: add ccmp CC mode
On 09/22/2014 11:44 PM, Zhenqiang Chen wrote:
+case
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 12:52 PM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 7/10] aarch64: add function to output ccmp
insn
On 10/11/2014 09:11 AM, Richard Henderson wrote
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 4:12 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 8/10] aarch64: ccmp insn patterns
On 09/22/2014 11:45 PM, Zhenqiang Chen wrote:
+(define_expand
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 4:46 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 9/10] aarch64: generate conditional compare
instructions
On 09/22/2014 11:46 PM, Zhenqiang Chen
-Original Message-
From: Richard Henderson [mailto:r...@redhat.com]
Sent: Sunday, October 12, 2014 5:40 AM
To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
Subject: Re: [Ping] [PATCH, 10/10] aarch64: Handle ccmp in ifcvt to make
it
work with cmov
On 09/22/2014 11:46 PM, Zhenqiang
Hi,
The patch enhances ifcvt to allow_cc_mode if HAVE_cbranchcc4.
Bootstrap and no make check regression on X86-64.
Will add new test cases after ccmp is enabled.
Ok for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-29 Zhenqiang Chen zhenqiang.c...@arm.com
* ifcvt.c (noce_emit_cmove
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