Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2017-03-23 Thread Ramana Radhakrishnan
On 07/02/17 14:49, Kyrill Tkachov wrote: On 18/01/17 09:49, Kyrill Tkachov wrote: On 19/12/16 14:53, Jakub Jelinek wrote: On Thu, Dec 15, 2016 at 10:00:14AM +, Richard Earnshaw (lists) wrote: sorry, pasted the wrong bit of code. That should read when we generate: (insn 55 19 67 3

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2017-03-14 Thread Kyrill Tkachov
On 07/02/17 14:49, Kyrill Tkachov wrote: On 18/01/17 09:49, Kyrill Tkachov wrote: On 19/12/16 14:53, Jakub Jelinek wrote: On Thu, Dec 15, 2016 at 10:00:14AM +, Richard Earnshaw (lists) wrote: sorry, pasted the wrong bit of code. That should read when we generate: (insn 55 19 67 3

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2017-02-07 Thread Kyrill Tkachov
On 18/01/17 09:49, Kyrill Tkachov wrote: On 19/12/16 14:53, Jakub Jelinek wrote: On Thu, Dec 15, 2016 at 10:00:14AM +, Richard Earnshaw (lists) wrote: sorry, pasted the wrong bit of code. That should read when we generate: (insn 55 19 67 3 (parallel [ (set (reg:SI 0 r0)

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2017-01-18 Thread Kyrill Tkachov
On 19/12/16 14:53, Jakub Jelinek wrote: On Thu, Dec 15, 2016 at 10:00:14AM +, Richard Earnshaw (lists) wrote: sorry, pasted the wrong bit of code. That should read when we generate: (insn 55 19 67 3 (parallel [ (set (reg:SI 0 r0) (mem/u/c:SI (reg/f:SI 147)

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-12-19 Thread Jakub Jelinek
On Thu, Dec 15, 2016 at 10:00:14AM +, Richard Earnshaw (lists) wrote: > sorry, pasted the wrong bit of code. > > That should read when we generate: > > (insn 55 19 67 3 (parallel [ > (set (reg:SI 0 r0) > (mem/u/c:SI (reg/f:SI 147) [2 c+0 S4 A32])) >

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-12-15 Thread Kyrill Tkachov
On 15/12/16 09:55, Richard Earnshaw (lists) wrote: On 30/11/16 16:47, Kyrill Tkachov wrote: Hi all, In this awkward ICE we have a *load_multiple pattern that is being transformed in reload from: (insn 55 67 151 3 (parallel [ (set (reg:SI 0 r0) (mem/u/c:SI

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-12-15 Thread Richard Earnshaw (lists)
On 15/12/16 09:55, Richard Earnshaw (lists) wrote: > On 30/11/16 16:47, Kyrill Tkachov wrote: >> Hi all, >> >> In this awkward ICE we have a *load_multiple pattern that is being >> transformed in reload from: >> (insn 55 67 151 3 (parallel [ >> (set (reg:SI 0 r0) >>

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-12-15 Thread Richard Earnshaw (lists)
On 30/11/16 16:47, Kyrill Tkachov wrote: > Hi all, > > In this awkward ICE we have a *load_multiple pattern that is being > transformed in reload from: > (insn 55 67 151 3 (parallel [ > (set (reg:SI 0 r0) > (mem/u/c:SI (reg/f:SI 147) [2 c+0 S4 A32])) > (set

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-12-15 Thread Kyrill Tkachov
Ping. Thanks, Kyrill On 08/12/16 11:55, Kyrill Tkachov wrote: Ping. https://gcc.gnu.org/ml/gcc-patches/2016-11/msg03078.html Thanks, Kyrill On 30/11/16 16:47, Kyrill Tkachov wrote: Hi all, In this awkward ICE we have a *load_multiple pattern that is being transformed in reload from: (insn

Re: [PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-12-08 Thread Kyrill Tkachov
Ping. https://gcc.gnu.org/ml/gcc-patches/2016-11/msg03078.html Thanks, Kyrill On 30/11/16 16:47, Kyrill Tkachov wrote: Hi all, In this awkward ICE we have a *load_multiple pattern that is being transformed in reload from: (insn 55 67 151 3 (parallel [ (set (reg:SI 0 r0)

[PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

2016-11-30 Thread Kyrill Tkachov
Hi all, In this awkward ICE we have a *load_multiple pattern that is being transformed in reload from: (insn 55 67 151 3 (parallel [ (set (reg:SI 0 r0) (mem/u/c:SI (reg/f:SI 147) [2 c+0 S4 A32])) (set (reg:SI 158 [ c+4 ]) (mem/u/c:SI