Okay I will take a look at this.
Michael Collison
> On Jun 30, 2017, at 11:04 AM, Andreas Schwab wrote:
>
>> On Jun 23 2017, Michael Collison wrote:
>>
>> diff --git a/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c
>>
On Jun 23 2017, Michael Collison wrote:
> diff --git a/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c
> b/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c
> new file mode 100644
> index 000..e2b020e
> --- /dev/null
> +++
On Fri, Jun 23, 2017 at 10:27:55AM +0100, Michael Collison wrote:
> Fixed the "nitpick" issues pointed out by James. Okay for trunk?
> > I have a few comments below, which are closer to nitpicking than structural
> > issues with the patch.
> >
> > With those fixed, this is OK to commit.
This
g>; GCC
Patches <gcc-patches@gcc.gnu.org>; nd <n...@arm.com>;
richard.sandif...@linaro.org
Subject: Re: [PATCH] [Aarch64] Variable shift count truncation issues
On Wed, Jun 21, 2017 at 04:42:00PM +0100, Richard Sandiford wrote:
> Michael Collison <michael.colli...@arm.com> wr
arm.com>, Wilco Dijkstra
<wilco.dijks...@arm.com>, Christophe Lyon <christophe.l...@linaro.org>, GCC
Patches <gcc-patches@gcc.gnu.org>, nd <n...@arm.com>,
richard.sandif...@linaro.org
Subject: Re: [PATCH] [Aarch64] Variable shift count truncation issues
User-Agent: Mutt/1.5.2
gt;; Christophe Lyon
> <christophe.l...@linaro.org>; GCC Patches <gcc-patches@gcc.gnu.org>; nd
> <n...@arm.com>
> Subject: Re: [PATCH] [Aarch64] Variable shift count truncation issues
>
> Michael Collison <michael.colli...@arm.com> writes:
>>
c: Wilco Dijkstra <wilco.dijks...@arm.com>; Christophe Lyon
<christophe.l...@linaro.org>; GCC Patches <gcc-patches@gcc.gnu.org>; nd
<n...@arm.com>
Subject: Re: [PATCH] [Aarch64] Variable shift count truncation issues
Michael Collison <michael.colli...@arm.com> writes:
>
Michael Collison writes:
> +(define_insn_and_split "*aarch64_reg_3_neg_mask2"
> + [(set (match_operand:GPI 0 "register_operand" "=r")
> + (SHIFT:GPI
> + (match_operand:GPI 1 "register_operand" "r")
> + (match_operator 4 "subreg_lowpart_operator"
> +
M
To: 'Richard Sandiford' <richard.sandif...@linaro.org>; Wilco Dijkstra
<wilco.dijks...@arm.com>; 'Christophe Lyon' <christophe.l...@linaro.org>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>; nd <n...@arm.com>
Subject: RE: [PATCH] [Aarch64] Variable shift count truncation
ay, May 23, 2017 7:25 AM
To: Wilco Dijkstra <wilco.dijks...@arm.com>
Cc: Michael Collison <michael.colli...@arm.com>; GCC Patches
<gcc-patches@gcc.gnu.org>; nd <n...@arm.com>
Subject: Re: [PATCH] [Aarch64] Variable shift count truncation issues
Wilco Dijkstra <wilco.
Wilco Dijkstra writes:
> Richard Sandiford wrote:
>
>> Insn patterns shouldn't check can_create_pseudo_p, because there's no
>> guarantee that the associated split happens before RA. In this case it
>> should be safe to reuse operand 0 after RA if you change it to:
>
>
Richard Sandiford wrote:
> Insn patterns shouldn't check can_create_pseudo_p, because there's no
> guarantee that the associated split happens before RA. In this case it
> should be safe to reuse operand 0 after RA if you change it to:
The goal is to only create and split this pattern before
Hi Michael,
On 19 May 2017 at 09:21, Richard Sandiford wrote:
> Thanks for doing this. Just a couple of comments about the .md stuff:
>
> Michael Collison writes:
>> diff --git a/gcc/config/aarch64/aarch64.md
Thanks for doing this. Just a couple of comments about the .md stuff:
Michael Collison writes:
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 5adc5ed..c6ae670 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++
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