The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77416
The patch was tested on ppc64 and bootstrapped on x86-64.
Committed as rev. 240247.
Index: ChangeLog
===================================================================
--- ChangeLog (revision 240246)
+++ ChangeLog (working copy)
@@ -1,3 +1,9 @@
+2016-09-19 Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/77416
+ * lra-remat.c (operand_to_remat): Process hard coded insn
+ registers.
+
2016-09-19 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* simplify-rtx.c (simplify_relational_operation_1): Add transformation
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog (revision 240246)
+++ testsuite/ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2016-09-19 Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/77416
+ * gcc.target/powerpc/pr77416.c: New.
+
2016-09-19 Patrick Palka <ppa...@gcc.gnu.org>
PR c++/77639
Index: lra-remat.c
===================================================================
--- lra-remat.c (revision 240246)
+++ lra-remat.c (working copy)
@@ -370,6 +370,22 @@ operand_to_remat (rtx_insn *insn)
+ hard_regno_nregs[reg->regno][reg->biggest_mode])))
return -1;
}
+ /* Check hard coded insn registers. */
+ for (struct lra_insn_reg *reg = static_id->hard_regs;
+ reg != NULL;
+ reg = reg->next)
+ if (reg->type == OP_INOUT)
+ return -1;
+ else if (reg->type == OP_IN)
+ {
+ /* Check that there is no output hard reg as the input
+ one. */
+ for (struct lra_insn_reg *reg2 = static_id->hard_regs;
+ reg2 != NULL;
+ reg2 = reg2->next)
+ if (reg2->type == OP_OUT && reg->regno == reg2->regno)
+ return -1;
+ }
/* Find the rematerialization operand. */
int nop = static_id->n_operands;
for (int i = 0; i < nop; i++)
Index: testsuite/gcc.target/powerpc/pr77416.c
===================================================================
--- testsuite/gcc.target/powerpc/pr77416.c (revision 0)
+++ testsuite/gcc.target/powerpc/pr77416.c (working copy)
@@ -0,0 +1,34 @@
+/* { dg-do compile { target { powerpc64*-*-*} } } */
+/* { dg-skip-if "" { powerpc64-*-aix* } { "*" } { "" } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc64*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-options "-mcpu=power7 -O2 -m32" } */
+/* { dg-final { scan-assembler-times "addze" 1 } } */
+
+extern int fn2 ();
+extern void fn3 ();
+extern void fn4 (int);
+int a, c, d, f, g, h, i, j, k, l, m, n;
+struct
+{
+ int escape;
+} *b;
+int e[8];
+void
+fn1 (int p1, int p2)
+{
+ int o = a;
+ for (; f; f++)
+ {
+ int p;
+ if (e[h])
+ continue;
+ if (fn2 (o, d, l, n, p1, i, j, k, 0==0))
+ continue;
+ p = p2;
+ if (b[g].escape)
+ p++;
+ fn3 ("", c, m);
+ if (k)
+ fn4 (p);
+ }
+}
