Re: Expansion of narrowing math built-ins into power instructions

2019-08-15 Thread Richard Sandiford
Tejas Joshi writes: > Hello. > I just wanted to make sure that I am looking at the correct code here. > Except for rtl.def where I should be introducing something like > float_contract (or float_narrow?) and also simplify-rtx.c, breakpoints > set on functions around expr.c, cfgexpand.c where I

Re: Expansion of narrowing math built-ins into power instructions

2019-08-15 Thread Tejas Joshi
Hello. I just wanted to make sure that I am looking at the correct code here. Except for rtl.def where I should be introducing something like float_contract (or float_narrow?) and also simplify-rtx.c, breakpoints set on functions around expr.c, cfgexpand.c where I grep for

Re: Expansion of narrowing math built-ins into power instructions

2019-08-15 Thread Tejas Joshi
> I think the code should instead be a fused addition and truncation, > a bit like FMA is a fused addition and multiplication. Describing it as > a DFmode addition followed by some conversion to SF would still involve > double rounding. In that case, something like FADD. But for functions like

Successful build of gcc 9.2.0 on x86_64-w64-mingw32

2019-08-15 Thread Rainer Emrich
Testresults can be seen here: https://gcc.gnu.org/ml/gcc-testresults/2019-08/msg01595.html Complete logs of the testsuite run are available here: https://cloud.emrich-ebersheim.de/index.php/s/g9D245XdCW6GD5W signature.asc Description: OpenPGP digital signature

Re: Indirect memory addresses vs. lra

2019-08-15 Thread Richard Biener
On August 15, 2019 6:29:13 PM GMT+02:00, Vladimir Makarov wrote: >On 8/10/19 2:05 AM, John Darrington wrote: >> On Fri, Aug 09, 2019 at 01:34:36PM -0400, Vladimir Makarov wrote: >> >> If you provide LRA dump for such test (it is better to use >> -fira-verbose=15 to output full

Re: Indirect memory addresses vs. lra

2019-08-15 Thread John Darrington
On Thu, Aug 15, 2019 at 12:29:13PM -0400, Vladimir Makarov wrote: Thank you for providing the sources.?? It helped me to understand what is going on.?? So the test crashes on /home/jmd/Source/GCC2/gcc/testsuite/gcc.c-torture/compile/pr53410-2.c: In function ???f1???:

Re: Indirect memory addresses vs. lra

2019-08-15 Thread Vladimir Makarov
On 8/10/19 2:05 AM, John Darrington wrote: On Fri, Aug 09, 2019 at 01:34:36PM -0400, Vladimir Makarov wrote: If you provide LRA dump for such test (it is better to use -fira-verbose=15 to output full RA info into stderr), I probably could say more. I've attached such a

Re: Indirect memory addresses vs. lra

2019-08-15 Thread John Darrington
On Thu, Aug 15, 2019 at 06:38:30PM +0200, Richard Biener wrote: Couldn't we spill the frame pointer? Basically we should be able to compute the first address into a reg, spill that, do the second (both could require the frame pointer), spill the frame pointer, reload the first

Re: Indirect memory addresses vs. lra

2019-08-15 Thread Segher Boessenkool
On Thu, Aug 15, 2019 at 02:30:19PM -0400, Vladimir Makarov wrote: > >Couldn't we spill the frame pointer? Basically we should be able to > >compute the first address into a reg, spill that, do the second (both > >could require the frame pointer), spill the frame pointer, reload the > >first

gcc-7-20190815 is now available

2019-08-15 Thread gccadmin
Snapshot gcc-7-20190815 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/7-20190815/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 7 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-7

Re: Expansion of narrowing math built-ins into power instructions

2019-08-15 Thread Segher Boessenkool
On Thu, Aug 15, 2019 at 01:47:47PM +0100, Richard Sandiford wrote: > Tejas Joshi writes: > > Hello. > > I just wanted to make sure that I am looking at the correct code here. > > Except for rtl.def where I should be introducing something like > > float_contract (or float_narrow?) and also

Re: Expansion of narrowing math built-ins into power instructions

2019-08-15 Thread Segher Boessenkool
On Thu, Aug 15, 2019 at 03:29:03PM +0530, Tejas Joshi wrote: > Also, in what manner should float_contract/narrow be different from > float_truncate as both are trying to do similar things? (truncation > from DF to SF) It's just a different name, nothing more, nothing less. Because it is a

Re: Indirect memory addresses vs. lra

2019-08-15 Thread Vladimir Makarov
On 8/15/19 1:35 PM, John Darrington wrote: On Thu, Aug 15, 2019 at 12:29:13PM -0400, Vladimir Makarov wrote: Thank you for providing the sources.?? It helped me to understand what is going on.?? So the test crashes on

Re: Indirect memory addresses vs. lra

2019-08-15 Thread Vladimir Makarov
On 8/15/19 12:38 PM, Richard Biener wrote: On August 15, 2019 6:29:13 PM GMT+02:00, Vladimir Makarov wrote: On 8/10/19 2:05 AM, John Darrington wrote: On Fri, Aug 09, 2019 at 01:34:36PM -0400, Vladimir Makarov wrote: If you provide LRA dump for such test (it is better to use

Successful builds of GCC 9.2 on Darwin

2019-08-15 Thread Iain Sandoe
Successful builds have been made on i686-darwin{9,10), powerpc-darwin9 x86_64-darwin{10,11,12,13,14,15,16,17,18} bootstrapped with GCC (including Ada) test results are from https://gcc.gnu.org/ml/gcc-testresults/2019-08/msg01662.html to

Re: [PATCH] Handle new operators with no arguments in DCE.

2019-08-15 Thread Richard Biener
On Thu, Aug 15, 2019 at 12:47 PM Martin Liška wrote: > > PING^1 OK > On 8/8/19 10:43 AM, Martin Liška wrote: > > On 8/7/19 4:12 PM, Richard Biener wrote: > >> On Wed, Aug 7, 2019 at 2:04 PM Martin Liška wrote: > >>> > >>> On 8/7/19 12:51 PM, Jakub Jelinek wrote: > On Wed, Aug 07, 2019 at

[Bug fortran/91390] treatment of extra parameter in a subroutine call

2019-08-15 Thread tkoenig at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91390 Thomas Koenig changed: What|Removed |Added Status|RESOLVED|ASSIGNED Blocks|

[Bug fortran/40976] Merge DECL of procedure call with DECL of gfc_get_function_type

2019-08-15 Thread tkoenig at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40976 Bug 40976 depends on bug 91390, which changed state. Bug 91390 Summary: treatment of extra parameter in a subroutine call https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91390 What|Removed |Added

[Bug c++/91445] [9 Regression] After memset, logical && operator produces false result, optimization level >=O1

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91445 --- Comment #11 from Richard Biener --- Author: rguenth Date: Thu Aug 15 12:05:31 2019 New Revision: 274533 URL: https://gcc.gnu.org/viewcvs?rev=274533=gcc=rev Log: 2019-08-15 Richard Biener PR tree-optimization/91445 *

[Bug sanitizer/91455] [10 Regression] Revision r274426 breaks bootstrap on darwin

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91455 Martin Liška changed: What|Removed |Added Keywords||patch Status|UNCONFIRMED

[Bug libstdc++/91456] std::function and std::is_invocable_r do not understand guaranteed elision

2019-08-15 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91456 Jonathan Wakely changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/91454] [10 Regression] ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481

2019-08-15 Thread ubizjak at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91454 --- Comment #8 from Uroš Bizjak --- *** Bug 91453 has been marked as a duplicate of this bug. ***

Re: Add ARRAY_REF based access patch disambiguation

2019-08-15 Thread Jan Hubicka
Hi, here is updated version. > > + /* We generally assume that both access paths starts by same sequence > > +of refs. However if number of array refs is not in sync, try > > +to recover and pop elts until number match. This helps the case > > +where one access path

[Bug target/91453] ICE in elimination_costs_in_insn at reload1.c:3547

2019-08-15 Thread ubizjak at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91453 Uroš Bizjak changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

Remove TARGET_SETUP_INCOMING_VARARG_BOUNDS

2019-08-15 Thread Richard Sandiford
TARGET_SETUP_INCOMING_VARARG_BOUNDS seems to be an unused vestige of the MPX support. Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install? Richard 2019-08-15 Richard Sandiford gcc/ * target.def (setup_incoming_vararg_bounds): Remove. * doc/tm.texi

[Bug tree-optimization/91457] FAIL: g++.dg/warn/Warray-bounds-4.C -std=gnu++98 (test for warnings, line 25)

2019-08-15 Thread danglin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91457 --- Comment #1 from John David Anglin --- Martin Sebor wrote on 2019-08-14: I don't know about the flifetime-dse2.C test but the Warray-bounds-4.C warning is the result of a recent enhancement to the strlen optimization, either r274486 or

[Bug tree-optimization/91457] New: FAIL: g++.dg/warn/Warray-bounds-4.C -std=gnu++98 (test for warnings, line 25)

2019-08-15 Thread danglin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91457 Bug ID: 91457 Summary: FAIL: g++.dg/warn/Warray-bounds-4.C -std=gnu++98 (test for warnings, line 25) Product: gcc Version: 10.0 Status: UNCONFIRMED Severity:

Re: [PATCH] Prevent LTO section collision for a symbol name starting with '*'.

2019-08-15 Thread Jan Hubicka
> On Fri, Aug 9, 2019 at 3:57 PM Martin Liška wrote: > > > > Hi. > > > > The patch is about prevention of LTO section name clashing. > > Now we have a situation where body of 2 functions is streamed > > into the same ELF section. Then we'll end up with smashed data. > > > > Patch can bootstrap on

[Bug target/91454] New: [10 Regression] ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91454 Bug ID: 91454 Summary: [10 Regression] ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481 Product: gcc Version: 10.0

[Bug target/91454] [10 Regression] ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91454 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug ipa/91447] FAIL: g++.dg/ipa/ipa-icf-4.C -std=gnu++98 scan-ipa-dump icf "(Unified; Variable alias has been created)|(Symbol aliases are not supported by target)"

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91447 --- Comment #2 from Martin Liška --- Created attachment 46716 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46716=edit Patch candidate @John: Can you please test it for me?

[Bug target/91446] Wrong cost for scalar_load/scalar_store of vector type

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91446 Richard Biener changed: What|Removed |Added CC||rguenth at gcc dot gnu.org --- Comment

[Bug ipa/91447] FAIL: g++.dg/ipa/ipa-icf-4.C -std=gnu++98 scan-ipa-dump icf "(Unified; Variable alias has been created)|(Symbol aliases are not supported by target)"

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91447 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug tree-optimization/91444] [10 regression] Many ICEs starting with r274404

2019-08-15 Thread rsandifo at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91444 rsandifo at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED

Re: [PATCHv4] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)

2019-08-15 Thread Richard Biener
On Wed, 14 Aug 2019, Bernd Edlinger wrote: > On 8/14/19 2:00 PM, Richard Biener wrote: > > On Thu, 8 Aug 2019, Bernd Edlinger wrote: > > > >> On 8/2/19 9:01 PM, Bernd Edlinger wrote: > >>> On 8/2/19 3:11 PM, Richard Biener wrote: > On Tue, 30 Jul 2019, Bernd Edlinger wrote: > > > >

[committed][AArch64] Tweak operand choice for SVE predicate AND

2019-08-15 Thread Richard Sandiford
SVE defines an assembly alias: MOV pa.B, pb/Z, pc.B -> AND pa.B. pb/Z, pc.B, pc.B Our and3 pattern was instead using the functionally-equivalent: AND pa.B. pb/Z, pb.B, pc.B This patch duplicates pc.B instead so that the alias can be seen in disassembly. I

[Bug tree-optimization/91444] [10 regression] Many ICEs starting with r274404

2019-08-15 Thread rsandifo at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91444 --- Comment #4 from rsandifo at gcc dot gnu.org --- Author: rsandifo Date: Thu Aug 15 09:23:06 2019 New Revision: 274524 URL: https://gcc.gnu.org/viewcvs?rev=274524=gcc=rev Log: Add missing check for BUILT_IN_MD (PR 91444) In this PR we were

[Bug ipa/91089] IPA-cp does not setup proper cost model for switch default case in function versioning

2019-08-15 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91089 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug ipa/91088] IPA-cp cost evaluation is too conservative for "if (f(param) cmp const_val)" condition

2019-08-15 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91088 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

Re: types for VR_VARYING

2019-08-15 Thread Aldy Hernandez
On 8/14/19 1:37 PM, Jeff Law wrote: On 8/13/19 6:39 PM, Aldy Hernandez wrote: On 8/12/19 7:46 PM, Jeff Law wrote: On 8/12/19 12:43 PM, Aldy Hernandez wrote: This is a fresh re-post of: https://gcc.gnu.org/ml/gcc-patches/2019-07/msg6.html Andrew gave me some feedback a week ago, and I 

[PATCH, i386]: Fix recent STV testsuite failures

2019-08-15 Thread Uros Bizjak
The COMPARE RTX has a special conversion procedure that applies only to DImode double-word operands. Do not convert single-word SImode and DImode operands for now. 2019-08-15 Uroš Bizjak * config/i386/i386-features.c (general_scalar_chain::convert_insn) : Revert 2019-08-14 change.

[patch, fortran] Fix PR 91443

2019-08-15 Thread Thomas Koenig
Hello world, this patch fixes PR 91443, in which we did not warn about a mismatched external procedure. The problem was that the module this was called in was resolved before parsing of the procedure ever started. The approach taken here is to move the checking of external procedures to a stage

[Bug c++/91436] Confusing suggestion to include

2019-08-15 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91436 --- Comment #4 from Jonathan Wakely --- Author: redi Date: Thu Aug 15 11:35:58 2019 New Revision: 274530 URL: https://gcc.gnu.org/viewcvs?rev=274530=gcc=rev Log: PR c++/91436 fix C++ dialect for std::make_unique fix-it hint The

[Bug c++/91436] Confusing suggestion to include

2019-08-15 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91436 Jonathan Wakely changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[COMMITTED] function.c (assign_parm_setup_reg): Handle misaligned stack arguments

2019-08-15 Thread Bernd Edlinger
Hi! This is another approved part from my patch "Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)" committed as "obvious". $ svn diff -r274530:274531 -x -p Index: gcc/ChangeLog === --- gcc/ChangeLog (Revision 274530) +++

Re: Patch to support extended characters in C/C++ identifiers

2019-08-15 Thread Joseph Myers
On Thu, 15 Aug 2019, Jason Merrill wrote: > On 8/12/19 6:01 PM, Lewis Hyatt wrote: > > Hello- > > > > The attached patch for libcpp adds support for extended characters (e.g. > > UTF-8) > > in identifiers. A preliminary version of the patch was posted on PR c/67224 > > as > > Comment 26

[Bug other/89856] `ld: warning: direct access to global weak symbol means the weak symbol cannot be overridden at runtime` using LTO with optimization and -fprofile-generate

2019-08-15 Thread zerolo at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89856 --- Comment #3 from Daniel Vollmer --- These linker warnings then also seem to result in actual address-sanitizer errors (which may or may not be spurious): (Output not from the provided example, but the shown

Re: [PATCHv4] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)

2019-08-15 Thread Richard Biener
On Thu, 15 Aug 2019, Bernd Edlinger wrote: > On 8/15/19 10:55 AM, Richard Biener wrote: > > On Wed, 14 Aug 2019, Bernd Edlinger wrote: > > > >> On 8/14/19 2:00 PM, Richard Biener wrote: > >> > >> Well, yes, but I was scared away by the complexity of emit_move_insn_1. > >> > >> It could be done,

Re: i386/asm-4 test: use amd64's natural addressing mode on all OSs

2019-08-15 Thread Alexandre Oliva
On Aug 15, 2019, Uros Bizjak wrote: > On Thu, Aug 15, 2019 at 1:39 PM Alexandre Oliva wrote: >> If we just use the best-suited way to >> take the address of a function behind the compiler's back on each >> target variant, we're less likely to hit unexpected failures. > Perhaps we should use

[Bug libstdc++/91371] std::bind and bind_front don't work with function with call convention

2019-08-15 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91371 --- Comment #5 from Jonathan Wakely --- I haven't fully tested this idea yet, but ... There are two kinds of function type we need to detect: referenceable functions, and abominable functions. A referenceable function type is a non-class type

[Bug c++/91436] Confusing suggestion to include

2019-08-15 Thread Hi-Angel at yandex dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91436 --- Comment #6 from Konstantin Kharlamov --- Thank you!

[Bug c++/91436] Confusing suggestion to include

2019-08-15 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91436 --- Comment #7 from Jonathan Wakely --- (In reply to Konstantin Kharlamov from comment #0) > When the reason for an undefined function is too low c++ standard, g++ still > suggests to include the header where it's supposed to be. N.B. this

address change

2019-08-15 Thread Alexandre Oliva
Oops, I forgot to update the MAINTAINERS file a couple of months ago, when the address there stopped working. Honestly, I haven't really had much involvement with the frv, mn10300 or sh ports for almost 15 years, so I wouldn't mind if someone else stepped up and took over, but until someone does,

[Bug tree-optimization/91091] [missed optimization] Missing optimization in unaliased pointers

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91091 --- Comment #5 from Richard Biener --- Author: rguenth Date: Thu Aug 15 12:02:47 2019 New Revision: 274532 URL: https://gcc.gnu.org/viewcvs?rev=274532=gcc=rev Log: 2019-08-15 Richard Biener PR tree-optimization/91445 *

[Bug c++/91445] [9 Regression] After memset, logical && operator produces false result, optimization level >=O1

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91445 --- Comment #9 from Richard Biener --- Author: rguenth Date: Thu Aug 15 12:02:47 2019 New Revision: 274532 URL: https://gcc.gnu.org/viewcvs?rev=274532=gcc=rev Log: 2019-08-15 Richard Biener PR tree-optimization/91445 *

Re: [PATCHv4] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)

2019-08-15 Thread Bernd Edlinger
On 8/15/19 10:55 AM, Richard Biener wrote: > On Wed, 14 Aug 2019, Bernd Edlinger wrote: > >> On 8/14/19 2:00 PM, Richard Biener wrote: >> >> Well, yes, but I was scared away by the complexity of emit_move_insn_1. >> >> It could be done, but in the moment I would be happy to have these >> checks

[Bug lto/91307] -flto causes binary to vary

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91307 --- Comment #8 from Richard Biener --- I wonder why we can't simply use .init_array and thus get away with a local symbol on targets that support this. Uh, so the symbol is already local but we're keeping it in our stripping process it seems.

[Bug sanitizer/91455] New: [10 Regression] Revision r274426 breaks bootstrap on darwin

2019-08-15 Thread dominiq at lps dot ens.fr
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91455 Bug ID: 91455 Summary: [10 Regression] Revision r274426 breaks bootstrap on darwin Product: gcc Version: 10.0 Status: UNCONFIRMED Severity: normal

Re: i386/asm-4 test: use amd64's natural addressing mode on all OSs

2019-08-15 Thread Uros Bizjak
On Thu, Aug 15, 2019 at 3:01 PM Alexandre Oliva wrote: > > On Aug 15, 2019, Uros Bizjak wrote: > > > On Thu, Aug 15, 2019 at 1:39 PM Alexandre Oliva wrote: > > >> If we just use the best-suited way to > >> take the address of a function behind the compiler's back on each > >> target variant,

[Bug c++/91448] FAIL: g++.dg/opt/flifetime-dse2.C -std=gnu++98 execution test

2019-08-15 Thread danglin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91448 --- Comment #4 from John David Anglin --- Discussion on excess errors for g++.dg/warn/Warray-bounds-4.C move to Bug 91457: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91457

[Bug sanitizer/91455] [10 Regression] Revision r274426 breaks bootstrap on darwin

2019-08-15 Thread iains at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91455 --- Comment #2 from Iain Sandoe --- Author: iains Date: Thu Aug 15 14:13:10 2019 New Revision: 274538 URL: https://gcc.gnu.org/viewcvs?rev=274538=gcc=rev Log: [libsanitizer] Fix PR bootstrap/91455 If a target does not support libbacktrace, it

[Bug tree-optimization/91458] New: FAIL: g++.dg/tree-ssa/pr19807.C -std=gnu++98 scan-tree-dump-times optimized "\\\\[\\\\(void .\\\\) \\\\+ 8B\\\\]" 3

2019-08-15 Thread danglin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91458 Bug ID: 91458 Summary: FAIL: g++.dg/tree-ssa/pr19807.C -std=gnu++98 scan-tree-dump-times optimized "[(void .) + 8B]" 3 Product: gcc Version:

[Bug tree-optimization/88398] vectorization failure for a small loop to do byte comparison

2019-08-15 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88398 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org ---

Re: types for VR_VARYING

2019-08-15 Thread Richard Biener
On Thu, Aug 15, 2019 at 12:40 PM Aldy Hernandez wrote: > > On 8/14/19 1:37 PM, Jeff Law wrote: > > On 8/13/19 6:39 PM, Aldy Hernandez wrote: > >> > >> > >> On 8/12/19 7:46 PM, Jeff Law wrote: > >>> On 8/12/19 12:43 PM, Aldy Hernandez wrote: > This is a fresh re-post of: > >

Re: [patch][aarch64]: add intrinsics for vld1(q)_x4 and vst1(q)_x4

2019-08-15 Thread Kyrill Tkachov
Hi all, On 8/6/19 10:51 AM, Richard Earnshaw (lists) wrote: On 18/07/2019 18:18, James Greenhalgh wrote: > On Mon, Jun 10, 2019 at 06:21:05PM +0100, Sylvia Taylor wrote: >> Greetings, >> >> This patch adds the intrinsic functions for: >> - vld1__x4 >> - vst1__x4 >> - vld1q__x4 >> - vst1q__x4 >>

i386/asm-4 test: use amd64's natural addressing mode on all OSs

2019-08-15 Thread Alexandre Oliva
gcc.target/i386/asm-4.c uses amd64's natural PC-relative addressing mode on a single platform, using the 32-bit absolute addressing mode elsewhere. There's no point in giving up amd64's natural addressing mode and insisting on the 32-bit one when we're targeting amd64, and having to make explicit

[Bug c++/91445] [9 Regression] After memset, logical && operator produces false result, optimization level >=O1

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91445 Richard Biener changed: What|Removed |Added Status|ASSIGNED|RESOLVED Known to work|

[Bug libstdc++/91456] New: std::function and std::is_invocable_r do not understand guaranteed elision

2019-08-15 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91456 Bug ID: 91456 Summary: std::function and std::is_invocable_r do not understand guaranteed elision Product: gcc Version: 9.1.1 Status: UNCONFIRMED Keywords:

Re: PR90724 - ICE with __sync_bool_compare_and_swap with -march=armv8.2-a

2019-08-15 Thread Prathamesh Kulkarni
On Thu, 8 Aug 2019 at 11:22, Prathamesh Kulkarni wrote: > > On Thu, 1 Aug 2019 at 15:34, Prathamesh Kulkarni > wrote: > > > > On Thu, 25 Jul 2019 at 11:56, Prathamesh Kulkarni > > wrote: > > > > > > On Wed, 17 Jul 2019 at 18:15, Prathamesh Kulkarni > > > wrote: > > > > > > > > On Wed, 17 Jul

Re: i386/asm-4 test: use amd64's natural addressing mode on all OSs

2019-08-15 Thread Alexandre Oliva
On Aug 15, 2019, Uros Bizjak wrote: > The immediate of lea is limited to +-2GB ... and we're talking about a code offset within a tiny translation unit, with both reference and referenced address within the same section. It would be very surprising if the offset got up to 2KB, let alone 2GB

Re: Remove TARGET_SETUP_INCOMING_VARARG_BOUNDS

2019-08-15 Thread Richard Biener
On Thu, Aug 15, 2019 at 3:30 PM Richard Sandiford wrote: > > TARGET_SETUP_INCOMING_VARARG_BOUNDS seems to be an unused vestige of the > MPX support. > > Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install? OK. > Richard > > > 2019-08-15 Richard Sandiford > > gcc/ > *

Re: [PATCH 2/9] operand_equal_p: add support for FIELD_DECL

2019-08-15 Thread Jan Hubicka
> On Tue, Aug 6, 2019 at 5:44 PM Martin Liska wrote: > > > > > > gcc/ChangeLog: > > So I suppose this isn't to call operand_equal_p on two FIELD_DECLs > but to make two COMPONENT_REFs "more equal"? If so I then yes. The patch originates from my original patchset I believe and it is what ICF

[libsanitizer, comitted] Fix PR bootstrap/91455

2019-08-15 Thread Iain Sandoe
If a target does not support libbacktrace, it might still need the include for $(top_srcdir). Regenerate the built files using automake-1.15.1 bootstrapped on x86_64-darwin16, x86_64-linux-gnu and powerpc64-linux-gnu (with a fix for pr90639 applied for this). Iain libsanitizer/ 2019-08-15

Re: [PATCH] Make cdtor names stable for LTO (PR lto/91307).

2019-08-15 Thread Jan Hubicka
> On Thu, Aug 1, 2019 at 3:10 PM Martin Liška wrote: > > > > Hi. > > > > In LTO WPA mode we don't have to append temp file name > > to the global cdtor function names. > > Is that true? You can link with -r -flinker-output=rel and use > multiple WPA phases whose results you then finally link. >

Re: [PATCHv4] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)

2019-08-15 Thread Bernd Edlinger
On 8/15/19 2:54 PM, Richard Biener wrote: > On Thu, 15 Aug 2019, Bernd Edlinger wrote: > > > Hmm. So your patch overrides user-alignment here. Woudln't it > be better to do that more conciously by > > if (! DECL_USER_ALIGN (decl) > || (align < GET_MODE_ALIGNMENT

Re: [PATCH 3/9] operand_equal_p: add support for OBJ_TYPE_REF.

2019-08-15 Thread Jan Hubicka
> On Tue, Aug 6, 2019 at 5:43 PM Martin Liska wrote: > > > > > > gcc/ChangeLog: > > + /* Virtual table call. */ > + case OBJ_TYPE_REF: > + { > + if (!operand_equal_p (OBJ_TYPE_REF_EXPR (arg0), > + OBJ_TYPE_REF_EXPR (arg1), flags)) >

[Bug other/89856] `ld: warning: direct access to global weak symbol means the weak symbol cannot be overridden at runtime` using LTO with optimization and -fprofile-generate

2019-08-15 Thread zerolo at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89856 --- Comment #2 from Daniel Vollmer --- I'm seeing the same warning in a similar context when using the address-sanitizer, e.g. > cat lib.cpp #include #include inline const std::string () { static const std::string str = "abc"; return

[C++ PATCH] Implement P0848R3, Conditionally Trivial Special Member Functions.

2019-08-15 Thread Jason Merrill
With Concepts, overloads of special member functions can differ in constraints, and this paper clarifies how that affects class properties: if a class has a more constrained trivial copy constructor and a less constrained non-trivial copy constructor, it is still trivially copyable. Tested

Re: i386/asm-4 test: use amd64's natural addressing mode on all OSs

2019-08-15 Thread Uros Bizjak
On Thu, Aug 15, 2019 at 1:39 PM Alexandre Oliva wrote: > > gcc.target/i386/asm-4.c uses amd64's natural PC-relative addressing > mode on a single platform, using the 32-bit absolute addressing mode > elsewhere. There's no point in giving up amd64's natural addressing > mode and insisting on the

Re: types for VR_VARYING

2019-08-15 Thread Aldy Hernandez
On 8/15/19 7:23 AM, Richard Biener wrote: On Thu, Aug 15, 2019 at 12:40 PM Aldy Hernandez wrote: On 8/14/19 1:37 PM, Jeff Law wrote: On 8/13/19 6:39 PM, Aldy Hernandez wrote: On 8/12/19 7:46 PM, Jeff Law wrote: On 8/12/19 12:43 PM, Aldy Hernandez wrote: This is a fresh re-post of:

[Bug sanitizer/91455] [10 Regression] Revision r274426 breaks bootstrap on darwin

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91455 Richard Biener changed: What|Removed |Added Target Milestone|--- |10.0

Re: [PATCH 0/3] Libsanitizer: merge from trunk

2019-08-15 Thread Martin Liška
On 8/15/19 12:21 PM, Iain Sandoe wrote: > 2) As noted on IRC, the version of automake used in the merge is 1.16.1 but > the GCC prereqs are for 1.15.1. If it’s intended that automake-1.16.1 should > be used could this requirement be documented somewhere? Thank you for heads up. Yes, I should

[Bug target/91454] [10 Regression] ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91454 --- Comment #7 from Richard Biener --- Author: rguenth Date: Thu Aug 15 12:44:23 2019 New Revision: 274535 URL: https://gcc.gnu.org/viewcvs?rev=274535=gcc=rev Log: 2019-08-15 Richard Biener PR target/91454 *

[Bug target/91454] [10 Regression] ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91454 Richard Biener changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/91453] ICE in elimination_costs_in_insn at reload1.c:3547

2019-08-15 Thread ubizjak at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91453 --- Comment #1 from Uroš Bizjak --- Are you sure? It compiles OK with gcc-9 for me.

[committed][MSP430] Fix non-GNU style in gcc/config/msp430/*{c,h} files

2019-08-15 Thread Jozef Lawrynowicz
The attached committed patches fix various GNU style violations in the msp430 backend. The fixed problems include: - Incorrect indentation - Whitespace before left square bracket - 8 spaces used instead of tab - Whitespace before closing parenthesis - Lines more than 80 characters long

[Bug target/91453] ICE in elimination_costs_in_insn at reload1.c:3547

2019-08-15 Thread ubizjak at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91453 --- Comment #2 from Uroš Bizjak --- Latest SVN creates the following RTX in _.ira dump: (insn 144 12 145 2 (set (subreg:V2DI (reg:DI 161) 0) (vec_merge:V2DI (vec_duplicate:V2DI (reg:DI 111 [ ubound.0 ])) (const_vector:V2DI [

[Bug ipa/91447] [10 Regression] FAIL: g++.dg/ipa/ipa-icf-4.C -std=gnu++98 scan-ipa-dump icf

2019-08-15 Thread dave.anglin at bell dot net
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91447 --- Comment #3 from dave.anglin at bell dot net --- On 2019-08-15 3:32 a.m., marxin at gcc dot gnu.org wrote: > Created attachment 46716 > --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46716=edit > Patch candidate > > @John: Can you please

Re: [PATCHv4] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544)

2019-08-15 Thread Richard Biener
On Thu, 15 Aug 2019, Richard Biener wrote: > On Thu, 15 Aug 2019, Bernd Edlinger wrote: > > > > > > We can't subset an SSA_NAME. I have really no idea what this intended > > > to do... > > > > > > > Nice, so would you do a patch to change that to a > > gcc_checking_assert (TREE_CODE (tem) !=

[Bug tree-optimization/91444] [10 regression] Many ICEs starting with r274404

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91444 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[committed][AArch64] Remove unneeded FSUB alternatives and add a new one

2019-08-15 Thread Richard Sandiford
The floating-point subtraction patterns don't need to handle subtraction of constants, since those go through the addition patterns instead. There was a missing MOVPRFX alternative for FSUBR though. Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. Applied as r274514.

[PATCH] Fix PR91445

2019-08-15 Thread Richard Biener
This fixes a regression for GCC 9 which was fixed along modifications on trunk. The patch backports some refactoring and hereby the relevant change, - if (*disambiguate_only) + /* If we are looking for redundant stores do not create new hashtable + entries from aliasing defs with made up

Re: [PATCH][i386] Fix PR91454, unrecognized insn

2019-08-15 Thread Uros Bizjak
On Thu, Aug 15, 2019 at 1:09 PM Richard Biener wrote: > > > The following fixes non-recognized RTL gegerated since my STV > changes. I've added a helper instead of enlarging the code > even more. > > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. > > OK? > > Thanks, > Richard. >

[Bug preprocessor/91451] Do not warn about duplicate __STDC_WANT_* definitions

2019-08-15 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91451 Richard Biener changed: What|Removed |Added Keywords||diagnostic

[Bug target/82328] x86 rdrand: flags not used directly when branching on success/failure

2019-08-15 Thread marxin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82328 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

use __builtin_alloca, drop non-standard alloca.h

2019-08-15 Thread Alexandre Oliva
Since alloca.h is not ISO C, most of our alloca-using tests seem to rely on __builtin_alloca instead of including the header and calling alloca. This patch extends this practice to some of the exceptions I found in gcc.target, marking them as requiring a functional alloca while at that. Tested

[committed][AArch64] Use SVE MLA, MLS, MAD and MSB for conditional arithmetic

2019-08-15 Thread Richard Sandiford
This patch uses predicated MLA, MLS, MAD and MSB to implement conditional "FMA"s on integers. This also requires providing the unpredicated optabs (fma and fnma) since otherwise tree-ssa-math-opts.c won't try to use the conditional forms. We still want to use shifts and adds in preference to

[committed][AArch64] Pass a pattern to aarch64_output_sve_cnt_immediate

2019-08-15 Thread Richard Sandiford
This patch makes us always pass an explicit vector pattern to aarch64_output_sve_cnt_immediate, rather than assuming it's ALL. The ACLE patches need to be able to pass in other values. Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. Applied as r274520. Richard 2019-08-15

[committed][AArch64] Add more unpredicated MOVPRFX alternatives

2019-08-15 Thread Richard Sandiford
FABD and some immediate instructions were missing MOVPRFX alternatives. This is tested by the ACLE patches but is really an independent improvement. Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. Applied as r274513. Richard 2019-08-15 Richard Sandiford

[committed][AArch64] Rework SVE REV[BHW] patterns

2019-08-15 Thread Richard Sandiford
The current SVE REV patterns follow the AArch64 scheme, in which UNSPEC_REV reverses elements within an -bit granule. E.g. UNSPEC_REV64 on VNx8HI reverses the four 16-bit elements within each 64-bit granule. The native SVE scheme is the other way around: UNSPEC_REV64 is seen as an operation on

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