Title: gnetlist bug report
Hi folks,
I've discovered what I suspect to be a bug with gnetlist.
When a net connects two pins of a device, but does not connect to any other devices, gnetlist "forgets" about one of the pins it's connected to.
The attached dataset exhibits the problem.
Run `g
Hi Peter,
Peter Brett writes:
> [...]
> I've discovered what I suspect to be a bug with gnetlist.
>
> When a net connects two pins of a device, but does not connect to
> any other devices, gnetlist "forgets" about one of the pins it's
> connected to.
> [...]
I can not reproduce the proble
> What version of gEDA are you using?
gEDA/gnetlist version 20050313
> Could you please reduce your example to just a few nets and
> symbols and explain us what to look for (such as 'good' and
> 'bad' netlist)?
$ head output.net
.PCB
.REM CREATED BY gEDA GNETLIST
.CON
.COD 2
.RE
Hi again,
Peter Brett writes:
> [...]
>
> $ head output.net
> .PCB
> .REM CREATED BY gEDA GNETLIST
> .CON
> .COD 2
>
> .REM FPCBUS_1
> J1 E25
> .REM FPCBUS_3
> J1 E24
> .REM FPCBUS_5
>
> What I'm expecting is (c.f. the schematic itself):
>
> .PCB
> .RE
I am very new here. So please guide me if I am off...
I tried the following on iv 0.8 (winxp):
--
module latch1 (clk, d, q);
input clk, d;
output q;
reg q;
always @ (clk or d) begin
if (clk == 1'b1) begin
q = d;
end
end
endmodule
--
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
CN wrote:
| --
| module latch1 (clk, d, q);
| input clk, d;
| output q;
| reg q;
|
| always @ (clk or d) begin
|if (clk == 1'b1) begin
| q = d;
|end
| end
|
| endmodule
| --
|
| With the command line
| iverilog -tfpga -p
Wow! Prompt response! Thank you, Steve!
Are both the errors because of the latch? Or does iv always require the else clause? In my second example the else clause error went away when I added the else...
Well, I am trying to sythesize a latch. Could you please give me some idea how comp
People,
I've installed Pcb-20050315 using a CDROM disk created from a gEDA
download. The "geda-install" directory resides at /usr/tools/ and as
far as I can tell, the other gEDA tools I have been using function
properly, especially gschem, gnetlist (in its various forms), and Icarus
Verilog, all
Gsch2pcb's default directories are hardcoded into the /usr/local
hierarchy. If your footprints don't live in the expected places, you
can specify where they live using a "projectrc" file. For example, my
projectrc file holds this:
schematics OptProxSensor_1.sch
m4-pcbdir /usr/local/geda/share/p
Hi, This is my first post as a user so I hope I can be forgiven if what I
have to say sounds a bit naive.
I have been designing electronics for many years now, and have recently
decided to start-up on my own a PCB designer.
The idea of creating open source schematic capture and layout programs is
Hello people.
I'm using PCB for small projects, and recently acquired a laser printer,
half justifying it to print PCB boards.
When I print the postscript file out of PCB with Ghostview, traces are
too wide and there seems to be a problem with rounding. Importing the file
into Gimp at 600dpi, the
Assuming you're printing the same postscript file with two different
print options, it's highly likely that your postscript rasterizer
isn't using the highest resolution your printer supports. See if
whichever printer control panel you're using has a resolution option
and set it to 600dpi.
If yo
Stuart,
Thanks for the information. When I started to create a projectrc file,
I found that these provisions had been included in the project file
documented in gsch2pcb tutorial and shown by gsch2pcb --help. A simple
modification of the project file that I was using took care of the
problem.
I
You say to-may-to, I say to-mah-to;
You say project, I say projectrc. . .
Glad to help!
Stuart
>
> Stuart,
>
> Thanks for the information. When I started to create a projectrc file,
> I found that these provisions had been included in the project file
> documented in gsch2pcb tutorial and s
I had the same problem on a lo-end Brother HL10-h & a hi-end Lexmark
W810. it was like a plumbing maze with no elbows.
ggv was OK with postscript & pdf. My final film output was thru a
Harlequin RIP & Dainippon FT-R3050 film processor & it was fine, so I
didn't pursue it...
--
Greg Cunningham
On
15 matches
Mail list logo