[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Create system file for RISCV FS

Hello kokoro, Alec Roelke, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/19828 to look at the new patch set (#10). Change subject: arch-riscv: Create system file for RISCV FS

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update register file

Hello Alec Roelke, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20128 to look at the new patch set (#2). Change subject: arch-riscv: Update register file

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add Gicv3Distributor members for GICv3 GICD_PIDRx

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20253 to review the following change. Change subject: dev-arm: Add Gicv3Distributor members for GICv3 GICD_PIDRx

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add GITS_PIDR2 register to the ITS memory map

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20254 to review the following change. Change subject: dev-arm: Add GITS_PIDR2 register to the ITS memory map

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Replace direct use cpsr.el with currEL helper

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20251 to review the following change. Change subject: arch-arm: Replace direct use cpsr.el with currEL helper

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Rewrite the currEL helper method to use opModeToEL

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20249 to review the following change. Change subject: arch-arm: Rewrite the currEL helper method to use opModeToEL

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Overload currEL helper with CPSR argument

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20250 to review the following change. Change subject: arch-arm: Overload currEL helper with CPSR argument

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Replace occ of opModeToEL(currOpMode/cpsr) with currEL

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20252 to review the following change. Change subject: arch-arm: Replace occ of opModeToEL(currOpMode/cpsr) with currEL

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add redistributor-stride property to GICv3

Hello Andreas Sandberg, Ciro Santilli, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20248 to review the following change. Change subject: dev-arm: Add redistributor-stride property to GICv3

[gem5-dev] Change in gem5/gem5[master]: mem-ruby, arch-hsail: Removed hit latency from VIPERCoalescer

Anthony Gutierrez has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/19148 ) Change subject: mem-ruby, arch-hsail: Removed hit latency from VIPERCoalescer .. mem-ruby, arch-hsail: Removed hit

Re: [gem5-dev] Setting the CNTFRQ register in the ARM bootloader

Hi Gabe, Just had a look at specifications. You are right, it is definitely a bug. Giacomo From: gem5-dev on behalf of Gabe Black Sent: 19 August 2019 07:03 To: gem5 Developer List ; Chun-Chen TK Hsu Subject: [gem5-dev] Setting the CNTFRQ register in the ARM

[gem5-dev] Cron /z/m5/regression/do-regression quick

See /z/m5/regression/regress-2019-08-19-03:00:01 for details. ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Setting the CNTFRQ register in the ARM bootloader

Hi ARM folks. We're trying to make sure we're setting up the CNTFRQ register properly in a fast model CPU we're hooking up to gem5, and I believe we have the simulator part of that set up properly. We have the input for the non core components of the model running at a fixed frequency, and during