Hi all,
I (finally) finished rebasing and updating the changes based on the
feedback. Thank you all for your help on this!
On the to do list before merging:
- Some more comments that may need a bit of back and forth (especially from
Andreas as of 5/26)
- Run the nightly and weekly tests on the
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/59152 )
Change subject: sim, arch: Remove Fault debug flag
..
sim, arch: Remove Fault debug flag
There is
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/59151 )
Change subject: arch-arm: Memoize computeAddrTop in the MMU code
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arch-arm: Memoize computeAddrTop in
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/59149 )
Change subject: base: Add generic Memoizer class
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base: Add generic Memoizer class
This class
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/59150 )
Change subject: arch-arm: Split purifyTaggedAddr in two sub-functions
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arch-arm: Split purifyTaggedAddr
Yu-hsin Wang has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/58810 )
Change subject: dev: Add a special reset interface to consolidate reset
logic
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dev: Add a special reset interface to
Yu-hsin Wang has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/58813 )
Change subject: fastmodel: Add CortexR52 model reset port
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fastmodel: Add CortexR52 model reset port
The model reset is
Yu-hsin Wang has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/58814 )
Change subject: fastmodel: Add CortexA76 model reset port
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fastmodel: Add CortexA76 model reset port
The model reset is