[gem5-dev] Change in gem5/gem5[develop]: arch,kern,sim: Move the stats in Kernel::Statistics to Workload.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/25147 )
Change subject: arch,kern,sim: Move the stats in Kernel::Statistics to
Workload.
..
arch,kern,sim: Move the stats in Kernel::Statistics to Workload.
These are the stats in the base class, not in any derived classes. Only
Alpha has an additional stats. These were not really "kernel"
statistics, they were just applicable primarily in FS. They are
potentially applicable to any simulation, but will probably not be
incremented in SE simulations.
Also this merges these stats from being per thread to being per
workload, ie operating system instance. This is probably more relevant
since exactly what thread within a workload runs which particular
instruction is not very important/predictable, but the aggregate
behavior is. If necessary, this could be adjusted in the future to
split things back out again into stats per thread while keeping them
inside the single workload object.
Change-Id: I130e11a9022bdfcadcfb02c7995871503114cd53
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25147
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
Tested-by: kokoro
---
M src/arch/sparc/ua2005.cc
M src/cpu/thread_context.cc
M src/kern/SConscript
D src/kern/kernel_stats.cc
M src/kern/kernel_stats.hh
M src/sim/pseudo_inst.cc
M src/sim/workload.hh
7 files changed, 33 insertions(+), 81 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 1c1dcc2..b0b9f59 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -28,7 +28,6 @@
#include "arch/sparc/interrupts.hh"
#include "arch/sparc/isa.hh"
-#include "arch/sparc/kernel_stats.hh"
#include "arch/sparc/registers.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
@@ -36,7 +35,6 @@
#include "cpu/thread_context.hh"
#include "debug/Quiesce.hh"
#include "debug/Timer.hh"
-#include "sim/full_system.hh"
#include "sim/system.hh"
using namespace SparcISA;
@@ -232,8 +230,9 @@
DPRINTF(Quiesce, "Cpu executed quiescing instruction\n");
// Time to go to sleep
tc->suspend();
-if (FullSystem && tc->getKernelStats())
-tc->getKernelStats()->quiesce();
+auto *workload = tc->getSystemPtr()->workload;
+if (workload)
+workload->recordQuiesce();
}
break;
diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index 9b93d75..1930739 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -133,8 +133,9 @@
DPRINTF(Quiesce, "%s: quiesce()\n", getCpuPtr()->name());
suspend();
-if (getKernelStats())
-getKernelStats()->quiesce();
+auto *workload = getSystemPtr()->workload;
+if (workload)
+workload->recordQuiesce();
}
@@ -150,8 +151,9 @@
DPRINTF(Quiesce, "%s: quiesceTick until %lu\n", cpu->name(), resume);
suspend();
-if (getKernelStats())
-getKernelStats()->quiesce();
+auto *workload = getSystemPtr()->workload;
+if (workload)
+workload->recordQuiesce();
}
void
diff --git a/src/kern/SConscript b/src/kern/SConscript
index 9c549a1..3d5872b 100644
--- a/src/kern/SConscript
+++ b/src/kern/SConscript
@@ -31,7 +31,6 @@
if env['TARGET_ISA'] == 'null':
Return()
-Source('kernel_stats.cc')
Source('linux/events.cc')
Source('linux/linux.cc')
Source('linux/helpers.cc')
diff --git a/src/kern/kernel_stats.cc b/src/kern/kernel_stats.cc
deleted file mode 100644
index 4a70b04..000
--- a/src/kern/kernel_stats.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2004-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL,
[gem5-dev] Change in gem5/gem5[develop]: arch,cpu,sim: Eliminate the now empty kernel statistics classes.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/25149 )
Change subject: arch,cpu,sim: Eliminate the now empty kernel statistics
classes.
..
arch,cpu,sim: Eliminate the now empty kernel statistics classes.
This includes the base and ISA specific Kernel::Statistics classes, the
plumbing through ThreadContext to access them, and the switching
header file associated with them.
Change-Id: Ia511a59325b629aa9ccc0e695ddd47ff11916499
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25149
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
Tested-by: kokoro
---
M src/arch/SConscript
M src/arch/arm/fastmodel/iris/thread_context.hh
D src/arch/arm/kernel_stats.hh
M src/arch/mips/idle_event.cc
D src/arch/mips/kernel_stats.hh
D src/arch/power/kernel_stats.hh
M src/arch/riscv/idle_event.cc
D src/arch/riscv/kernel_stats.hh
D src/arch/sparc/kernel_stats.hh
D src/arch/x86/kernel_stats.hh
M src/cpu/checker/cpu.cc
M src/cpu/checker/thread_context.hh
M src/cpu/o3/cpu.cc
M src/cpu/o3/thread_context.hh
M src/cpu/o3/thread_context_impl.hh
M src/cpu/simple_thread.cc
M src/cpu/simple_thread.hh
M src/cpu/thread_context.cc
M src/cpu/thread_context.hh
M src/cpu/thread_state.cc
M src/cpu/thread_state.hh
D src/kern/kernel_stats.hh
M src/sim/system.cc
23 files changed, 8 insertions(+), 461 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/SConscript b/src/arch/SConscript
index 13ab8fb..978f72a 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -60,7 +60,6 @@
decoder.hh
isa.hh
isa_traits.hh
-kernel_stats.hh
locked_mem.hh
microcode_rom.hh
pseudo_inst.hh
diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh
b/src/arch/arm/fastmodel/iris/thread_context.hh
index 6b16069..5a4efd5 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -216,12 +216,6 @@
panic("%s not implemented.", __FUNCTION__);
}
-Kernel::Statistics *
-getKernelStats() override
-{
-panic("%s not implemented.", __FUNCTION__);
-}
-
PortProxy () override { return *physProxy; }
PortProxy () override { return *virtProxy; }
void initMemProxies(::ThreadContext *tc) override;
diff --git a/src/arch/arm/kernel_stats.hh b/src/arch/arm/kernel_stats.hh
deleted file mode 100644
index 4eb10a5..000
--- a/src/arch/arm/kernel_stats.hh
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2004-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_ARM_KERNEL_STATS_HH__
-#define __ARCH_ARM_KERNEL_STATS_HH__
-
-#include "kern/kernel_stats.hh"
-
-namespace ArmISA {
-namespace Kernel {
-
-class Statistics : public ::Kernel::Statistics
-{
- public:
-Statistics() : ::Kernel::Statistics()
-{}
-};
-
-} // namespace ArmISA::Kernel
-} // namespace ArmISA
-
-#endif // __ARCH_ARM_KERNEL_STATS_HH__
diff --git a/src/arch/mips/idle_event.cc b/src/arch/mips/idle_event.cc
index 6c593bd..a2b3b0c 100644
--- a/src/arch/mips/idle_event.cc
+++ b/src/arch/mips/idle_event.cc
@@ -28,7 +28,6 @@
#include "arch/mips/idle_event.hh"
-#include "arch/mips/kernel_stats.hh"
#include "cpu/thread_context.hh"
using namespace MipsISA;
diff --git
[gem5-dev] Change in gem5/gem5[develop]: sim: Initialize stackSize and stackMin in MemState
Matthew Poremba has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/30394 )
Change subject: sim: Initialize stackSize and stackMin in MemState
..
sim: Initialize stackSize and stackMin in MemState
Initialize _stackSize and _stackMin to the maximum stack size values.
The are setup in each arch's Process::initState and may be uninitialized
until then. If a stack fixup occurs before these are setup, addresses
which are not in the stack might be allocated on the stack. This
prevents that until they are initialized in Process::initState. If an
access occurs before that with these initial values, the stack fixup
will simply allocate a page of memory in the stack space. However, it
will not print the typical info messages about growing the stack during
this time.
Change-Id: I9f9316734f4bf1f773fc538922e83b867731c684
JIRA: https://gem5.atlassian.net/browse/GEM5-629
---
M src/sim/mem_state.cc
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/sim/mem_state.cc b/src/sim/mem_state.cc
index bfee9da..bcfab78 100644
--- a/src/sim/mem_state.cc
+++ b/src/sim/mem_state.cc
@@ -43,7 +43,8 @@
Addr mmap_end)
: _ownerProcess(owner),
_pageBytes(owner->system->getPageBytes()), _brkPoint(brk_point),
- _stackBase(stack_base), _maxStackSize(max_stack_size),
+ _stackBase(stack_base), _stackSize(max_stack_size),
+ _maxStackSize(max_stack_size), _stackMin(stack_base -
max_stack_size),
_nextThreadStackBase(next_thread_stack_base),
_mmapEnd(mmap_end), _endBrkPoint(brk_point)
{
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/30394
To unsubscribe, or for help writing mail filters, visit
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9f9316734f4bf1f773fc538922e83b867731c684
Gerrit-Change-Number: 30394
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: util,tests: Added compiler test script
Bobby R. Bruce has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/30395 )
Change subject: util,tests: Added compiler test script
..
util,tests: Added compiler test script
This script runs a series of compilations on gem5. The following
compilers are tested:
clang-9
clang-8
clang-7
clang-6
clang-5
clang-4
clang-3.9
gcc-9
gcc-8
gcc-7
gcc-6
gcc-5
gcc-4.8 (to be dropped soon:
https://gem5.atlassian.net/browse/GEM5-218)
They are tested by building the following build targets:
ARM
ARM_MESI_Three_Level
Garnet_standalone
GCN3_X86
HSAIL_X86
MIPS
NULL_MESI_Two_Level
NULL_MOESI_CMP_directory
NULL_MOESI_CMP_token
NULL_MOESI_hammer
POWER
RISCV
SPARC
X86
X86_MOESI_AMD_BASE
For each, ".opt" and ".fast" compiler build settings are tested.
clang-9 and gcc-9 are tested against all targets with each build
setting. For the remaining compilers, a random build target is
chosen. After the script has run, the output of the tests can be
found in "compile-test-out".
Docker is required to run this script.
Change-Id: Id3bf4c89b9d424c87e9409930ee2aceaef72cb29
---
A util/compiler-tests.sh
1 file changed, 131 insertions(+), 0 deletions(-)
diff --git a/util/compiler-tests.sh b/util/compiler-tests.sh
new file mode 100755
index 000..06d4f96
--- /dev/null
+++ b/util/compiler-tests.sh
@@ -0,0 +1,131 @@
+#!/bin/bash
+
+# This script will run all our supported compilers (see the "images" set)
+# against gem5. The "ubuntu-20.04_all-dependencies" and "clang-version-9"
+# images are run against all built targets. The remainder are evaluated
+# against a random shuffling of built targets.
+
+DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
+GEM5_ROOT="${DIR}/.."
+NUM_CORES=`nproc`
+
+# All Docker images in the gem5 testing GCR which we want to compile with.
+images=("ubuntu-20.04_all-dependencies" # Uses GCC-9
+"clang-version-9"
+"gcc-version-8"
+"gcc-version-7"
+"gcc-version-6"
+"gcc-version-5"
+"gcc-version-4.8"
+"clang-version-8"
+"clang-version-7"
+"clang-version-6.0"
+"clang-version-5.0"
+"clang-version-4.0"
+"clang-version-3.9" )
+
+# A subset of the above list: these images will build against every target,
+# ignoring buildsPerCompiler.
+comprehensive=("ubuntu-20.04_all-dependencies"
+ "clang-version-9")
+
+# All build targets in build_opt/ which we want to build using each image.
+builds=("ARM"
+"ARM_MESI_Three_Level"
+"Garnet_standalone"
+"GCN3_X86"
+"HSAIL_X86"
+"MIPS"
+"NULL_MESI_Two_Level"
+"NULL_MOESI_CMP_directory"
+"NULL_MOESI_CMP_token"
+"NULL_MOESI_hammer"
+"POWER"
+"RISCV"
+"SPARC"
+"X86"
+"X86_MOESI_AMD_Base")
+
+# The optimizations to use for each build target.
+opts=(".opt"
+ ".fast")
+
+# The number of build targets to randomly pull from the build target list
for
+# each compiler. To perform a full comprehensive test which covers every
+# possible pair of compiler and build target, set buildsPerCompiler equal
to
+# the expression ${#builds[@]}.
+buildsPerCompiler=1
+
+# Base URL of the gem5 testing images.
+base_url="gcr.io/gem5-test"
+
+# Arguments passed into scons on every build target test.
+build_args="-j ${NUM_CORES}"
+
+# Testing directory variables
+test_dir_final="${GEM5_ROOT}/compile-test-out"
+test_dir="${GEM5_ROOT}/.compile-test-out"
+exits="${test_dir}/exit-codes.csv"
+
+# Create the testing output directory and files
+rm -rf $test_dir_final
+rm -rf $test_dir
+mkdir $test_dir
+touch $exits
+echo "compiler,build_target,exit_code" >> $exits
+
+for compiler in ${images[@]}; do
+echo "Starting build tests with '$compiler'..."
+# Generate a randomized list of build targets
+build_permutation=($(shuf -i 0-$((${#builds[@]} - 1)) ))
+
+buildsCount=$buildsPerCompiler
+if [[ " ${comprehensive[@]} " =~ " $compiler " ]]; then
+echo "'$compiler' was found in the comprehensive tests. All ISAs
will be built."
+buildsCount=${#builds[@]}
+fi
+
+# Slice the first $buildsCount entries of the permutation to get our
+# targets for this test
+build_indices=(${build_permutation[@]:0:$buildsCount})
+
+repo_name="$base_url/$compiler"
+
+# Grab compiler image
+docker pull $repo_name >/dev/null
+
+mkdir "$test_dir/$compiler"
+
+# Clean any builds, if present
+rm -rf "${GEM5_ROOT}/build"
+
+for build_index in ${build_indices[@]}; do
+for build_opt in ${opts[@]}; do
+build="${builds[$build_index]}"
+build_dir="build/$build/gem5$build_opt"
+build_stdout="$test_dir/$compiler/$build$build_opt.stdout"
+build_stderr="$test_dir/$compiler/$build$build_opt.stderr"
+
+touch $build_stdout
+touch
[gem5-dev] Change in gem5/gem5[develop]: mem: fixupAddr should not panic if it fails.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30376 )
Change subject: mem: fixupAddr should not panic if it fails.
..
mem: fixupAddr should not panic if it fails.
This function should just return false in that case, and its callers
should figure out what to do. Otherwise, when calling tryReadBlob in SE
mode, a failure to read the blob makes gem5 panic instead of just
returning false.
Change-Id: I74b9cb98f595c52300d683842ece68c6031d9b85
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30376
Reviewed-by: Sandipan Das
Reviewed-by: Matthew Poremba
Maintainer: Gabe Black
Tested-by: kokoro
---
M src/mem/se_translating_port_proxy.cc
1 file changed, 1 insertion(+), 2 deletions(-)
Approvals:
Matthew Poremba: Looks good to me, approved
Sandipan Das: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/se_translating_port_proxy.cc
b/src/mem/se_translating_port_proxy.cc
index bc1153e..a8a42d0 100644
--- a/src/mem/se_translating_port_proxy.cc
+++ b/src/mem/se_translating_port_proxy.cc
@@ -62,6 +62,5 @@
return true;
}
}
-panic("Page table fault when accessing virtual address %#x "
- "during functional write.", addr);
+return false;
}
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/30376
To unsubscribe, or for help writing mail filters, visit
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I74b9cb98f595c52300d683842ece68c6031d9b85
Gerrit-Change-Number: 30376
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Matthew Poremba
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-Reviewer: Sandipan Das
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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