date:20180502

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

2018-05-02 Thread Alec Roelke (Gerrit)


Hello Gabe Black, Tuan Ta, Robert Scheffel,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/7441

to look at the new patch set (#9).

Change subject: arch-riscv: Update CSR implementations
..

arch-riscv: Update CSR implementations

This patch updates the CSRs to match the RISC-V privileged specification
version 1.10. As interrupts, faults, and privilege levels are not yet
supported, there are no meaninful side effects that are implemented.
Performance counters are also not yet implemented, as they do not have
specifications. Currently they act as cycle counters.

Note that this implementation trusts software to use the registers
properly. Access protection, readability, and writeability of registers
based on privilege will come in a future patch.

Change-Id: I1de89bdbe369b5027911b2e6bc0425d3acaa708a
---
M src/arch/riscv/insts/standard.cc
M src/arch/riscv/isa.cc
M src/arch/riscv/isa.hh
M src/arch/riscv/isa/decoder.isa
M src/arch/riscv/isa/formats/standard.isa
M src/arch/riscv/isa/includes.isa
M src/arch/riscv/process.cc
M src/arch/riscv/registers.hh
M src/arch/riscv/remote_gdb.cc
9 files changed, 738 insertions(+), 425 deletions(-)


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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I1de89bdbe369b5027911b2e6bc0425d3acaa708a
Gerrit-Change-Number: 7441
Gerrit-PatchSet: 9
Gerrit-Owner: Alec Roelke 
Gerrit-Reviewer: Alec Roelke 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Robert Scheffel 
Gerrit-Reviewer: Tuan Ta 
Gerrit-MessageType: newpatchset
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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntps/movntpd SSE insts

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/9861 )


Change subject: arch-x86: implement movntps/movntpd SSE insts
..

arch-x86: implement movntps/movntpd SSE insts

These are non-temporal packed SSE stores.

Change-Id: I526cd6551b38d6d35010bc6173f23d017106b466
Reviewed-on: https://gem5-review.googlesource.com/9861
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
---
M src/arch/x86/isa/decoder/two_byte_opcodes.isa
M  
src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py

2 files changed, 31 insertions(+), 4 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved



diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa  
b/src/arch/x86/isa/decoder/two_byte_opcodes.isa

index 761e838..339e5a0 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -383,7 +383,7 @@
 0x0: MOVAPS(Vq,Wq);
 0x1: MOVAPS(Wq,Vq);
 0x2: CVTPI2PS(Vq,Qq);
-0x3: WarnUnimpl::movntps_Mo_Vo();
+0x3: MOVNTPS(Mq,Vq);
 0x4: CVTTPS2PI(Pq,Wq);
 0x5: CVTPS2PI(Pq,Wq);
 0x6: UCOMISS(Vd,Wd);
@@ -401,7 +401,7 @@
 0x0: MOVAPD(Vo,Wo);
 0x1: MOVAPD(Wo,Vo);
 0x2: CVTPI2PD(Vo,Qq);
-0x3: WarnUnimpl::movntpd_Mo_Vo();
+0x3: MOVNTPD(Mq,Vq);
 0x4: CVTTPD2PI(Pq,Wo);
 0x5: CVTPD2PI(Pq,Wo);
 0x6: UCOMISD(Vq,Wq);
diff --git  
a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py  
b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py

index 063be91..a6e392f 100644
---  
a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py
+++  
b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py

@@ -1,4 +1,5 @@
 # Copyright (c) 2007 The Hewlett-Packard Development Company
+# Copyright (c) 2015, 2018 Advanced Micro Devices, Inc.
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -34,8 +35,34 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 # Authors: Gabe Black
+#  Steve Reinhardt

 microcode = '''
-# MOVNTPS
-# MOVNTPD
+# movntps is basically the same as movaps, excepting the caching hint and
+# ordering constraints
+def macroop MOVNTPS_M_XMM {
+# Check low address.
+stfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8, uncacheable=True
+stfp xmml, seg, sib, disp, dataSize=8, uncacheable=True
+};
+
+def macroop MOVNTPS_P_XMM {
+rdip t7
+# Check low address.
+stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8,  
uncacheable=True

+stfp xmml, seg, riprel, disp, dataSize=8, uncacheable=True
+};
+
+# movntpd is basically the same as movapd, excepting the caching hint and
+# ordering constraints
+def macroop MOVNTPD_M_XMM {
+stfp xmml, seg, sib, "DISPLACEMENT", dataSize=8, uncacheable=True
+stfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8, uncacheable=True
+};
+
+def macroop MOVNTPD_P_XMM {
+rdip t7
+stfp xmml, seg, riprel, "DISPLACEMENT", dataSize=8, uncacheable=True
+stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8,  
uncacheable=True

+};
 '''

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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I526cd6551b38d6d35010bc6173f23d017106b466
Gerrit-Change-Number: 9861
Gerrit-PatchSet: 5
Gerrit-Owner: Anthony Gutierrez 
Gerrit-Reviewer: Anthony Gutierrez 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Steve Reinhardt 
Gerrit-CC: Jason Lowe-Power 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: x86: Add a ld/st microop flag for marking an access uncacheable.

2018-05-02 Thread Gabe Black (Gerrit)

Gabe Black has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/9881 )


Change subject: x86: Add a ld/st microop flag for marking an access  
uncacheable.

..

x86: Add a ld/st microop flag for marking an access uncacheable.

This percolates down to the memory request object which will have its
"UNCACHEABLE" flag set.

Change-Id: Ie73f4249bfcd57f45a473f220d0988856715a9ce
Reviewed-on: https://gem5-review.googlesource.com/9881
Reviewed-by: Anthony Gutierrez 
Reviewed-by: Jason Lowe-Power 
Maintainer: Anthony Gutierrez 
---
M src/arch/x86/isa/microops/ldstop.isa
1 file changed, 22 insertions(+), 15 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve
  Anthony Gutierrez: Looks good to me, approved; Looks good to me, approved



diff --git a/src/arch/x86/isa/microops/ldstop.isa  
b/src/arch/x86/isa/microops/ldstop.isa

index 83e24e1..60c6d29 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -295,7 +295,7 @@
 class LdStOp(X86Microop):
 def __init__(self, data, segment, addr, disp,
 dataSize, addressSize, baseFlags, atCPL0, prefetch,  
nonSpec,

-implicitStack):
+implicitStack, uncacheable):
 self.data = data
 [self.scale, self.index, self.base] = addr
 self.disp = disp
@@ -311,6 +311,8 @@
 self.instFlags += " | (1ULL << StaticInst::IsDataPrefetch)"
 if nonSpec:
 self.instFlags += " | (1ULL <<  
StaticInst::IsNonSpeculative)"

+if uncacheable:
+self.instFlags += " | (Request::UNCACHEABLE)"
 # For implicit stack operations, we should use *not* use the
 # alternative addressing mode for loads/stores if the prefix  
is set

 if not implicitStack:
@@ -335,7 +337,7 @@
 class BigLdStOp(X86Microop):
 def __init__(self, data, segment, addr, disp,
 dataSize, addressSize, baseFlags, atCPL0, prefetch,  
nonSpec,

-implicitStack):
+implicitStack, uncacheable):
 self.data = data
 [self.scale, self.index, self.base] = addr
 self.disp = disp
@@ -351,6 +353,8 @@
 self.instFlags += " | (1ULL << StaticInst::IsDataPrefetch)"
 if nonSpec:
 self.instFlags += " | (1ULL <<  
StaticInst::IsNonSpeculative)"

+if uncacheable:
+self.instFlags += " | (Request::UNCACHEABLE)"
 # For implicit stack operations, we should use *not* use the
 # alternative addressing mode for loads/stores if the prefix  
is set

 if not implicitStack:
@@ -383,10 +387,10 @@
 class LdStSplitOp(LdStOp):
 def __init__(self, data, segment, addr, disp,
 dataSize, addressSize, baseFlags, atCPL0, prefetch,  
nonSpec,

-implicitStack):
+implicitStack, uncacheable):
 super(LdStSplitOp, self).__init__(0, segment, addr, disp,
 dataSize, addressSize, baseFlags, atCPL0, prefetch,  
nonSpec,

-implicitStack)
+implicitStack, uncacheable)
 (self.dataLow, self.dataHi) = data

 def getAllocator(self, microFlags):
@@ -466,10 +470,10 @@
 dataSize="env.dataSize",
 addressSize=addressSize,
 atCPL0=False, prefetch=False, nonSpec=nonSpec,
-implicitStack=implicitStack):
+implicitStack=implicitStack, uncacheable=False):
 super(LoadOp, self).__init__(data, segment, addr,
 disp, dataSize, addressSize, mem_flags,
-atCPL0, prefetch, nonSpec, implicitStack)
+atCPL0, prefetch, nonSpec, implicitStack,  
uncacheable)

 self.className = Name
 self.mnemonic = name

@@ -547,10 +551,10 @@
 dataSize="env.dataSize",
 addressSize="env.addressSize",
 atCPL0=False, prefetch=False, nonSpec=nonSpec,
-implicitStack=False):
+implicitStack=False, uncacheable=False):
 super(LoadOp, self).__init__(data, segment, addr,
 disp, dataSize, addressSize, mem_flags,
-atCPL0, prefetch, nonSpec, implicitStack)
+atCPL0, prefetch, nonSpec, implicitStack,  
uncacheable)

 self.className = Name
 self.mnemonic = name

@@ -601,10 +605,11 @@
 def __init__(self, data, segment, addr, disp = 0,
 dataSize="env.dataSize",
 addressSize=addressSize,
-

[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has uploaded a new patch set (#4). (  
https://gem5-review.googlesource.com/10222 )


Change subject: gpu-compute: Cleanup the scheduler a bit
..

gpu-compute: Cleanup the scheduler a bit

Change-Id: If2c626544f208e15c91be975dee9253126862ced
---
M src/gpu-compute/SConscript
D src/gpu-compute/of_scheduling_policy.cc
M src/gpu-compute/of_scheduling_policy.hh
D src/gpu-compute/rr_scheduling_policy.cc
M src/gpu-compute/rr_scheduling_policy.hh
M src/gpu-compute/schedule_stage.cc
M src/gpu-compute/scheduler.cc
M src/gpu-compute/scheduler.hh
M src/gpu-compute/scheduling_policy.hh
9 files changed, 159 insertions(+), 255 deletions(-)


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Gerrit-Change-Number: 10222
Gerrit-PatchSet: 4
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Gerrit-MessageType: newpatchset
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[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has uploaded a new patch set (#3). (  
https://gem5-review.googlesource.com/10222 )


Change subject: gpu-compute: Cleanup the scheduler a bit
..

gpu-compute: Cleanup the scheduler a bit

Change-Id: If2c626544f208e15c91be975dee9253126862ced
---
M src/gpu-compute/SConscript
D src/gpu-compute/of_scheduling_policy.cc
M src/gpu-compute/of_scheduling_policy.hh
D src/gpu-compute/rr_scheduling_policy.cc
M src/gpu-compute/rr_scheduling_policy.hh
M src/gpu-compute/schedule_stage.cc
M src/gpu-compute/scheduler.cc
M src/gpu-compute/scheduler.hh
M src/gpu-compute/scheduling_policy.hh
9 files changed, 158 insertions(+), 255 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has uploaded a new patch set (#2). (  
https://gem5-review.googlesource.com/10222 )


Change subject: gpu-compute: Cleanup the scheduler a bit
..

gpu-compute: Cleanup the scheduler a bit

Change-Id: If2c626544f208e15c91be975dee9253126862ced
---
M src/gpu-compute/SConscript
D src/gpu-compute/of_scheduling_policy.cc
M src/gpu-compute/of_scheduling_policy.hh
D src/gpu-compute/rr_scheduling_policy.cc
M src/gpu-compute/rr_scheduling_policy.hh
M src/gpu-compute/schedule_stage.cc
M src/gpu-compute/scheduler.cc
M src/gpu-compute/scheduler.hh
M src/gpu-compute/scheduling_policy.hh
9 files changed, 158 insertions(+), 255 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has uploaded this change for review. (  
https://gem5-review.googlesource.com/10222



Change subject: gpu-compute: Cleanup the scheduler a bit
..

gpu-compute: Cleanup the scheduler a bit

Change-Id: If2c626544f208e15c91be975dee9253126862ced
---
M src/gpu-compute/SConscript
D src/gpu-compute/of_scheduling_policy.cc
M src/gpu-compute/of_scheduling_policy.hh
D src/gpu-compute/rr_scheduling_policy.cc
M src/gpu-compute/rr_scheduling_policy.hh
M src/gpu-compute/schedule_stage.cc
M src/gpu-compute/scheduler.cc
M src/gpu-compute/scheduler.hh
M src/gpu-compute/scheduling_policy.hh
9 files changed, 152 insertions(+), 255 deletions(-)



diff --git a/src/gpu-compute/SConscript b/src/gpu-compute/SConscript
index 8cf1ed8..73d0a66 100644
--- a/src/gpu-compute/SConscript
+++ b/src/gpu-compute/SConscript
@@ -65,9 +65,7 @@
 Source('kernel_cfg.cc')
 Source('lds_state.cc')
 Source('local_memory_pipeline.cc')
-Source('of_scheduling_policy.cc')
 Source('pool_manager.cc')
-Source('rr_scheduling_policy.cc')
 Source('schedule_stage.cc')
 Source('scheduler.cc')
 Source('scoreboard_check_stage.cc')
diff --git a/src/gpu-compute/of_scheduling_policy.cc  
b/src/gpu-compute/of_scheduling_policy.cc

deleted file mode 100644
index 7f11470..000
--- a/src/gpu-compute/of_scheduling_policy.cc
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * For use for simulation and test purposes only
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are  
met:

- *
- * 1. Redistributions of source code must retain the above copyright  
notice,

- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright  
notice,
- * this list of conditions and the following disclaimer in the  
documentation

- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its  
contributors

- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS  
IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,  
THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR  
PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS  
BE

- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF  
THE

- * POSSIBILITY OF SUCH DAMAGE.
- *
- * Author: Sooraj Puthoor
- */
-
-#include "gpu-compute/of_scheduling_policy.hh"
-
-#include "gpu-compute/wavefront.hh"
-
-Wavefront*
-OFSchedulingPolicy::chooseWave()
-{
-// Set when policy choose a wave to schedule
-bool waveChosen = false;
-Wavefront *selectedWave = nullptr;
-int selectedWaveID = -1;
-uint32_t selectedPosition = 0;
-
-for (int position = 0; position < scheduleList->size(); ++position) {
-Wavefront *curWave = scheduleList->at(position);
-uint32_t curWaveID = curWave->wfDynId;
-
-// Choosed wave with the lowest wave ID
-if (selectedWaveID == -1 || curWaveID < selectedWaveID) {
-waveChosen = true;
-selectedWaveID = curWaveID;
-selectedWave = curWave;
-selectedPosition = position;
-}
-}
-
-// Check to make sure ready list had atleast one schedulable wave
-if (waveChosen) {
-scheduleList->erase(scheduleList->begin() + selectedPosition);
-} else {
-panic("Empty ready list");
-}
-
-return selectedWave;
-}
-
-void
-OFSchedulingPolicy::bindList(std::vector *list)
-{
-scheduleList = list;
-}
diff --git a/src/gpu-compute/of_scheduling_policy.hh  
b/src/gpu-compute/of_scheduling_policy.hh

index 94b5fdc..34d4686 100644
--- a/src/gpu-compute/of_scheduling_policy.hh
+++ b/src/gpu-compute/of_scheduling_policy.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
+ * Copyright (c) 2014-2017 Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * For use for simulation and test purposes only
@@ -14,9 +14,9 @@
  * this list of conditions and the following disclaimer in the  
documentation

  * and/or other materials provided with the distribution.
  *
- * 3. Neither the name of the copyright holder nor the names of its  
contributors

- * may be used to endorse or

[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Consistent dprintf formats for issue outcomes

2018-05-02 Thread Anthony Gutierrez (Gerrit)


Hello Jason Lowe-Power, Bradford Beckmann,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/10221

to look at the new patch set (#3).

Change subject: mem-ruby: Consistent dprintf formats for issue outcomes
..

mem-ruby: Consistent dprintf formats for issue outcomes

Change-Id: I053fc42f0d5f678f8e3434b53a0f09e00fc3e345
---
M src/mem/ruby/system/RubyPort.cc
1 file changed, 4 insertions(+), 3 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Consistent dprintf formats for issue outcomes

2018-05-02 Thread Anthony Gutierrez (Gerrit)


Hello Jason Lowe-Power, Bradford Beckmann,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/10221

to look at the new patch set (#2).

Change subject: mem-ruby: Consistent dprintf formats for issue outcomes
..

mem-ruby: Consistent dprintf formats for issue outcomes

Change-Id: I053fc42f0d5f678f8e3434b53a0f09e00fc3e345
---
M src/mem/ruby/system/RubyPort.cc
1 file changed, 4 insertions(+), 3 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: ruby: consistent dprintf formats for issue outcomes

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has uploaded this change for review. (  
https://gem5-review.googlesource.com/10221



Change subject: ruby: consistent dprintf formats for issue outcomes
..

ruby: consistent dprintf formats for issue outcomes

Change-Id: I053fc42f0d5f678f8e3434b53a0f09e00fc3e345
---
M src/mem/ruby/system/RubyPort.cc
1 file changed, 4 insertions(+), 3 deletions(-)



diff --git a/src/mem/ruby/system/RubyPort.cc  
b/src/mem/ruby/system/RubyPort.cc

index 5977ce9..248bf1e 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -299,15 +299,16 @@
 // route the response
 pkt->pushSenderState(new SenderState(this));

-DPRINTF(RubyPort, "Request %s 0x%x issued\n", pkt->cmdString(),
+DPRINTF(RubyPort, "Request %s address %#x issued\n",  
pkt->cmdString(),

 pkt->getAddr());
 return true;
 }

 if (pkt->cmd != MemCmd::MemFenceReq) {
 DPRINTF(RubyPort,
-"Request for address %#x did not issued because %s\n",
-pkt->getAddr(), RequestStatus_to_string(requestStatus));
+"Request %s for address %#x did not issued because %s\n",
+pkt->cmdString(), pkt->getAddr(),
+RequestStatus_to_string(requestStatus));
 }

 addToRetryList();

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Gerrit-Owner: Anthony Gutierrez 
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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Enable fstatfs for x86_64

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has uploaded this change for review. (  
https://gem5-review.googlesource.com/10201



Change subject: arch-x86: Enable fstatfs for x86_64
..

arch-x86: Enable fstatfs for x86_64

Change-Id: Ic871f852c4892f2228f0d9bb3cc5cb66887d9736
---
M src/arch/x86/linux/process.cc
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/arch/x86/linux/process.cc b/src/arch/x86/linux/process.cc
index 1bde67e..815b655 100644
--- a/src/arch/x86/linux/process.cc
+++ b/src/arch/x86/linux/process.cc
@@ -358,7 +358,7 @@
 /* 135 */ SyscallDesc("personality", unimplementedFunc),
 /* 136 */ SyscallDesc("ustat", unimplementedFunc),
 /* 137 */ SyscallDesc("statfs", statfsFunc),
-/* 138 */ SyscallDesc("fstatfs", unimplementedFunc),
+/* 138 */ SyscallDesc("fstatfs", fstatfsFunc),
 /* 139 */ SyscallDesc("sysfs", unimplementedFunc),
 /* 140 */ SyscallDesc("getpriority", unimplementedFunc),
 /* 141 */ SyscallDesc("setpriority", ignoreFunc),

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Gerrit-Change-Id: Ic871f852c4892f2228f0d9bb3cc5cb66887d9736
Gerrit-Change-Number: 10201
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Gerrit-Owner: Anthony Gutierrez 
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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Enable the umask system call

2018-05-02 Thread Anthony Gutierrez (Gerrit)

Anthony Gutierrez has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/10161 )


Change subject: arch-x86: Enable the umask system call
..

arch-x86: Enable the umask system call

Change-Id: I309beb1604657e8d1807ac90458709df57f0f819
Reviewed-on: https://gem5-review.googlesource.com/10161
Reviewed-by: Gabe Black 
Reviewed-by: Jason Lowe-Power 
Maintainer: Brandon Potter 
---
M src/arch/x86/linux/process.cc
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  Brandon Potter: Looks good to me, approved



diff --git a/src/arch/x86/linux/process.cc b/src/arch/x86/linux/process.cc
index 1bde67e..d464beb 100644
--- a/src/arch/x86/linux/process.cc
+++ b/src/arch/x86/linux/process.cc
@@ -315,7 +315,7 @@
 /*  92 */ SyscallDesc("chown", unimplementedFunc),
 /*  93 */ SyscallDesc("fchown", unimplementedFunc),
 /*  94 */ SyscallDesc("lchown", unimplementedFunc),
-/*  95 */ SyscallDesc("umask", unimplementedFunc),
+/*  95 */ SyscallDesc("umask", umaskFunc),
 /*  96 */ SyscallDesc("gettimeofday", gettimeofdayFunc),
 /*  97 */ SyscallDesc("getrlimit", getrlimitFunc),
 /*  98 */ SyscallDesc("getrusage", getrusageFunc),
@@ -609,7 +609,7 @@
 /*  57 */ SyscallDesc("setpgid", setpgidFunc),
 /*  58 */ SyscallDesc("ulimit", unimplementedFunc),
 /*  59 */ SyscallDesc("oldolduname", unimplementedFunc),
-/*  60 */ SyscallDesc("umask", unimplementedFunc),
+/*  60 */ SyscallDesc("umask", umaskFunc),
 /*  61 */ SyscallDesc("chroot", unimplementedFunc),
 /*  62 */ SyscallDesc("ustat", unimplementedFunc),
 /*  63 */ SyscallDesc("dup2", dup2Func),

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Gerrit-Change-Number: 10161
Gerrit-PatchSet: 2
Gerrit-Owner: Anthony Gutierrez 
Gerrit-Reviewer: Anthony Gutierrez 
Gerrit-Reviewer: Brandon Potter 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Create Sector Cache

2018-05-02 Thread Daniel Carvalho (Gerrit)


Hello Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/9741

to look at the new patch set (#3).

Change subject: mem-cache: Create Sector Cache
..

mem-cache: Create Sector Cache

Implementation of Sector Caches, i.e., a cache with multiple
sequential data entries per tag entry for Set Associtive
placement policies.

This patch does not implement the sector functionality for FALRU.

Change-Id: I8e1e9448fa44ba308ccb16cd5bcc5fd36c988feb
---
M src/mem/cache/blk.cc
M src/mem/cache/blk.hh
M src/mem/cache/cache.cc
A src/mem/cache/sector_blk.hh
M src/mem/cache/tags/SConscript
M src/mem/cache/tags/Tags.py
M src/mem/cache/tags/base.hh
M src/mem/cache/tags/base_set_assoc.cc
M src/mem/cache/tags/base_set_assoc.hh
A src/mem/cache/tags/sector_tags.cc
A src/mem/cache/tags/sector_tags.hh
11 files changed, 651 insertions(+), 198 deletions(-)


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Gerrit-Change-Id: I8e1e9448fa44ba308ccb16cd5bcc5fd36c988feb
Gerrit-Change-Number: 9741
Gerrit-PatchSet: 3
Gerrit-Owner: Daniel Carvalho 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Remove findBlockBySetAndWay

2018-05-02 Thread Daniel Carvalho (Gerrit)


Hello Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/10141

to look at the new patch set (#2).

Change subject: mem-cache: Remove findBlockBySetAndWay
..

mem-cache: Remove findBlockBySetAndWay

With a sector cache you can't find a block using only its set
and way, as there is the sector offset to take into account.

As it is not used anywhere in the code, I've opted to remove it,
but I could make it return a SectorBlk instead.

Change-Id: I4730a2b4ebb5738f7fc118201e208a1b9c3ba8e8
---
M src/mem/cache/tags/base.hh
M src/mem/cache/tags/base_set_assoc.cc
M src/mem/cache/tags/base_set_assoc.hh
M src/mem/cache/tags/fa_lru.cc
M src/mem/cache/tags/fa_lru.hh
5 files changed, 0 insertions(+), 37 deletions(-)


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Gerrit-Change-Number: 10141
Gerrit-PatchSet: 2
Gerrit-Owner: Daniel Carvalho 
Gerrit-Reviewer: Daniel Carvalho 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Return evictions along with victims

2018-05-02 Thread Daniel Carvalho (Gerrit)


Hello Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/10142

to look at the new patch set (#2).

Change subject: mem-cache: Return evictions along with victims
..

mem-cache: Return evictions along with victims

For both sector and compressed caches multiple blocks may need
to be evicted in order to make room for a new block.

For example, when replacing a sector, all the blocks in this
sector must be evicted. A replacement, however, does not always
need to evict multiple blocks, as it is in the case of an
insertion of a block whose sector is already present in the cache
(i.e., its corresponding entry in the sector had not been brought
in yet, so it was invalid).

This patch creates the cache framework for that to happen.

Change-Id: I77bedf69637cf899fef4d9432eb6da8529ea398b
---
M src/mem/cache/cache.cc
M src/mem/cache/tags/base.hh
M src/mem/cache/tags/base_set_assoc.hh
M src/mem/cache/tags/fa_lru.cc
M src/mem/cache/tags/fa_lru.hh
5 files changed, 58 insertions(+), 22 deletions(-)


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Gerrit-Change-Id: I77bedf69637cf899fef4d9432eb6da8529ea398b
Gerrit-Change-Number: 10142
Gerrit-PatchSet: 2
Gerrit-Owner: Daniel Carvalho 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Jason Lowe-Power 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Create Second-Chance replacement policy

2018-05-02 Thread Daniel Carvalho (Gerrit)


Hello Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/9441

to look at the new patch set (#4).

Change subject: mem-cache: Create Second-Chance replacement policy
..

mem-cache: Create Second-Chance replacement policy

Implementation of a Second-Chance replacement policy. Similar to FIFO,
but every block is given a second chance if it has been touched.

Change-Id: Id4d52b698d0045a4914a4d848fdf9c3c00a28508
---
M src/mem/cache/replacement_policies/ReplacementPolicies.py
M src/mem/cache/replacement_policies/SConscript
M src/mem/cache/replacement_policies/fifo_rp.hh
A src/mem/cache/replacement_policies/second_chance_rp.cc
A src/mem/cache/replacement_policies/second_chance_rp.hh
5 files changed, 274 insertions(+), 0 deletions(-)


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Gerrit-Change-Id: Id4d52b698d0045a4914a4d848fdf9c3c00a28508
Gerrit-Change-Number: 9441
Gerrit-PatchSet: 4
Gerrit-Owner: Daniel Carvalho 
Gerrit-Reviewer: Daniel Carvalho 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Create Second-Chance replacement policy

2018-05-02 Thread Daniel Carvalho (Gerrit)


Hello Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/9441

to look at the new patch set (#3).

Change subject: mem-cache: Create Second-Chance replacement policy
..

mem-cache: Create Second-Chance replacement policy

Implementation of a Second-Chance replacement policy. Similar to FIFO,
but every block is given a second chance if it has been touched.

Change-Id: Id4d52b698d0045a4914a4d848fdf9c3c00a28508
---
M src/mem/cache/replacement_policies/ReplacementPolicies.py
M src/mem/cache/replacement_policies/SConscript
A src/mem/cache/replacement_policies/second_chance_rp.cc
A src/mem/cache/replacement_policies/second_chance_rp.hh
4 files changed, 306 insertions(+), 0 deletions(-)


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Gerrit-Change-Number: 9441
Gerrit-PatchSet: 3
Gerrit-Owner: Daniel Carvalho 
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[gem5-dev] Change in gem5/gem5[master]: scons: Fix --with-ubsan/asan compilation flags

2018-05-02 Thread Giacomo Travaglini (Gerrit)


Hello Andreas Sandberg,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/10181

to review the following change.


Change subject: scons: Fix --with-ubsan/asan compilation flags
..

scons: Fix --with-ubsan/asan compilation flags

SConstruct was using an undefined env variable; this patch uses the main
Environment variable.

Change-Id: I30ab6b4bbfa6d9a71a30fb33406a799bfb476821
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Andreas Sandberg 
---
M SConstruct
1 file changed, 8 insertions(+), 8 deletions(-)



diff --git a/SConstruct b/SConstruct
index 8fde133..b382d33 100755
--- a/SConstruct
+++ b/SConstruct
@@ -481,21 +481,21 @@
 # The address sanitizer is available for gcc >= 4.8
 if GetOption('with_asan'):
 if GetOption('with_ubsan') and \
-compareVersions(env['GCC_VERSION'], '4.9') >= 0:
-env.Append(CCFLAGS=['-fsanitize=address,undefined',
-'-fno-omit-frame-pointer'],
+compareVersions(main['GCC_VERSION'], '4.9') >= 0:
+main.Append(CCFLAGS=['-fsanitize=address,undefined',
+ '-fno-omit-frame-pointer'],
LINKFLAGS='-fsanitize=address,undefined')
 else:
-env.Append(CCFLAGS=['-fsanitize=address',
-'-fno-omit-frame-pointer'],
+main.Append(CCFLAGS=['-fsanitize=address',
+ '-fno-omit-frame-pointer'],
LINKFLAGS='-fsanitize=address')
 # Only gcc >= 4.9 supports UBSan, so check both the version
 # and the command-line option before adding the compiler and
 # linker flags.
 elif GetOption('with_ubsan') and \
-compareVersions(env['GCC_VERSION'], '4.9') >= 0:
-env.Append(CCFLAGS='-fsanitize=undefined')
-env.Append(LINKFLAGS='-fsanitize=undefined')
+compareVersions(main['GCC_VERSION'], '4.9') >= 0:
+main.Append(CCFLAGS='-fsanitize=undefined')
+main.Append(LINKFLAGS='-fsanitize=undefined')

 elif main['CLANG']:
 # Check for a supported version of clang, >= 3.1 is needed to

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[gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression quick

2018-05-02 Thread Cron Daemon

* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby:
 FAILED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: 
CHANGED!*** diff[simout]: SKIPPED
* 
build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple:
 CHANGED!
* 
build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level:
 CHANGED!
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual:
 CHANGED!
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: 
CHANGED!
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual:
 CHANGED!Statistics mismatch
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: 
CHANGED!
* 
build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic:
 CHANGED!
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: CHANGED!
*** stat_diff: FAILURE: Statistics mismatch* 
build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: CHANGED!
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: 
CHANGED!
* 
build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple:
 CHANGED!
* 
build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level:
 CHANGED!
* build/NULL/tests/opt/quick/se/80.dram-closepage/null/none/dram-lowp: 
CHANGED!
* build/NULL/tests/opt/quick/se/80.dram-openpage/null/none/dram-lowp: 
CHANGED!
* build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: CHANGED!
* build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem: CHANGED!
* build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: 
CHANGED!
* 
build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer:
 CHANGED!
* 
build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level:
 CHANGED!
* 
build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory:
 CHANGED!
* 
build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token:
 CHANGED!
* build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: CHANGED!
* build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: CHANGED!
* build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: 
CHANGED!
* build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby: 
CHANGED!
* 
build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple:
 CHANGED!
* 
build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp:
 CHANGED!
* build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing: 
CHANGED!
* 
build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp:
 CHANGED!
* 
build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp:
 CHANGED!
* 
build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level:
 CHANGED!
* build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing: 
CHANGED!
* build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing: 
CHANGED!
* build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing: CHANGED!
* build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic: CHANGED!
* build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby: 
CHANGED!
*** diff[config.ini]: SKIPPED*** gem5: OK* 
build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple:
 CHANGED!
* build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing: CHANGED!
* 
build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level:
 CHANGED!
* build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic: CHANGED!
* build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic: CHANGED!
* build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing: CHANGED!
* build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker: 
CHANGED!
*

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntps/movntpd SSE insts

[gem5-dev] Change in gem5/gem5[master]: x86: Add a ld/st microop flag for marking an access uncacheable.

[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

[gem5-dev] Change in gem5/gem5[master]: gpu-compute: Cleanup the scheduler a bit

[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Consistent dprintf formats for issue outcomes

[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Consistent dprintf formats for issue outcomes

[gem5-dev] Change in gem5/gem5[master]: ruby: consistent dprintf formats for issue outcomes

[gem5-dev] Change in gem5/gem5[master]: arch-x86: Enable fstatfs for x86_64

[gem5-dev] Change in gem5/gem5[master]: arch-x86: Enable the umask system call

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Create Sector Cache

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Remove findBlockBySetAndWay

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Return evictions along with victims

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Create Second-Chance replacement policy

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Create Second-Chance replacement policy

[gem5-dev] Change in gem5/gem5[master]: scons: Fix --with-ubsan/asan compilation flags

[gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression quick

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