Anthony Gutierrez has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10481 )
Change subject: gpu-compute: use X86ISA::TlbEntry over GpuTlbEntry
..
gpu-compute: use X86ISA::TlbEntry over GpuTlbE
Anthony Gutierrez has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10461 )
Change subject: dev: Exit correctly in dist-gem5 for SE mode
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dev: Exit correctly in dist-gem5 for SE mode
Do not
Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10621
to review the following change.
Change subject: mem-cache: Use block visitor to update tags stats and print
tags
...
Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10602
to review the following change.
Change subject: arch-arm: Read APSR in User Mode
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arch-arm: Read APSR in
Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10601
to review the following change.
Change subject: python: Include hasattr helper for SimObjects
..
python: I
Hello Gabe Black, Daniel Carvalho, Jason Lowe-Power,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/8291
to look at the new patch set (#10).
Change subject: mem-cache: Add a non-coherent cache
..
Hello Daniel Carvalho, Jason Lowe-Power,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/10431
to look at the new patch set (#5).
Change subject: mem-cache: Adopt a more sensible cache class hierarchy
...
Hello Daniel Carvalho, Jason Lowe-Power,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/10424
to look at the new patch set (#4).
Change subject: mem-cache: Refactor the cache recvTimingReq function
.
Hello Daniel Carvalho, Jason Lowe-Power,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/10423
to look at the new patch set (#4).
Change subject: mem-cache: Refactor the cache recvTimingResp function
Nikos Nikoleris has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10422 )
Change subject: mem-cache: Determine if an MSHR has requests from another
cache
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mem-cache: Determine if an MSHR
*
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby:
FAILED!
*
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic:
FAILED!
*
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing:
FAILED!
* build/RISCV/
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