A hotfix to rectify this issue has been released (gem5 version 20.0.0.2 on
the master branch). It has also been merged into the develop branch.
Apologies to anyone who's encountered this issue.
Kind regards,
Bobby
--
Dr. Bobby R. Bruce
Room 2235,
Kemper Hall, UC Davis
Davis,
CA, 95616
web:
[AMD Public Use]
Microops are proprietary. However, the *number* of microops for a given
architecture can be determined with a benchmark executing the instruction
billions/trillions of times and comparing the ratio of microops to instructions
using performance counters. People have done this
Nikos Nikoleris has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/30054 )
Change subject: mem: Add a header latency parameter to the XBar
..
mem: Add a header latency parameter to
Nikos Nikoleris has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/30055 )
Change subject: mem: Fix latency handling in MemDelay
..
mem: Fix latency handling in MemDelay
MemDelay
Hello Wendy Elsasser,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/30056
to review the following change.
Change subject: mem: Use beats_per_clock as the DDR data rate for DRAMPower
Matthew Poremba has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/29652 )
Change subject: mem-ruby: Allow MachineID to be unordered key
..
mem-ruby: Allow MachineID to be unordered key
Define
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30015 )
Change subject: misc: Remove any reference to the ALPHA ISA
..
misc: Remove any reference to the ALPHA ISA
Hello Andrea Mondelli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/30035
to review the following change.
Change subject: mem: model data array bank in classic cache - revisited
