[gem5-dev] Change in gem5/gem5[develop]: systemc: Fix systemc array bound error
Hoa Nguyen has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/31634 )
Change subject: systemc: Fix systemc array bound error
..
systemc: Fix systemc array bound error
Currently, g++-10 does not compile gem5 due to an array bound error
in sc_unsigned and sc_signed constructors.
This commit addresses this issue.
Change-Id: Id65b6d52cef527f62917e09231ff79e2237affd8
Signed-off-by: Hoa Nguyen
---
M src/systemc/dt/int/sc_nbcommon.inc
1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/systemc/dt/int/sc_nbcommon.inc
b/src/systemc/dt/int/sc_nbcommon.inc
index 13317a6..aebf03a 100644
--- a/src/systemc/dt/int/sc_nbcommon.inc
+++ b/src/systemc/dt/int/sc_nbcommon.inc
@@ -2275,9 +2275,13 @@
sc_value_base(), sgn(s), nbits(num_bits(nb)), ndigits(), digit()
{
ndigits = DIV_CEIL(nbits);
+/*
#ifndef SC_MAX_NBITS
digit = new sc_digit[ndigits];
#endif
+*/
+
+digit = new sc_digit[ndigits];
if (ndigits <= nd)
vec_copy(ndigits, digit, d);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id65b6d52cef527f62917e09231ff79e2237affd8
Gerrit-Change-Number: 31634
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: util,tests: Updated compiler-tests to support paths with spaces
Bobby R. Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/31534 )
Change subject: util,tests: Updated compiler-tests to support paths with
spaces
..
util,tests: Updated compiler-tests to support paths with spaces
This script was failing if the gem5 directory path contained a space.
E.g: `/home/bobbys home/gem5`. This script has thereby been improved to
handle this.
Change-Id: Id56ff5a0e9aa31eef14de2111b040f7f2b0b286c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31534
Reviewed-by: Daniel Carvalho
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M util/compiler-tests.sh
1 file changed, 19 insertions(+), 18 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Jason Lowe-Power: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/compiler-tests.sh b/util/compiler-tests.sh
index 30ce637..c586c27 100755
--- a/util/compiler-tests.sh
+++ b/util/compiler-tests.sh
@@ -70,14 +70,14 @@
exits="${test_dir}/exit-codes.csv"
# Create the testing output directory and files
-rm -rf $test_dir_final
-rm -rf $test_dir
-mkdir $test_dir
-touch $exits
-echo "compiler,build_target,exit_code" >> $exits
+rm -rf "${test_dir_final}"
+rm -rf "${test_dir}"
+mkdir "${test_dir}"
+touch "${exits}"
+echo "compiler,build_target,exit_code" >> "${exits}"
for compiler in ${images[@]}; do
-echo "Starting build tests with '$compiler'..."
+echo "Starting build tests with '${compiler}'..."
# Generate a randomized list of build targets
build_permutation=($(shuf -i 0-$((${#builds[@]} - 1)) ))
@@ -96,33 +96,34 @@
# Grab compiler image
docker pull $repo_name >/dev/null
-mkdir "$test_dir/$compiler"
+mkdir "${test_dir}/${compiler}"
for build_index in ${build_indices[@]}; do
for build_opt in ${opts[@]}; do
build="${builds[$build_index]}"
build_out="build/$build/gem5$build_opt"
-build_stdout="$test_dir/$compiler/$build$build_opt.stdout"
-build_stderr="$test_dir/$compiler/$build$build_opt.stderr"
+
build_stdout="${test_dir}/${compiler}/${build}${build_opt}.stdout"
+
build_stderr="${test_dir}/${compiler}/${build}${build_opt}.stderr"
# Clean the build
rm -rf "${build_dir}"
-touch $build_stdout
-touch $build_stderr
+touch "${build_stdout}"
+touch "${build_stderr}"
-echo " * Building target '$build$build_opt'
with '$compiler'..."
+echo " * Building target '${build}${build_opt}'
with '${compiler}'..."
# Build with container
{
-docker run --rm -v ${gem5_root}:/gem5 -u $UID:$GID -w
/gem5 \
-$repo_name scons $build_out $build_args
-}>$build_stdout 2>$build_stderr
+docker run --rm -v "${gem5_root}":"/gem5" -u $UID:$GID \
+-w /gem5 $repo_name
scons "${build_out}" "${build_args}"
+}>"${build_stdout}" 2>"${build_stderr}"
result=$?
-echo "$compiler,$build/gem5$build_opt,$result" >> $exits
-if [ $result -ne 0 ]; then
-echo " ! Failed with exit code $result."
+echo "${compiler},${build}/gem5${build_opt},${result}"
"${exits}"
+
+if [ ${result} -ne 0 ]; then
+echo " ! Failed with exit code ${result}."
else
echo "Done."
fi
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id56ff5a0e9aa31eef14de2111b040f7f2b0b286c
Gerrit-Change-Number: 31534
Gerrit-PatchSet: 2
Gerrit-Owner: Bobby R. Bruce
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Updated git description length policy to 72 chars
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31135 ) Change subject: misc: Updated git description length policy to 72 chars .. misc: Updated git description length policy to 72 chars Advocating <=75 characters is non-standard. 72 characters is recommended. Furthermore, within Gerrit, descriptions >72 characters causes ugly line-wrapping. This commit updates this policy to 72 characters. The corresponding change within the gem5 webpage: https://gem5-review.googlesource.com/c/public/gem5-website/+/31134 Change-Id: Iaf542a241772f8e400d8f90624712de1a435d096 Issue-on: https://gem5.atlassian.net/browse/GEM5-665 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31135 Reviewed-by: Daniel Carvalho Reviewed-by: Andreas Sandberg Reviewed-by: Nikos Nikoleris Reviewed-by: Giacomo Travaglini Maintainer: Bobby R. Bruce Tested-by: kokoro --- M CONTRIBUTING.md 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Andreas Sandberg: Looks good to me, approved Nikos Nikoleris: Looks good to me, approved Giacomo Travaglini: Looks good to me, approved Daniel Carvalho: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 0fb4ab2..74bdd2c 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -136,7 +136,7 @@ causes line-wrapping for longer lines. * (Optional, but highly recommended) A detailed description. This describes what you have done and why. If the change isn't obvious, you might want to - motivate why it is needed. Lines need to be wrapped to 75 characters or + motivate why it is needed. Lines need to be wrapped to 72 characters or less. * Tags describing patch metadata. You are highly recommended to use tags to acknowledge reviewers for their work. Gerrit will automatically add -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/31135 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Iaf542a241772f8e400d8f90624712de1a435d096 Gerrit-Change-Number: 31135 Gerrit-PatchSet: 2 Gerrit-Owner: Bobby R. Bruce Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Anthony Gutierrez Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Nikos Nikoleris Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: tests: fix .testsignore for long regression
mike upton has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31594 ) Change subject: tests: fix .testsignore for long regression .. tests: fix .testsignore for long regression removed 2 tests from long regression to get nightly tests to pass fixed .testignore, -arch64 changed to -aarch64, this enables running on ARM hw Change-Id: Ic8456fef83dfba3417d1edcf62e90873d197d3d6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31594 Maintainer: Jason Lowe-Power Reviewed-by: Bobby R. Bruce Tested-by: kokoro --- M tests/gem5/.testignore 1 file changed, 26 insertions(+), 24 deletions(-) Approvals: Bobby R. Bruce: Looks good to me, approved Jason Lowe-Power: Looks good to me, approved kokoro: Regressions pass diff --git a/tests/gem5/.testignore b/tests/gem5/.testignore index c76d7c6..405f005 100644 --- a/tests/gem5/.testignore +++ b/tests/gem5/.testignore @@ -110,24 +110,24 @@ test-hello-linux-TimingSimpleCPU-MIPS-x86_64-opt test-hello-linux-AtomicSimpleCPU-MIPS-x86_64-opt test-hello-linux-DerivO3CPU-MIPS-x86_64-opt -test-hello-linux-MinorCPU-RISCV-arch64-debug -test-hello-linux-TimingSimpleCPU-SPARC-arch64-debug -test-hello-linux-AtomicSimpleCPU-SPARC-arch64-debug -test-hello-linux-TimingSimpleCPU-MIPS-arch64-debug -test-hello-linux-AtomicSimpleCPU-MIPS-arch64-debug -test-hello-linux-DerivO3CPU-MIPS-arch64-debug -test-hello-linux-MinorCPU-RISCV-arch64-fast -test-hello-linux-TimingSimpleCPU-SPARC-arch64-fast -test-hello-linux-AtomicSimpleCPU-SPARC-arch64-fast -test-hello-linux-TimingSimpleCPU-MIPS-arch64-fast -test-hello-linux-AtomicSimpleCPU-MIPS-arch64-fast -test-hello-linux-DerivO3CPU-MIPS-arch64-fast -test-hello-linux-MinorCPU-RISCV-arch64-opt -test-hello-linux-TimingSimpleCPU-SPARC-arch64-opt -test-hello-linux-AtomicSimpleCPU-SPARC-arch64-opt -test-hello-linux-TimingSimpleCPU-MIPS-arch64-opt -test-hello-linux-AtomicSimpleCPU-MIPS-arch64-opt -test-hello-linux-DerivO3CPU-MIPS-arch64-opt +test-hello-linux-MinorCPU-RISCV-aarch64-debug +test-hello-linux-TimingSimpleCPU-SPARC-aarch64-debug +test-hello-linux-AtomicSimpleCPU-SPARC-aarch64-debug +test-hello-linux-TimingSimpleCPU-MIPS-aarch64-debug +test-hello-linux-AtomicSimpleCPU-MIPS-aarch64-debug +test-hello-linux-DerivO3CPU-MIPS-aarch64-debug +test-hello-linux-MinorCPU-RISCV-aarch64-fast +test-hello-linux-TimingSimpleCPU-SPARC-aarch64-fast +test-hello-linux-AtomicSimpleCPU-SPARC-aarch64-fast +test-hello-linux-TimingSimpleCPU-MIPS-aarch64-fast +test-hello-linux-AtomicSimpleCPU-MIPS-aarch64-fast +test-hello-linux-DerivO3CPU-MIPS-aarch64-fast +test-hello-linux-MinorCPU-RISCV-aarch64-opt +test-hello-linux-TimingSimpleCPU-SPARC-aarch64-opt +test-hello-linux-AtomicSimpleCPU-SPARC-aarch64-opt +test-hello-linux-TimingSimpleCPU-MIPS-aarch64-opt +test-hello-linux-AtomicSimpleCPU-MIPS-aarch64-opt +test-hello-linux-DerivO3CPU-MIPS-aarch64-opt test-hello-linux-MinorCPU-RISCV-i386-debug test-hello-linux-TimingSimpleCPU-SPARC-i386-debug test-hello-linux-AtomicSimpleCPU-SPARC-i386-debug @@ -152,15 +152,17 @@ test-atomic-TimingSimpleCPU-SPARC-x86_64-debug test-atomic-DerivO3CPU-SPARC-x86_64-fast test-atomic-TimingSimpleCPU-SPARC-x86_64-fast -test-atomic-DerivO3CPU-SPARC-arch64-opt -test-atomic-TimingSimpleCPU-SPARC-arch64-opt -test-atomic-DerivO3CPU-SPARC-arch64-debug -test-atomic-TimingSimpleCPU-SPARC-arch64-debug -test-atomic-DerivO3CPU-SPARC-arch64-fast -test-atomic-TimingSimpleCPU-SPARC-arch64-fast +test-atomic-DerivO3CPU-SPARC-aarch64-opt +test-atomic-TimingSimpleCPU-SPARC-aarch64-opt +test-atomic-DerivO3CPU-SPARC-aarch64-debug +test-atomic-TimingSimpleCPU-SPARC-aarch64-debug +test-atomic-DerivO3CPU-SPARC-aarch64-fast +test-atomic-TimingSimpleCPU-SPARC-aarch64-fast test-atomic-DerivO3CPU-SPARC-i386-opt test-atomic-TimingSimpleCPU-SPARC-i386-opt test-atomic-DerivO3CPU-SPARC-i386-debug test-atomic-TimingSimpleCPU-SPARC-i386-debug test-atomic-DerivO3CPU-SPARC-i386-fast test-atomic-TimingSimpleCPU-SPARC-i386-fast +realview-o3-checker-ARM-x86_64-opt +realview64-o3-checker-ARM-x86_64-opt -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/31594 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ic8456fef83dfba3417d1edcf62e90873d197d3d6 Gerrit-Change-Number: 31594 Gerrit-PatchSet: 2 Gerrit-Owner: mike upton Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-Reviewer: mike upton Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: tests,arch-riscv: Migrated asmtest to testlib
Bobby R. Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27043 )
Change subject: tests,arch-riscv: Migrated asmtest to testlib
..
tests,arch-riscv: Migrated asmtest to testlib
Issue-on: https://gem5.atlassian.net/browse/GEM5-141
Change-Id: I8f02e53157d32e21591c51e99de803366ad8fd8f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27043
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Hoa Nguyen
---
A tests/gem5/asmtest/tests.py
1 file changed, 238 insertions(+), 0 deletions(-)
Approvals:
Hoa Nguyen: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/tests/gem5/asmtest/tests.py b/tests/gem5/asmtest/tests.py
new file mode 100755
index 000..b2a9249
--- /dev/null
+++ b/tests/gem5/asmtest/tests.py
@@ -0,0 +1,238 @@
+# Copyright (c) 2020 The Regents of the University of California
+# All Rights Reserved.
+#
+# Copyright (c) 2018, Cornell University
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or
+# without modification, are permitted provided that the following
+# conditions are met:
+#
+# Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+#
+# Redistributions in binary form must reproduce the above
+# copyright notice, this list of conditions and the following
+# disclaimer in the documentation and/or other materials provided
+# with the distribution.
+#
+# Neither the name of Cornell University nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+# CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+# USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+import os
+from testlib import *
+
+def asm_test(test, #The full path of the test
+ cpu_type,
+ num_cpus=4,
+ max_tick=100,
+ ruby=True,
+ debug_flags=None, # Debug flags passed to gem5
+ full_system = False
+ ):
+
+if full_system:
+config_file = os.path.join(config.base_dir,
+ 'configs', 'example', 'fs.py')
+else:
+config_file = os.path.join(config.base_dir,
+ 'configs', 'example', 'se.py')
+
+gem5_args = ['--listener-mode', 'off']
+
+if not debug_flags is None:
+gem5_args += ['--debug-flags', str(debug_flags)]
+
+config_args = [
+'-m', str(max_tick),
+'--cpu-type', cpu_type,
+]
+
+if full_system:
+config_args += [
+'--caches',
+'--mem-size', '3072MB',
+'--kernel', test
+]
+else:
+config_args += [
+'-n', str(num_cpus),
+'--ruby' if ruby else '--caches',
+'--cmd', test
+]
+
+gem5_verify_config(
+name = 'asm-' + os.path.basename(test) + '-' + cpu_type,
+fixtures = (program,),
+verifiers = (),
+gem5_args = gem5_args,
+config = config_file,
+config_args = config_args,
+valid_isas = ('RISCV',),
+valid_hosts = constants.supported_hosts
+)
+
+cpu_types =
('AtomicSimpleCPU', 'TimingSimpleCPU', 'MinorCPU', 'DerivO3CPU')
+
+# The following lists the RISCV binaries. Those commented out presently
result
+# in a test failure. They are outlined in the following Jira Issues:
+#
+# https://gem5.atlassian.net/browse/GEM5-494
+# https://gem5.atlassian.net/browse/GEM5-496
+# https://gem5.atlassian.net/browse/GEM5-497
+binaries = (
+#'rv64samt-ps-sysclone_d',
+#'rv64samt-ps-sysfutex1_d',
+#'rv64samt-ps-sysfutex2_d',
+#'rv64samt-ps-sysfutex3_d',
+#'rv64samt-ps-sysfutex_d',
+'rv64ua-ps-amoadd_d',
+'rv64ua-ps-amoadd_w',
+'rv64ua-ps-amoand_d',
+'rv64ua-ps-amoand_w',
+'rv64ua-ps-amomax_d',
+'rv64ua-ps-amomax_w',
+'rv64ua-ps-amomaxu_d',
+'rv64ua-ps-amomaxu_w',
+'rv64ua-ps-amomin_d',
+'rv64ua-ps-amomin_w',
+'rv64ua-ps-amominu_d',
+'rv64ua-ps-amominu_w',
+'rv64ua-ps-amoor_d',
+'rv64ua-ps-amoor_w',
+
[gem5-dev] Change in gem5/gem5[develop]: arch-gcn3,gpu-compute: Fix GCN3 related compiler errors
Matthew Poremba has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/31154 )
Change subject: arch-gcn3,gpu-compute: Fix GCN3 related compiler errors
..
arch-gcn3,gpu-compute: Fix GCN3 related compiler errors
Fix all errors that were revealed using the util/compiler-test.sh
script.
Change-Id: Ie0d35568624e5e1405143593f0677bbd0b066b61
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31154
Reviewed-by: Anthony Gutierrez
Reviewed-by: Jason Lowe-Power
Maintainer: Anthony Gutierrez
Tested-by: kokoro
---
M src/arch/gcn3/insts/instructions.cc
M src/arch/gcn3/insts/op_encodings.cc
M src/arch/gcn3/operand.hh
M src/gpu-compute/gpu_compute_driver.cc
4 files changed, 33 insertions(+), 18 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/gcn3/insts/instructions.cc
b/src/arch/gcn3/insts/instructions.cc
index 7c2cf0e..426f991 100644
--- a/src/arch/gcn3/insts/instructions.cc
+++ b/src/arch/gcn3/insts/instructions.cc
@@ -5183,7 +5183,7 @@
void
Inst_SMEM__S_STORE_DWORDX4::initiateAcc(GPUDynInstPtr gpuDynInst)
{
-ConstScalarOperandU64 sdata(gpuDynInst, instData.SDATA);
+ConstScalarOperandU128 sdata(gpuDynInst, instData.SDATA);
sdata.read();
std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
4 * sizeof(ScalarRegU32));
diff --git a/src/arch/gcn3/insts/op_encodings.cc
b/src/arch/gcn3/insts/op_encodings.cc
index 997b22f..86d2a9b 100644
--- a/src/arch/gcn3/insts/op_encodings.cc
+++ b/src/arch/gcn3/insts/op_encodings.cc
@@ -1887,12 +1887,14 @@
} else if (numDstRegOperands()) {
return extData.VDST;
}
+break;
case 2:
if (numSrcRegOperands() > 2) {
return extData.DATA1;
} else if (numDstRegOperands()) {
return extData.VDST;
}
+break;
case 3:
assert(numDstRegOperands());
return extData.VDST;
@@ -1900,6 +1902,8 @@
fatal("Operand at idx %i does not exist\n", opIdx);
return -1;
}
+fatal("Operand at idx %i does not exist\n", opIdx);
+return -1;
}
// --- Inst_MUBUF base class methods ---
diff --git a/src/arch/gcn3/operand.hh b/src/arch/gcn3/operand.hh
index 97c6310..0a1f656 100644
--- a/src/arch/gcn3/operand.hh
+++ b/src/arch/gcn3/operand.hh
@@ -521,12 +521,22 @@
switch(_opIdx) {
case REG_EXEC_LO:
{
-ScalarRegU64 exec_mask = _gpuDynInst->wavefront()->
-execMask().to_ullong();
-std::memcpy((void*)srfData.data(), (void*)_mask,
-sizeof(srfData));
-DPRINTF(GPUSRF, "Read EXEC\n");
-DPRINTF(GPUSRF, "EXEC = %#x\n", exec_mask);
+if (NumDwords == 1) {
+ScalarRegU32 exec_mask = _gpuDynInst->wavefront()->
+execMask().to_ulong();
+std::memcpy((void*)srfData.data(),
(void*)_mask,
+sizeof(exec_mask));
+DPRINTF(GPUSRF, "Read EXEC\n");
+DPRINTF(GPUSRF, "EXEC = %#x\n", exec_mask);
+} else {
+assert(NumDwords == 2);
+ScalarRegU64 exec_mask = _gpuDynInst->wavefront()->
+execMask().to_ullong();
+std::memcpy((void*)srfData.data(),
(void*)_mask,
+sizeof(exec_mask));
+DPRINTF(GPUSRF, "Read EXEC\n");
+DPRINTF(GPUSRF, "EXEC = %#x\n", exec_mask);
+}
}
break;
case REG_EXEC_HI:
@@ -541,7 +551,7 @@
ScalarRegU32 exec_mask_hi = bits(exec_mask, 63, 32);
std::memcpy((void*)srfData.data(),
(void*)_mask_hi,
-sizeof(srfData));
+sizeof(exec_mask_hi));
DPRINTF(GPUSRF, "Read EXEC_HI\n");
DPRINTF(GPUSRF, "EXEC_HI = %#x\n", exec_mask_hi);
}
@@ -556,7 +566,7 @@
{
typename OpTraits::FloatT pos_half = 0.5;
std::memcpy((void*)srfData.data(), (void*)_half,
-sizeof(srfData));
+sizeof(pos_half));
}
break;
@@ -564,44 +574,44 @@
{
typename OpTraits::FloatT neg_half = -0.5;
std::memcpy((void*)srfData.data(), (void*)_half,
-
[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Gicv3 maintenance interrupt never cleared
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/31614 )
Change subject: dev-arm: Gicv3 maintenance interrupt never cleared
..
dev-arm: Gicv3 maintenance interrupt never cleared
The maintenance interrupt is a level sensitive interrupt though it has
been treated as edge triggered so far.
In order to be level sensitive, it needs to be cleared once the condition
which led to its generation are not valid anymore.
Change-Id: I9af9f4bf27622a7961393b00a145d6c9835d738b
Signed-off-by: Giacomo Travaglini
---
M src/dev/arm/gic_v3_cpu_interface.cc
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/dev/arm/gic_v3_cpu_interface.cc
b/src/dev/arm/gic_v3_cpu_interface.cc
index 5e1f871..54075ec 100644
--- a/src/dev/arm/gic_v3_cpu_interface.cc
+++ b/src/dev/arm/gic_v3_cpu_interface.cc
@@ -2078,10 +2078,10 @@
ICH_HCR_EL2 ich_hcr_el2 =
isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
-if (ich_hcr_el2.En) {
-if (maintenanceInterruptStatus()) {
-maintenanceInterrupt->raise();
-}
+if (ich_hcr_el2.En && maintenanceInterruptStatus()) {
+maintenanceInterrupt->raise();
+} else {
+maintenanceInterrupt->clear();
}
if (signal_IRQ) {
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9af9f4bf27622a7961393b00a145d6c9835d738b
Gerrit-Change-Number: 31614
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Check for security attribute when writing to ICFGR registers
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/31615 )
Change subject: dev-arm: Check for security attribute when writing to ICFGR
registers
..
dev-arm: Check for security attribute when writing to ICFGR registers
This is matching the GICD_ICFGR read; a non secure access to a secure
interrupt should be treated as RAZ/WI
Change-Id: I9e92e03c13fe0474ed139b0ed22cebd5847b9109
Signed-off-by: Giacomo Travaglini
---
M src/dev/arm/gic_v3_distributor.cc
1 file changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/dev/arm/gic_v3_distributor.cc
b/src/dev/arm/gic_v3_distributor.cc
index 8ec269a..27f404b 100644
--- a/src/dev/arm/gic_v3_distributor.cc
+++ b/src/dev/arm/gic_v3_distributor.cc
@@ -745,6 +745,11 @@
for (int i = 0, int_id = first_intid; i < 8 * size && int_id <
itLines;
i = i + 2, int_id++) {
+
+if (nsAccessToSecInt(int_id, is_secure_access)) {
+continue;
+}
+
irqConfig[int_id] = data & (0x2 << i) ?
Gicv3::INT_EDGE_TRIGGERED :
Gicv3::INT_LEVEL_SENSITIVE;
--
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Gerrit-Branch: develop
Gerrit-Change-Id: I9e92e03c13fe0474ed139b0ed22cebd5847b9109
Gerrit-Change-Number: 31615
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem: Use beats_per_clock as the DDR data rate for DRAMPower
Nikos Nikoleris has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30056 )
Change subject: mem: Use beats_per_clock as the DDR data rate for DRAMPower
..
mem: Use beats_per_clock as the DDR data rate for DRAMPower
The data rate is used by the drampower lib to estimate the power
consumption of the DRAM Core. Previously, we used the formula:
burst_cycles = divCeil(p->tBURST_MAX, p->tCK);
data_rate = p->burst_length / burst_cycles;
to derive the data_rate. However, under certain configurations this
formula computes the wrong result due to rounding errors. This patch
simplifies the way we derive the data_rate by passing the value of the
DRAM parameter beats_per_clock.
Change-Id: Ic8cd35bb4641d9c0a704675d2672a6fe4f4ec13e
Signed-off-by: Nikos Nikoleris
Reviewed-by: Wendy Elsasser
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30056
Tested-by: kokoro
Reviewed-by: Daniel Carvalho
---
M src/mem/drampower.cc
M src/mem/drampower.hh
2 files changed, 1 insertion(+), 17 deletions(-)
Approvals:
Wendy Elsasser: Looks good to me, approved
Daniel Carvalho: Looks good to me, but someone else must approve
Nikos Nikoleris: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/drampower.cc b/src/mem/drampower.cc
index f506928..13551a0 100644
--- a/src/mem/drampower.cc
+++ b/src/mem/drampower.cc
@@ -53,7 +53,7 @@
archSpec.nbrOfBanks = p->banks_per_rank;
// One DRAMPower instance per rank, hence set this to 1
archSpec.nbrOfRanks = 1;
-archSpec.dataRate = getDataRate(p);
+archSpec.dataRate = p->beats_per_clock;
// For now we can ignore the number of columns and rows as they
// are not used in the power calculation.
archSpec.nbrOfColumns = 0;
@@ -146,14 +146,3 @@
{
return p->VDD2 == 0 ? false : true;
}
-
-uint8_t
-DRAMPower::getDataRate(const DRAMCtrlParams* p)
-{
-uint32_t burst_cycles = divCeil(p->tBURST_MAX, p->tCK);
-uint8_t data_rate = p->burst_length / burst_cycles;
-// 4 for GDDR5
-if (data_rate != 1 && data_rate != 2 && data_rate != 4 && data_rate !=
8)
-fatal("Got unexpected data rate %d, should be 1 or 2 or 4 or 8\n");
-return data_rate;
-}
diff --git a/src/mem/drampower.hh b/src/mem/drampower.hh
index ed47476..da24bca 100644
--- a/src/mem/drampower.hh
+++ b/src/mem/drampower.hh
@@ -74,11 +74,6 @@
static Data::MemPowerSpec getPowerParams(const DRAMCtrlParams* p);
/**
- * Determine data rate, either one or two.
- */
-static uint8_t getDataRate(const DRAMCtrlParams* p);
-
-/**
* Determine if DRAM has two voltage domains (or one)
*/
static bool hasTwoVDD(const DRAMCtrlParams* p);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic8cd35bb4641d9c0a704675d2672a6fe4f4ec13e
Gerrit-Change-Number: 30056
Gerrit-PatchSet: 4
Gerrit-Owner: Nikos Nikoleris
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Matthias Jung
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-Reviewer: Wendy Elsasser
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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