[gem5-dev] Change in gem5/gem5[develop]: x86: Fix some comments in x86 KVM process initialization.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/38537 ) Change subject: x86: Fix some comments in x86 KVM process initialization. .. x86: Fix some comments in x86 KVM process initialization. These comments did not reflect what the code was actually doing. Change-Id: I2bcd23bd68c870e364bdfd0b9b0eb5dcb560e713 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38537 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M src/arch/x86/process.cc 1 file changed, 3 insertions(+), 3 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 25f556c..03e8641 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -343,8 +343,8 @@ efer.lme = 1; // Enable long mode. efer.lma = 1; // Activate long mode. efer.nxe = 1; // Enable nx support. -efer.svme = 0; // Enable svm support for now. -efer.ffxsr = 0; // Turn on fast fxsave and fxrstor. +efer.svme = 0; // Disable svm support for now. +efer.ffxsr = 0; // Disable fast fxsave and fxrstor. tc->setMiscReg(MISCREG_EFER, efer); //Set up the registers that describe the operating mode. @@ -372,7 +372,7 @@ CR4 cr4 = 0; //Turn on pae. -cr4.osxsave = 0; // Enable XSAVE and Proc Extended States +cr4.osxsave = 0; // Disable XSAVE and Proc Extended States cr4.osxmmexcpt = 0; // Operating System Unmasked Exception cr4.osfxsr = 1; // Operating System FXSave/FSRSTOR Support cr4.pce = 0; // Performance-Monitoring Counter Enable -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/38537 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I2bcd23bd68c870e364bdfd0b9b0eb5dcb560e713 Gerrit-Change-Number: 38537 Gerrit-PatchSet: 2 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Alexandru Duțu Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Matthew Poremba Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: x86: Change some CR0 settings when setting up kvm x86 processes.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/38536 ) Change subject: x86: Change some CR0 settings when setting up kvm x86 processes. .. x86: Change some CR0 settings when setting up kvm x86 processes. These values were (seemingly) arbitrarily changed from the original, non-KVM settings, and no longer matched the comments which were also copied over. These two bits enable alignment checking on memory accesses (not normally used on x86), and whether kernel code can write to read only pages. Change-Id: I48e560e448e4849607f12e9336d1ab0458ad9407 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38536 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M src/arch/x86/process.cc 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index e9cdb61..25f556c 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -352,8 +352,8 @@ cr0.pg = 1; // Turn on paging. cr0.cd = 0; // Don't disable caching. cr0.nw = 0; // This is bit is defined to be ignored. -cr0.am = 1; // No alignment checking -cr0.wp = 1; // Supervisor mode can write read only pages +cr0.am = 0; // No alignment checking +cr0.wp = 0; // Supervisor mode can write read only pages cr0.ne = 1; cr0.et = 1; // This should always be 1 cr0.ts = 0; // We don't do task switching, so causing fp exceptions -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/38536 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I48e560e448e4849607f12e9336d1ab0458ad9407 Gerrit-Change-Number: 38536 Gerrit-PatchSet: 2 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Alexandru Duțu Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Matthew Poremba Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: dev-arm: SMMUv3, enable interrupt interface
Adrian Herrera has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/38555 )
Change subject: dev-arm: SMMUv3, enable interrupt interface
..
dev-arm: SMMUv3, enable interrupt interface
Users can set "irq_interface_enable" to allow software to program
SMMU_IRQ_CTRL and SMMU_IRQ_CTRLACK. This is required to boot Linux v5.4+
in a reasonable time. Notice the model does not implement architectural
interrupt sources, so no assertions will happen.
Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Signed-off-by: Adrian Herrera
---
M src/dev/arm/SMMUv3.py
M src/dev/arm/smmu_v3.cc
M src/dev/arm/smmu_v3.hh
3 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
index f53b8ec..f444d64 100644
--- a/src/dev/arm/SMMUv3.py
+++ b/src/dev/arm/SMMUv3.py
@@ -91,6 +91,11 @@
reg_map = Param.AddrRange('Address range for control registers')
system = Param.System(Parent.any, "System this device is part of")
+irq_interface_enable = Param.Bool(False,
+"This flag enables software to program SMMU_IRQ_CTRL and "
+"SMMU_IRQ_CTRLACK as if the model implemented architectural "
+"interrupt sources")
+
device_interfaces = VectorParam.SMMUv3DeviceInterface([],
"Responder interfaces")
diff --git a/src/dev/arm/smmu_v3.cc b/src/dev/arm/smmu_v3.cc
index 543a11a..3076f5e 100644
--- a/src/dev/arm/smmu_v3.cc
+++ b/src/dev/arm/smmu_v3.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, 2018-2019 ARM Limited
+ * Copyright (c) 2013, 2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -58,6 +58,7 @@
requestPort(name() + ".request", *this),
tableWalkPort(name() + ".walker", *this),
controlPort(name() + ".control", *this, params.reg_map),
+irqInterfaceEnable(params.irq_interface_enable),
tlb(params.tlb_entries, params.tlb_assoc, params.tlb_policy, this),
configCache(params.cfg_entries, params.cfg_assoc, params.cfg_policy,
this),
ipaCache(params.ipa_entries, params.ipa_assoc, params.ipa_policy,
this),
@@ -627,6 +628,13 @@
assert(pkt->getSize() == sizeof(uint32_t));
regs.cr0 = regs.cr0ack = pkt->getLE();
break;
+case offsetof(SMMURegs, irq_ctrl):
+assert(pkt->getSize() == sizeof(uint32_t));
+if (irqInterfaceEnable) {
+warn("SMMUv3::%s No support for interrupt sources",
__func__);
+regs.irq_ctrl = regs.irq_ctrlack = pkt->getLE();
+}
+break;
case offsetof(SMMURegs, cr1):
case offsetof(SMMURegs, cr2):
diff --git a/src/dev/arm/smmu_v3.hh b/src/dev/arm/smmu_v3.hh
index 2d9c1c5..e20ab4d 100644
--- a/src/dev/arm/smmu_v3.hh
+++ b/src/dev/arm/smmu_v3.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, 2018-2019 ARM Limited
+ * Copyright (c) 2013, 2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -94,6 +94,8 @@
SMMUTableWalkPort tableWalkPort;
SMMUControlPort controlPort;
+const bool irqInterfaceEnable;
+
ARMArchTLB tlb;
ConfigCache configCache;
IPACacheipaCache;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Gerrit-Change-Number: 38555
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-cache: Add a data-update probe to cache
Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/37096 )
Change subject: mem-cache: Add a data-update probe to cache
..
mem-cache: Add a data-update probe to cache
This probe is responsible for notifying any changes to the
data contents of a block. This includes fills, overwrites,
and invalidations/evictions.
Jira: https://gem5.atlassian.net/browse/GEM5-814
Change-Id: I1ff3c09c63d5402765c2125c4d76d95b614877d6
Signed-off-by: Daniel R. Carvalho
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37096
Reviewed-by: Nikos Nikoleris
Maintainer: Nikos Nikoleris
Tested-by: kokoro
---
M src/mem/cache/base.cc
M src/mem/cache/base.hh
2 files changed, 108 insertions(+), 4 deletions(-)
Approvals:
Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 98467ab..22c2842 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -676,6 +676,31 @@
}
}
+void
+BaseCache::updateBlockData(CacheBlk *blk, const PacketPtr cpkt,
+bool has_old_data)
+{
+DataUpdate data_update(regenerateBlkAddr(blk), blk->isSecure());
+if (ppDataUpdate->hasListeners()) {
+if (has_old_data) {
+data_update.oldData = std::vector(blk->data,
+blk->data + (blkSize / sizeof(uint64_t)));
+}
+}
+
+// Actually perform the data update
+if (cpkt) {
+cpkt->writeDataToBlock(blk->data, blkSize);
+}
+
+if (ppDataUpdate->hasListeners()) {
+if (cpkt) {
+data_update.newData = std::vector(blk->data,
+blk->data + (blkSize / sizeof(uint64_t)));
+}
+ppDataUpdate->notify(data_update);
+}
+}
void
BaseCache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt)
@@ -692,6 +717,13 @@
assert(sizeof(uint64_t) >= pkt->getSize());
+// Get a copy of the old block's contents for the probe before the
update
+DataUpdate data_update(regenerateBlkAddr(blk), blk->isSecure());
+if (ppDataUpdate->hasListeners()) {
+data_update.oldData = std::vector(blk->data,
+blk->data + (blkSize / sizeof(uint64_t)));
+}
+
overwrite_mem = true;
// keep a copy of our possible write value, and copy what is at the
// memory address into the packet
@@ -714,6 +746,12 @@
if (overwrite_mem) {
std::memcpy(blk_data, &overwrite_val, pkt->getSize());
blk->setCoherenceBits(CacheBlk::DirtyBit);
+
+if (ppDataUpdate->hasListeners()) {
+data_update.newData = std::vector(blk->data,
+blk->data + (blkSize / sizeof(uint64_t)));
+ppDataUpdate->notify(data_update);
+}
}
}
@@ -961,6 +999,14 @@
// isWrite() will be true for them
if (pkt->cmd == MemCmd::SwapReq) {
if (pkt->isAtomicOp()) {
+// Get a copy of the old block's contents for the probe before
+// the update
+DataUpdate data_update(regenerateBlkAddr(blk),
blk->isSecure());
+if (ppDataUpdate->hasListeners()) {
+data_update.oldData = std::vector(blk->data,
+blk->data + (blkSize / sizeof(uint64_t)));
+}
+
// extract data from cache and save it into the data field in
// the packet as a return value from this atomic op
int offset = tags->extractBlkOffset(pkt->getAddr());
@@ -970,6 +1016,13 @@
// execute AMO operation
(*(pkt->getAtomicOp()))(blk_data);
+// Inform of this block's data contents update
+if (ppDataUpdate->hasListeners()) {
+data_update.newData = std::vector(blk->data,
+blk->data + (blkSize / sizeof(uint64_t)));
+ppDataUpdate->notify(data_update);
+}
+
// set block status to dirty
blk->setCoherenceBits(CacheBlk::DirtyBit);
} else {
@@ -983,7 +1036,7 @@
assert(blk->isSet(CacheBlk::WritableBit));
// Write or WriteLine at the first cache with block in writable
state
if (blk->checkWrite(pkt)) {
-pkt->writeDataToBlock(blk->data, blkSize);
+updateBlockData(blk, pkt, true);
}
// Always mark the line as dirty (and thus transition to the
// Modified state) even if we are a failed StoreCond so we
@@ -1170,6 +1223,7 @@
return true;
}
+const bool has_old_data = blk && blk->isValid();
if (!blk) {
// need to do a replacement
blk = allocateBlock(pkt, writebacks);
@@ -1206,7 +1260,8 @@
}
// nothing else to do; writeback doesn't expect response
assert(!pkt->needsResponse());
-pkt->writeDataToBlock(blk->data, blkSize);
+
+updateBlockData(blk, pkt, has_old_da
[gem5-dev] Change in gem5/gem5[develop]: sim: Add a listener checker to probes
Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/38175 )
Change subject: sim: Add a listener checker to probes
..
sim: Add a listener checker to probes
Add a function to check if a probe has listeners. This can be
used to avoid performing costly tasks when no one is listening.
Change-Id: I8996a0ea298cb7cf97ac8aa9e627331a22bea26e
Signed-off-by: Daniel R. Carvalho
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38175
Maintainer: Jason Lowe-Power
Tested-by: kokoro
Reviewed-by: Jason Lowe-Power
Reviewed-by: Nikos Nikoleris
---
M src/sim/probe/probe.hh
1 file changed, 9 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/sim/probe/probe.hh b/src/sim/probe/probe.hh
index 57132fc..5becc26 100644
--- a/src/sim/probe/probe.hh
+++ b/src/sim/probe/probe.hh
@@ -262,6 +262,15 @@
}
/**
+ * Informs whether any listeners are attached to this probe. This can
+ * be used to avoid performing costly tasks needed by the probe when
+ * nobody is listening.
+ *
+ * @return Whether this probe has any listener.
+ */
+bool hasListeners() const { return listeners.size() > 0; }
+
+/**
* @brief adds a ProbeListener to this ProbePoints notify list.
* @param l the ProbeListener to add to the notify list.
*/
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/38175
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8996a0ea298cb7cf97ac8aa9e627331a22bea26e
Gerrit-Change-Number: 38175
Gerrit-PatchSet: 5
Gerrit-Owner: Daniel Carvalho
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: m5ops, optional extra build flags
Adrian Herrera has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/38416 )
Change subject: util: m5ops, optional extra build flags
..
util: m5ops, optional extra build flags
This increases compilation control for users. Main use case is building
m5ops as part of an image distribution. Specifying a different sysroot
or dynamic linker may be required when the cross toolchain is built as
part of the process.
Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
Signed-off-by: Adrian Herrera
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38416
Reviewed-by: Jason Lowe-Power
Reviewed-by: Gabe Black
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M util/m5/SConstruct
1 file changed, 11 insertions(+), 3 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve; Looks
good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/SConstruct b/util/m5/SConstruct
index 5725f6c..63143a8 100644
--- a/util/m5/SConstruct
+++ b/util/m5/SConstruct
@@ -232,16 +232,24 @@
#
# This also considers scons command line settings which may look
like
# environment variables, but are set after "scons" on the command
line.
-def get_abi_opt(name, default):
+def _extract_abi_opt_val(name, default):
var_name = env.subst('${ABI}.%s' % name)
-env[name] = os.environ.get(
-var_name, ARGUMENTS.get(var_name, default))
+return os.environ.get(var_name, ARGUMENTS.get(var_name,
default))
+def get_abi_opt(name, default):
+env[name] = _extract_abi_opt_val(name, default)
+def append_abi_opt(name):
+env.Append(**{ name: _extract_abi_opt_val(name, '') })
# Process the ABI's settings in the SConsopts file, storing them
# in a copy of the primary environment.
env.SConscript(Dir(root).File('SConsopts'),
exports=[ 'env', 'get_abi_opt' ])
+# The user can pass extra build flags for each ABI
+append_abi_opt('CCFLAGS')
+append_abi_opt('CXXFLAGS')
+append_abi_opt('LINKFLAGS')
+
# Check if this version of QEMU is available for running unit
tests.
env['HAVE_QEMU'] = env.Detect('${QEMU}') is not None
if env['HAVE_QEMU'] and env.Detect('${CC}'):
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/38416
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
Gerrit-Change-Number: 38416
Gerrit-PatchSet: 4
Gerrit-Owner: Adrian Herrera
Gerrit-Reviewer: Adrian Herrera
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: x86: Use the right register type when initializing x86 kvm processes.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/38535 ) Change subject: x86: Use the right register type when initializing x86 kvm processes. .. x86: Use the right register type when initializing x86 kvm processes. Functionally this doesn't matter, since no bitfields are used in the type and it devolves into just being a uint64_t, but we should use CR8 and not CR4 when initializing the CR8 register. Change-Id: Ifc7dc9072d552f7010afce9115427c8ed624ebb9 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38535 Maintainer: Gabe Black Tested-by: kokoro Reviewed-by: Matthew Poremba --- M src/arch/x86/process.cc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Matthew Poremba: Looks good to me, approved Gabe Black: Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index e11d563..e9cdb61 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -387,7 +387,7 @@ tc->setMiscReg(MISCREG_CR4, cr4); -CR4 cr8 = 0; +CR8 cr8 = 0; tc->setMiscReg(MISCREG_CR8, cr8); tc->setMiscReg(MISCREG_MXCSR, 0x1f80); -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/38535 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ifc7dc9072d552f7010afce9115427c8ed624ebb9 Gerrit-Change-Number: 38535 Gerrit-PatchSet: 3 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Alexandru Duțu Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Matthew Poremba Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
