[gem5-dev] [S] Change in gem5/gem5[release-staging-v23-0]: arch-arm: Apply FEAT_IDST to missing ID registers

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/71178?usp=email ) Change subject: arch-arm: Apply FEAT_IDST to missing ID registers .. arch-arm: Apply FEAT_IDST to missing

[gem5-dev] [S] Change in gem5/gem5[develop]: dev-arm: Treat GICv3 reserved addresses as RES0

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/71138?usp=email ) Change subject: dev-arm: Treat GICv3 reserved addresses as RES0 .. dev-arm: Treat GICv3 reserved addresses

[gem5-dev] [S] Change in gem5/gem5[release-staging-v23-0]: arch-arm: Apply FEAT_IDST to AArch32 state registers

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/71178?usp=email ) Change subject: arch-arm: Apply FEAT_IDST to AArch32 state registers .. arch-arm: Apply

[gem5-dev] [S] Change in gem5/gem5[develop]: dev-arm: Treat GICv3 reserved addresses as RES0

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/71138?usp=email ) Change subject: dev-arm: Treat GICv3 reserved addresses as RES0 .. dev-arm: Treat GICv3

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add an ArmAllRelease containing every defined extension

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70958?usp=email ) Change subject: arch-arm: Add an ArmAllRelease containing every defined extension .. arch-arm: Add an

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add an ArmAllRelease containing every defined extension

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70958?usp=email ) Change subject: arch-arm: Add an ArmAllRelease containing every defined extension ..

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_EVT

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70938?usp=email ) Change subject: arch-arm: Implement FEAT_EVT .. arch-arm: Implement FEAT_EVT This extension is

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_HCX

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70939?usp=email ) Change subject: arch-arm: Implement FEAT_HCX .. arch-arm: Implement FEAT_HCX This is just

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix printing of VecElemClass registers

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70697?usp=email ) Change subject: arch-arm: Fix printing of VecElemClass registers .. arch-arm: Fix printing of VecElemClass

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Rename AdvSIMD instruction pool

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70724?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Rename AdvSIMD

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Improve debugging of CC regs accesses

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70718?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Improve debugging of

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Define a AA64ZFR0 data type

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70725?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Define a AA64ZFR0

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Define remaining fields of the arm64 AT_HWCAP entry

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70758?usp=email ) Change subject: arch-arm: Define remaining fields of the arm64 AT_HWCAP entry .. arch-arm: Define

[gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Split decodeDataProcReg into subfunctions

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70717?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Split

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Extend auxiliary vector with AT_HWCAP2 entry

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70760?usp=email ) Change subject: arch-arm: Extend auxiliary vector with AT_HWCAP2 entry .. arch-arm: Extend auxiliary

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCR to be 64-bit wide

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70720?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Extend SCR to be

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Enable FEAT_PAuth in SE mode

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70759?usp=email ) Change subject: arch-arm: Enable FEAT_PAuth in SE mode .. arch-arm: Enable FEAT_PAuth in SE mode It was

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_FLAGM(2)

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70719?usp=email ) Change subject: arch-arm: Implement FEAT_FLAGM(2) .. arch-arm: Implement FEAT_FLAGM(2) Change-Id:

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement trapping of SME registers

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70722?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Implement trapping of

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_IDST

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70723?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Implement FEAT_IDST

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_RNG

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70721?usp=email ) Change subject: arch-arm: Implement FEAT_RNG .. arch-arm: Implement FEAT_RNG Change-Id:

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Extend auxiliary vector with AT_HWCAP2 entry

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70760?usp=email ) Change subject: arch-arm: Extend auxiliary vector with AT_HWCAP2 entry .. arch-arm: Extend

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Define remaining fields of the arm64 AT_HWCAP entry

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70758?usp=email ) Change subject: arch-arm: Define remaining fields of the arm64 AT_HWCAP entry .. arch-arm:

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Enable FEAT_PAuth in SE mode

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70759?usp=email ) Change subject: arch-arm: Enable FEAT_PAuth in SE mode .. arch-arm: Enable FEAT_PAuth in SE

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Re-factor Arm decoder for SVE mixed-sign DOT insts.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70731?usp=email to review the following change. Change subject: arch-arm: Re-factor Arm decoder for SVE

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Declare support for Armv8.2-F64MM.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70729?usp=email to review the following change. Change subject: arch-arm: Declare support for Armv8.2-F64MM.

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Add support for Armv8.2-I8MM NEON extension.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70737?usp=email to review the following change. Change subject: arch-arm: Add support for Armv8.2-I8MM NEON

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Declare support for Armv8.2-I8MM.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70733?usp=email to review the following change. Change subject: arch-arm: Declare support for Armv8.2-I8MM.

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Fix too long lines in existing Arm NEON instructons.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70735?usp=email to review the following change. Change subject: arch-arm: Fix too long lines in existing Arm

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm, cpu, configs: Add new Op Classes for Matrix Multiply insts

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70734?usp=email to review the following change. Change subject: arch-arm, cpu, configs: Add new Op Classes for

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Add support for Arm SVE Integer Matrix instructions.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70730?usp=email to review the following change. Change subject: arch-arm: Add support for Arm SVE Integer

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Added Armv8.2-I8MM SVE mixed-sign dot product instrs.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70732?usp=email to review the following change. Change subject: arch-arm: Added Armv8.2-I8MM SVE mixed-sign dot

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Support Arm SVE Load-Broadcast Octaword instructions.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70727?usp=email to review the following change. Change subject: arch-arm: Support Arm SVE Load-Broadcast

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Add support for Armv8.2-DotProd NEON extension.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70736?usp=email to review the following change. Change subject: arch-arm: Add support for Armv8.2-DotProd NEON

[gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Add support for Arm SVE fmmla instruction.

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70726?usp=email to review the following change. Change subject: arch-arm: Add support for Arm SVE fmmla

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Rename AdvSIMD instruction pool

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70724?usp=email to review the following change. Change subject: arch-arm: Rename AdvSIMD instruction pool

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_FLAGM(2)

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70719?usp=email to review the following change. Change subject: arch-arm: Implement FEAT_FLAGM(2)

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Improve debugging of CC regs accesses

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70718?usp=email to review the following change. Change subject: arch-arm: Improve debugging of CC regs accesses

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement trapping of SME registers

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70722?usp=email to review the following change. Change subject: arch-arm: Implement trapping of SME registers

[gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Split decodeDataProcReg into subfunctions

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70717?usp=email to review the following change. Change subject: arch-arm: Split decodeDataProcReg into

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Define a AA64ZFR0 data type

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70725?usp=email to review the following change. Change subject: arch-arm: Define a AA64ZFR0 data type

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_RNG

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70721?usp=email to review the following change. Change subject: arch-arm: Implement FEAT_RNG

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_IDST

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70723?usp=email to review the following change. Change subject: arch-arm: Implement FEAT_IDST

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCR to be 64-bit wide

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70720?usp=email to review the following change. Change subject: arch-arm: Extend SCR to be 64-bit wide

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix printing of VecElemClass registers

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70697?usp=email ) Change subject: arch-arm: Fix printing of VecElemClass registers .. arch-arm: Fix printing of

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_TLBIOS

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70567?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Implement FEAT_TLBIOS

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add UNSERIALIZE flag to address cpt compatibility

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70557?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Add UNSERIALIZE flag

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement RES0/RES1 with miscreg specifiers

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70563?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Implement RES0/RES1

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Update MISCREG_DBGDIDR to point to Armv8 debug arch

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70561?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Update MISCREG_DBGDIDR

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Implement RAZ/WI with raz specifier

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70560?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Implement RAZ/WI with

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Provide default mask for raz/rao helpers

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70559?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Provide default mask

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Simplify FPSCR writes

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70565?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Simplify FPSCR writes

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCTLR to be 64-bit wide

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70566?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Extend SCTLR to be

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move RO values from ISA::read to the reset field

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70558?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Move RO values from

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Group self hosted debug writes in ISA switch

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70562?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Group self hosted

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Remove unnecessary case in ISA::readMiscReg

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70564?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: Remove unnecessary

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix position of AA64ISAR0.AES bitfield

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70637?usp=email ) Change subject: arch-arm: Fix position of AA64ISAR0.AES bitfield .. arch-arm: Fix position of

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix position of AA64ISAR0.AES bitfield

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70637?usp=email ) Change subject: arch-arm: Fix position of AA64ISAR0.AES bitfield .. arch-arm: Fix position of

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_TLBIOS

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70567?usp=email to review the following change. Change subject: arch-arm: Implement FEAT_TLBIOS

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement RES0/RES1 with miscreg specifiers

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70563?usp=email to review the following change. Change subject: arch-arm: Implement RES0/RES1 with miscreg

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Provide default mask for raz/rao helpers

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70559?usp=email to review the following change. Change subject: arch-arm: Provide default mask for raz/rao

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Update MISCREG_DBGDIDR to point to Armv8 debug arch

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70561?usp=email to review the following change. Change subject: arch-arm: Update MISCREG_DBGDIDR to point to

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add UNSERIALIZE flag to address cpt compatibility

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70557?usp=email to review the following change. Change subject: arch-arm: Add UNSERIALIZE flag to address cpt

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCTLR to be 64-bit wide

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70566?usp=email to review the following change. Change subject: arch-arm: Extend SCTLR to be 64-bit wide

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move RO values from ISA::read to the reset field

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70558?usp=email to review the following change. Change subject: arch-arm: Move RO values from ISA::read to the

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Simplify FPSCR writes

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70565?usp=email to review the following change. Change subject: arch-arm: Simplify FPSCR writes

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Remove unnecessary case in ISA::readMiscReg

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70564?usp=email to review the following change. Change subject: arch-arm: Remove unnecessary case in

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Implement RAZ/WI with raz specifier

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70560?usp=email to review the following change. Change subject: arch-arm: Implement RAZ/WI with raz specifier

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Group self hosted debug writes in ISA switch

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70562?usp=email to review the following change. Change subject: arch-arm: Group self hosted debug writes in ISA

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove clear32/64 methods

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70470?usp=email ) Change subject: arch-arm: Remove clear32/64 methods .. arch-arm: Remove clear32/64 methods Change-Id:

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID64

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70469?usp=email ) Change subject: arch-arm: Remove ISA::initID64 .. arch-arm: Remove ISA::initID64 Signed-off-by: Giacomo

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID64 using BitUnions

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70468?usp=email ) Change subject: arch-arm: Rewrite ISA::initID64 using BitUnions .. arch-arm: Rewrite ISA::initID64 using

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: VMPIDR_EL2 can be used in secure mode as well

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70471?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch-arm: VMPIDR_EL2 can be

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID32

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70467?usp=email ) Change subject: arch-arm: Remove ISA::initID32 .. arch-arm: Remove ISA::initID32 Signed-off-by: Giacomo

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Make MISCREGs reset value configurable

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70458?usp=email ) Change subject: arch-arm: Make MISCREGs reset value configurable .. arch-arm: Make MISCREGs reset value

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID32 using BitUnions

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70466?usp=email ) Change subject: arch-arm: Rewrite ISA::initID32 using BitUnions .. arch-arm: Rewrite ISA::initID32 using

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map CTR_EL0 to AArch32 version

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70463?usp=email ) Change subject: arch-arm: Map CTR_EL0 to AArch32 version .. arch-arm: Map CTR_EL0 to AArch32 version

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Replace 0ing of miscRegs with assignment of reset value

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70457?usp=email ) Change subject: arch-arm: Replace 0ing of miscRegs with assignment of reset value .. arch-arm: Replace

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix read redirection for MIDR register

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70464?usp=email ) Change subject: arch-arm: Fix read redirection for MIDR register .. arch-arm: Fix read redirection for

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MIDR_EL1 to AArch32 version

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70461?usp=email ) Change subject: arch-arm: Map MIDR_EL1 to AArch32 version .. arch-arm: Map MIDR_EL1 to AArch32 version

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move MISCREG init logic from ISA to reset field

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70465?usp=email ) Change subject: arch-arm: Move MISCREG init logic from ISA to reset field .. arch-arm: Move MISCREG init

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MPIDR_EL1 to AArch32 version

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70462?usp=email ) Change subject: arch-arm: Map MPIDR_EL1 to AArch32 version .. arch-arm: Map MPIDR_EL1 to AArch32 version

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Generalize SCTLR_RST behaviour

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70459?usp=email ) Change subject: arch-arm: Generalize SCTLR_RST behaviour .. arch-arm: Generalize SCTLR_RST behaviour This

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove clear32/64 methods

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70470?usp=email to review the following change. Change subject: arch-arm: Remove clear32/64 methods

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID64 using BitUnions

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70468?usp=email to review the following change. Change subject: arch-arm: Rewrite ISA::initID64 using BitUnions

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: VMPIDR_EL2 can be used in secure mode as well

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70471?usp=email to review the following change. Change subject: arch-arm: VMPIDR_EL2 can be used in secure mode

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID64

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70469?usp=email to review the following change. Change subject: arch-arm: Remove ISA::initID64

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID32

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70467?usp=email to review the following change. Change subject: arch-arm: Remove ISA::initID32

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MIDR_EL1 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70461?usp=email to review the following change. Change subject: arch-arm: Map MIDR_EL1 to AArch32 version

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix read redirection for MIDR register

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70464?usp=email to review the following change. Change subject: arch-arm: Fix read redirection for MIDR

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move MISCREG init logic from ISA to reset field

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70465?usp=email to review the following change. Change subject: arch-arm: Move MISCREG init logic from ISA to

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MPIDR_EL1 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70462?usp=email to review the following change. Change subject: arch-arm: Map MPIDR_EL1 to AArch32 version

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70460?usp=email to review the following change. Change subject: arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map CTR_EL0 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70463?usp=email to review the following change. Change subject: arch-arm: Map CTR_EL0 to AArch32 version

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Generalize SCTLR_RST behaviour

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70459?usp=email to review the following change. Change subject: arch-arm: Generalize SCTLR_RST behaviour

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID32 using BitUnions

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70466?usp=email to review the following change. Change subject: arch-arm: Rewrite ISA::initID32 using BitUnions

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Make MISCREGs reset value configurable

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70458?usp=email to review the following change. Change subject: arch-arm: Make MISCREGs reset value

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Replace 0ing of miscRegs with assignment of reset value

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70457?usp=email to review the following change. Change subject: arch-arm: Replace 0ing of miscRegs with

[gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Partial SVE2 Implementation

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70277?usp=email ) Change subject: arch-arm: Partial SVE2 Implementation .. arch-arm: Partial SVE2 Implementation

[gem5-dev] [S] Change in gem5/gem5[develop]: mem: Fix SW prefetch asynchronous handling

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70117?usp=email ) Change subject: mem: Fix SW prefetch asynchronous handling .. mem: Fix SW prefetch asynchronous

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