[gem5-dev] Change in gem5/gem5[develop]: scons: protobuf builder, support source paths

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/55963 )


Change subject: scons: protobuf builder, support source paths
..

scons: protobuf builder, support source paths

Before this patch, the protobuf builder would search for dependencies
only at the build directory. This works if the importing .proto file
imports paths relative to the build directory, but it results in a build
failure if imports are done relative to the source directory of the
importing file.

This patch adds the source directory of the importing file to the set of
paths searched for dependencies, which solves this issue.

Change-Id: I7debd467485a5087276ac005ac08ab01b32cb02e
Signed-off-by: Adrián Herrera Arcila 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55963
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Reviewed-by: Gabe Black 
Tested-by: kokoro 
---
M src/SConscript
1 file changed, 26 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/SConscript b/src/SConscript
index e5b032c..6c8ccaf 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -240,7 +240,8 @@
 return [root + '.pb.cc', root + '.pb.h'], source

 protoc_action = MakeAction('${PROTOC} --cpp_out ${BUILDDIR} '
-'--proto_path ${BUILDDIR} ${SOURCE.get_abspath()}',
+'--proto_path ${BUILDDIR} --proto_path ${SOURCE.dir} '
+'${SOURCE.get_abspath()}',
 Transform("PROTOC"))
 protobuf_builder = Builder(action=protoc_action, emitter=protoc_emitter,
 src_suffix='.proto')

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7debd467485a5087276ac005ac08ab01b32cb02e
Gerrit-Change-Number: 55963
Gerrit-PatchSet: 2
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons: protobuf scanner, support source paths

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/55903 )


Change subject: scons: protobuf scanner, support source paths
..

scons: protobuf scanner, support source paths

Before this patch, the protobuf scanner would detect implicit
dependencies only if the import statement used a path relative to the
build directory. A path with a different format would result in a build
failure.

This is inconvenient because it impedes .proto files within a source
directory to import each other relative to that source.

Moreover, this is critical for EXTRAS directories with .proto files,
because the paths are forced to include the EXTRAS directory itself.

After this patch, the protobuf scanner uses the Classic scanner from
SCons to also detect implicit dependencies in the source path of the
importing .proto file. Regex management is also delegated to the Classic
scanner.

Change-Id: I1ad466813ef44947f3da07371805cb6376e392f0
Signed-off-by: Adrián Herrera Arcila 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55903
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/SConscript
1 file changed, 35 insertions(+), 9 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/SConscript b/src/SConscript
index 61585ec..e5b032c 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -229,15 +229,11 @@
 # no whitespace at the end before or after the ;, and is all on one line.  
This

 # should still cover most cases, and a completely accurate scanner would be
 # MUCH more complex.
-protoc_import_re = re.compile(r'^import\s+\"(.*\.proto)\"\;$', re.M)
-
-def protoc_scanner(node, env, path):
-deps = []
-for imp in protoc_import_re.findall(node.get_text_contents()):
-deps.append(Dir(env['BUILDDIR']).File(imp))
-return deps
-
-env.Append(SCANNERS=Scanner(function=protoc_scanner, skeys=['.proto']))
+protoc_scanner = SCons.Scanner.Classic(name='ProtobufScanner',
+   suffixes=['.proto'],
+   path_variable='BUILDDIR',
+
regex=r'^import\s+\"(.*\.proto)\"\;$')

+env.Append(SCANNERS=protoc_scanner)

 def protoc_emitter(target, source, env):
 root, ext = os.path.splitext(source[0].get_abspath())

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1ad466813ef44947f3da07371805cb6376e392f0
Gerrit-Change-Number: 55903
Gerrit-PatchSet: 3
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Adrián Herrera Arcila 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons: protobuf builder, support source paths

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/55963 )



Change subject: scons: protobuf builder, support source paths
..

scons: protobuf builder, support source paths

Before this patch, the protobuf builder would search for dependencies
only at the build directory. This works if the importing .proto file
imports paths relative to the build directory, but it results in a build
failure if imports are done relative to the source directory of the
importing file.

This patch adds the source directory of the importing file to the set of
paths searched for dependencies, which solves this issue.

Change-Id: I7debd467485a5087276ac005ac08ab01b32cb02e
Signed-off-by: Adrián Herrera Arcila 
---
M src/SConscript
1 file changed, 21 insertions(+), 1 deletion(-)



diff --git a/src/SConscript b/src/SConscript
index e5b032c..6c8ccaf 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -240,7 +240,8 @@
 return [root + '.pb.cc', root + '.pb.h'], source

 protoc_action = MakeAction('${PROTOC} --cpp_out ${BUILDDIR} '
-'--proto_path ${BUILDDIR} ${SOURCE.get_abspath()}',
+'--proto_path ${BUILDDIR} --proto_path ${SOURCE.dir} '
+'${SOURCE.get_abspath()}',
 Transform("PROTOC"))
 protobuf_builder = Builder(action=protoc_action, emitter=protoc_emitter,
 src_suffix='.proto')

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I7debd467485a5087276ac005ac08ab01b32cb02e
Gerrit-Change-Number: 55963
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: scons: protobuf scanner for EXTRAS

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/55903 )



Change subject: scons: protobuf scanner for EXTRAS
..

scons: protobuf scanner for EXTRAS

This solves the following issue:
- An EXTRAS directory "dir" contains a subdirectory "proto" with multiple
  .proto files. Some .proto files import other .proto files within "proto".
- "proto" contains a SConscript file loading the files through the ProtoBuf
  function.
- When SCons runs, it creates "dir/proto" under the $BUILDDIR directory.
- The protoc_scanner scans the .proto files under "dir/proto". Each
  "import a.proto" statement results in an implicit dependency
  "$BUILDDIR/a.proto", which does not exist, causing a build failure.

The correct implicit dependency should be "$BUILDDIR/dir/proto/a.proto". To
fix this, we use the Classic scanner from SCons, which also considers the
source directory of the .proto file that imports when looking for
dependencies. Regex management is also delegated to the Classic scanner.

Note: this still allows the use of paths relative to $BUILDDIR in
import statements by passing the BUILDDIR as a path_variable.

Change-Id: I1ad466813ef44947f3da07371805cb6376e392f0
Signed-off-by: Adrián Herrera Arcila 
---
M src/SConscript
1 file changed, 33 insertions(+), 9 deletions(-)



diff --git a/src/SConscript b/src/SConscript
index 61585ec..e5b032c 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -229,15 +229,11 @@
 # no whitespace at the end before or after the ;, and is all on one line.  
This

 # should still cover most cases, and a completely accurate scanner would be
 # MUCH more complex.
-protoc_import_re = re.compile(r'^import\s+\"(.*\.proto)\"\;$', re.M)
-
-def protoc_scanner(node, env, path):
-deps = []
-for imp in protoc_import_re.findall(node.get_text_contents()):
-deps.append(Dir(env['BUILDDIR']).File(imp))
-return deps
-
-env.Append(SCANNERS=Scanner(function=protoc_scanner, skeys=['.proto']))
+protoc_scanner = SCons.Scanner.Classic(name='ProtobufScanner',
+   suffixes=['.proto'],
+   path_variable='BUILDDIR',
+
regex=r'^import\s+\"(.*\.proto)\"\;$')

+env.Append(SCANNERS=protoc_scanner)

 def protoc_emitter(target, source, env):
 root, ext = os.path.splitext(source[0].get_abspath())

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I1ad466813ef44947f3da07371805cb6376e392f0
Gerrit-Change-Number: 55903
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera 
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[gem5-dev] Change in gem5/gem5[develop]: python: debug, fix Mapping import

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/43023 )


Change subject: python: debug, fix Mapping import
..

python: debug, fix Mapping import

Change "collections.Mapping" to "collections.abc.Mapping".
"collections.Mapping" was an alias, it is deprecated starting from Python  
3.3, and it will be removed in Python 3.10.


Change-Id: Ic257e3c5206eb3d48d4eed85a93fac48bd3b8dc4
Signed-off-by: Adrian Herrera 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43023
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/python/m5/debug.py
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/python/m5/debug.py b/src/python/m5/debug.py
index d808850..787a39e 100644
--- a/src/python/m5/debug.py
+++ b/src/python/m5/debug.py
@@ -24,7 +24,7 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-from collections import Mapping
+from collections.abc import Mapping

 import _m5.debug
 from _m5.debug import SimpleFlag, CompoundFlag

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic257e3c5206eb3d48d4eed85a93fac48bd3b8dc4
Gerrit-Change-Number: 43023
Gerrit-PatchSet: 3
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: python: debug, fix Mapping import

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/43023 )



Change subject: python: debug, fix Mapping import
..

python: debug, fix Mapping import

Change "collections.Mapping" to "collections.abc.Mapping".
"collections.Mapping" was an alias, it is deprecated starting from Python  
3.3,

and it will be removed in Python 3.10.

Change-Id: Ic257e3c5206eb3d48d4eed85a93fac48bd3b8dc4
Signed-off-by: Adrian Herrera 
---
M src/python/m5/debug.py
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/python/m5/debug.py b/src/python/m5/debug.py
index d808850..787a39e 100644
--- a/src/python/m5/debug.py
+++ b/src/python/m5/debug.py
@@ -24,7 +24,7 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-from collections import Mapping
+from collections.abc import Mapping

 import _m5.debug
 from _m5.debug import SimpleFlag, CompoundFlag

--
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Gerrit-Change-Number: 43023
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[gem5-dev] Change in gem5/gem5[hotfix-feat-vhe-fix]: arch-arm: don't expose FEAT_VHE by default

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39695 )


Change subject: arch-arm: don't expose FEAT_VHE by default
..

arch-arm: don't expose FEAT_VHE by default

If FEAT_VHE is implemented and Linux boots in EL2, it programs itself
to operate in EL2. This causes a later boot stall as explained in
https://gem5.atlassian.net/browse/GEM5-901.
We provide a parameter "have_vhe" to enable FEAT_VHE on demand. This is
disabled by default until fixed. This avoids users stalling on the common
case of booting Linux without a hypervisor.

Change-Id: I3ee7be1ca59afc0cbbda59fb3aad4c897c06405f
Signed-off-by: Adrian Herrera 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39695
Reviewed-by: Bobby R. Bruce 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M src/arch/arm/ArmISA.py
M src/arch/arm/ArmSystem.py
M src/arch/arm/isa.cc
M src/arch/arm/isa.hh
M src/arch/arm/system.cc
M src/arch/arm/system.hh
6 files changed, 25 insertions(+), 9 deletions(-)

Approvals:
  Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index ebad774..0725726 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012-2013, 2015-2020 ARM Limited
+# Copyright (c) 2012-2013, 2015-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -108,8 +108,8 @@
 # 4K | 64K | !16K | !BigEndEL0 | !SNSMem | !BigEnd | 8b ASID | 40b PA
 id_aa64mmfr0_el1 = Param.UInt64(0x00f2,
 "AArch64 Memory Model Feature Register 0")
-# PAN | HPDS | VHE
-id_aa64mmfr1_el1 = Param.UInt64(0x00101100,
+# PAN | HPDS | !VHE
+id_aa64mmfr1_el1 = Param.UInt64(0x00101000,
 "AArch64 Memory Model Feature Register 1")
 id_aa64mmfr2_el1 = Param.UInt64(0x,
 "AArch64 Memory Model Feature Register 2")
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index 0ca782f..b2e58a3 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009, 2012-2013, 2015-2020 ARM Limited
+# Copyright (c) 2009, 2012-2013, 2015-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -73,6 +73,8 @@
 "SVE vector length in quadwords (128-bit)")
 have_lse = Param.Bool(True,
 "True if LSE is implemented (ARMv8.1)")
+have_vhe = Param.Bool(False,
+"True if FEAT_VHE (Virtualization Host Extensions) is implemented")
 have_pan = Param.Bool(True,
 "True if Priviledge Access Never is implemented (ARMv8.1)")
 have_secel2 = Param.Bool(True,
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 4ad1125..8adbdab 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2020 ARM Limited
+ * Copyright (c) 2010-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -88,6 +88,7 @@
 haveLargeAsid64 = system->haveLargeAsid64();
 physAddrRange = system->physAddrRange();
 haveSVE = system->haveSVE();
+haveVHE = system->haveVHE();
 havePAN = system->havePAN();
 haveSecEL2 = system->haveSecEL2();
 sveVL = system->sveVL();
@@ -100,6 +101,7 @@
 haveLargeAsid64 = false;
 physAddrRange = 32;  // dummy value
 haveSVE = true;
+haveVHE = false;
 havePAN = false;
 haveSecEL2 = true;
 sveVL = p->sve_vl_se;
@@ -425,6 +427,10 @@
 miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits(
 miscRegs[MISCREG_ID_AA64ISAR0_EL1], 23, 20,
 haveLSE ? 0x2 : 0x0);
+// VHE
+miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
+miscRegs[MISCREG_ID_AA64MMFR1_EL1], 11, 8,
+haveVHE ? 0x1 : 0x0);
 // PAN
 miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
 miscRegs[MISCREG_ID_AA64MMFR1_EL1], 23, 20,
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 910dc2c..40fa561 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2020 ARM Limited
+ * Copyright (c) 2010, 2012-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -94,6 +94,7 @@
 uint8_t physAddrRange;
 bool haveSVE;
 bool haveLSE;
+bool haveVHE;
 bool havePAN;
 bool haveSecEL2;
 bool haveTME;
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 7009b31..0bbc701 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2015,2017-2020 ARM Limited
+ * Copyright (c) 2010, 

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: don't expose FEAT_VHE by default

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40295 )



Change subject: arch-arm: don't expose FEAT_VHE by default
..

arch-arm: don't expose FEAT_VHE by default

If FEAT_VHE is implemented and Linux boots in EL2, it programs itself
to operate in EL2. This causes a later boot stall as explained in
https://gem5.atlassian.net/browse/GEM5-901.
We provide a parameter "have_vhe" to enable FEAT_VHE on demand. This is
disabled by default until fixed. This avoids users stalling on the common
case of booting Linux without a hypervisor.

Change-Id: I3ee7be1ca59afc0cbbda59fb3aad4c897c06405f
Signed-off-by: Adrian Herrera 
---
M src/arch/arm/ArmISA.py
M src/arch/arm/ArmSystem.py
M src/arch/arm/isa.cc
M src/arch/arm/isa.hh
M src/arch/arm/system.cc
M src/arch/arm/system.hh
6 files changed, 24 insertions(+), 8 deletions(-)



diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index bc5f823..59d3919 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012-2013, 2015-2020 ARM Limited
+# Copyright (c) 2012-2013, 2015-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -113,8 +113,8 @@
 # 4K | 64K | !16K | !BigEndEL0 | !SNSMem | !BigEnd | 8b ASID | 40b PA
 id_aa64mmfr0_el1 = Param.UInt64(0x00f2,
 "AArch64 Memory Model Feature Register 0")
-# PAN | HPDS | VHE
-id_aa64mmfr1_el1 = Param.UInt64(0x00101100,
+# PAN | HPDS | !VHE
+id_aa64mmfr1_el1 = Param.UInt64(0x00101000,
 "AArch64 Memory Model Feature Register 1")
 # |VARANGE
 id_aa64mmfr2_el1 = Param.UInt64(0x0001,
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index f7d9cd5..142d6c7 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009, 2012-2013, 2015-2020 ARM Limited
+# Copyright (c) 2009, 2012-2013, 2015-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -72,6 +72,8 @@
 "SVE vector length in quadwords (128-bit)")
 have_lse = Param.Bool(True,
 "True if LSE is implemented (ARMv8.1)")
+have_vhe = Param.Bool(False,
+"True if FEAT_VHE (Virtualization Host Extensions) is implemented")
 have_pan = Param.Bool(True,
 "True if Priviledge Access Never is implemented (ARMv8.1)")
 have_secel2 = Param.Bool(True,
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index f4fabc1..2429e5c 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2020 ARM Limited
+ * Copyright (c) 2010-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -88,6 +88,7 @@
 haveLargeAsid64 = system->haveLargeAsid64();
 physAddrRange = system->physAddrRange();
 haveSVE = system->haveSVE();
+haveVHE = system->haveVHE();
 havePAN = system->havePAN();
 haveSecEL2 = system->haveSecEL2();
 sveVL = system->sveVL();
@@ -100,6 +101,7 @@
 haveLargeAsid64 = false;
 physAddrRange = 32;  // dummy value
 haveSVE = true;
+haveVHE = false;
 havePAN = false;
 haveSecEL2 = true;
 sveVL = p.sve_vl_se;
@@ -426,6 +428,10 @@
 miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits(
 miscRegs[MISCREG_ID_AA64ISAR0_EL1], 23, 20,
 haveLSE ? 0x2 : 0x0);
+// VHE
+miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
+miscRegs[MISCREG_ID_AA64MMFR1_EL1], 11, 8,
+haveVHE ? 0x1 : 0x0);
 // PAN
 miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
 miscRegs[MISCREG_ID_AA64MMFR1_EL1], 23, 20,
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index dce5e37..133c824 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2020 ARM Limited
+ * Copyright (c) 2010, 2012-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -94,6 +94,7 @@
 uint8_t physAddrRange;
 bool haveSVE;
 bool haveLSE;
+bool haveVHE;
 bool havePAN;
 bool haveSecEL2;
 bool haveTME;
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 7f5fa13..783366d 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2015,2017-2020 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2015,2017-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -70,6 +70,7 @@
   _haveSVE(p.have_sve),
   _sveVL(p.sve_vl),
   _haveLSE(p.have_lse),
+  _haveVHE(p.have_vhe),
   _havePAN(

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: don't expose FEAT_VHE by default

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39695 )



Change subject: arch-arm: don't expose FEAT_VHE by default
..

arch-arm: don't expose FEAT_VHE by default

If FEAT_VHE is implemented and Linux boots in EL2, it programs itself
to operate in EL2. This causes a later boot stall as explained in
https://gem5.atlassian.net/browse/GEM5-901.
We provide a parameter "have_vhe" to enable FEAT_VHE on demand. This is
disabled by default until fixed. This avoids users stalling on the common
case of booting Linux without a hypervisor.

Change-Id: I3ee7be1ca59afc0cbbda59fb3aad4c897c06405f
Signed-off-by: Adrian Herrera 
---
M src/arch/arm/ArmISA.py
M src/arch/arm/ArmSystem.py
M src/arch/arm/isa.cc
M src/arch/arm/isa.hh
M src/arch/arm/system.cc
M src/arch/arm/system.hh
6 files changed, 24 insertions(+), 8 deletions(-)



diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index bc5f823..59d3919 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012-2013, 2015-2020 ARM Limited
+# Copyright (c) 2012-2013, 2015-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -113,8 +113,8 @@
 # 4K | 64K | !16K | !BigEndEL0 | !SNSMem | !BigEnd | 8b ASID | 40b PA
 id_aa64mmfr0_el1 = Param.UInt64(0x00f2,
 "AArch64 Memory Model Feature Register 0")
-# PAN | HPDS | VHE
-id_aa64mmfr1_el1 = Param.UInt64(0x00101100,
+# PAN | HPDS | !VHE
+id_aa64mmfr1_el1 = Param.UInt64(0x00101000,
 "AArch64 Memory Model Feature Register 1")
 # |VARANGE
 id_aa64mmfr2_el1 = Param.UInt64(0x0001,
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index f7d9cd5..142d6c7 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009, 2012-2013, 2015-2020 ARM Limited
+# Copyright (c) 2009, 2012-2013, 2015-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -72,6 +72,8 @@
 "SVE vector length in quadwords (128-bit)")
 have_lse = Param.Bool(True,
 "True if LSE is implemented (ARMv8.1)")
+have_vhe = Param.Bool(False,
+"True if FEAT_VHE (Virtualization Host Extensions) is implemented")
 have_pan = Param.Bool(True,
 "True if Priviledge Access Never is implemented (ARMv8.1)")
 have_secel2 = Param.Bool(True,
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index f4fabc1..2429e5c 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2020 ARM Limited
+ * Copyright (c) 2010-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -88,6 +88,7 @@
 haveLargeAsid64 = system->haveLargeAsid64();
 physAddrRange = system->physAddrRange();
 haveSVE = system->haveSVE();
+haveVHE = system->haveVHE();
 havePAN = system->havePAN();
 haveSecEL2 = system->haveSecEL2();
 sveVL = system->sveVL();
@@ -100,6 +101,7 @@
 haveLargeAsid64 = false;
 physAddrRange = 32;  // dummy value
 haveSVE = true;
+haveVHE = false;
 havePAN = false;
 haveSecEL2 = true;
 sveVL = p.sve_vl_se;
@@ -426,6 +428,10 @@
 miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits(
 miscRegs[MISCREG_ID_AA64ISAR0_EL1], 23, 20,
 haveLSE ? 0x2 : 0x0);
+// VHE
+miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
+miscRegs[MISCREG_ID_AA64MMFR1_EL1], 11, 8,
+haveVHE ? 0x1 : 0x0);
 // PAN
 miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
 miscRegs[MISCREG_ID_AA64MMFR1_EL1], 23, 20,
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index dce5e37..133c824 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2020 ARM Limited
+ * Copyright (c) 2010, 2012-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -94,6 +94,7 @@
 uint8_t physAddrRange;
 bool haveSVE;
 bool haveLSE;
+bool haveVHE;
 bool havePAN;
 bool haveSecEL2;
 bool haveTME;
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 7f5fa13..783366d 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2015,2017-2020 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2015,2017-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -70,6 +70,7 @@
   _haveSVE(p.have_sve),
   _sveVL(p.sve_vl),
   _haveLSE(p.have_lse),
+  _haveVHE(p.have_vhe),
   _havePAN(

[gem5-dev] Change in gem5/gem5[develop]: configs: MemConfig, add QoSMemSinkCtrl support

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35797 )


Change subject: configs: MemConfig, add QoSMemSinkCtrl support
..

configs: MemConfig, add QoSMemSinkCtrl support

QoSMemSinkInterface is a special case of memory interface type, similar
to SimpleMemory. It requires a QoSMemSinkCtrl where most model parameters
are exposed. By adding support in "config_mem", we allow configurations
with multiple QoSMemSinkCtrls to be centrally configured, particularly
interleaving parameters.

Change-Id: I46462b55d587acd2c861963bc0279bce92d5f450
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35797
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M configs/common/MemConfig.py
1 file changed, 5 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index 8221f85..63301ab 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -229,11 +229,15 @@
  static_frontend_latency  
= '4ns')

 elif opt_mem_type == "SimpleMemory":
 mem_ctrl = m5.objects.SimpleMemory()
+elif opt_mem_type == "QoSMemSinkInterface":
+mem_ctrl = m5.objects.QoSMemSinkCtrl()
 else:
 mem_ctrl = m5.objects.MemCtrl()

 # Hookup the controller to the interface and add to the  
list

-if opt_mem_type != "SimpleMemory":
+if opt_mem_type == "QoSMemSinkInterface":
+mem_ctrl.interface = dram_intf
+elif opt_mem_type != "SimpleMemory":
 mem_ctrl.dram = dram_intf

 mem_ctrls.append(mem_ctrl)

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/35797
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I46462b55d587acd2c861963bc0279bce92d5f450
Gerrit-Change-Number: 35797
Gerrit-PatchSet: 2
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: Wendy Elsasser 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: SMMUv3, enable interrupt interface

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38555 )


Change subject: dev-arm: SMMUv3, enable interrupt interface
..

dev-arm: SMMUv3, enable interrupt interface

Users can set "irq_interface_enable" to allow software to program
SMMU_IRQ_CTRL and SMMU_IRQ_CTRLACK. This is required to boot Linux v5.4+
in a reasonable time. Notice the model does not implement architectural
interrupt sources, so no assertions will happen.

Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Signed-off-by: Adrian Herrera 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38555
Tested-by: kokoro 
Reviewed-by: Andreas Sandberg 
Maintainer: Andreas Sandberg 
---
M src/dev/arm/SMMUv3.py
M src/dev/arm/smmu_v3.cc
M src/dev/arm/smmu_v3.hh
3 files changed, 17 insertions(+), 2 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
index f53b8ec..f444d64 100644
--- a/src/dev/arm/SMMUv3.py
+++ b/src/dev/arm/SMMUv3.py
@@ -91,6 +91,11 @@
 reg_map = Param.AddrRange('Address range for control registers')
 system = Param.System(Parent.any, "System this device is part of")

+irq_interface_enable = Param.Bool(False,
+"This flag enables software to program SMMU_IRQ_CTRL and "
+"SMMU_IRQ_CTRLACK as if the model implemented architectural "
+"interrupt sources")
+
 device_interfaces = VectorParam.SMMUv3DeviceInterface([],
 "Responder interfaces")

diff --git a/src/dev/arm/smmu_v3.cc b/src/dev/arm/smmu_v3.cc
index 543a11a..3076f5e 100644
--- a/src/dev/arm/smmu_v3.cc
+++ b/src/dev/arm/smmu_v3.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013, 2018-2019 ARM Limited
+ * Copyright (c) 2013, 2018-2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -58,6 +58,7 @@
 requestPort(name() + ".request", *this),
 tableWalkPort(name() + ".walker", *this),
 controlPort(name() + ".control", *this, params.reg_map),
+irqInterfaceEnable(params.irq_interface_enable),
 tlb(params.tlb_entries, params.tlb_assoc, params.tlb_policy, this),
 configCache(params.cfg_entries, params.cfg_assoc, params.cfg_policy,  
this),
 ipaCache(params.ipa_entries, params.ipa_assoc, params.ipa_policy,  
this),

@@ -627,6 +628,13 @@
 assert(pkt->getSize() == sizeof(uint32_t));
 regs.cr0 = regs.cr0ack = pkt->getLE();
 break;
+case offsetof(SMMURegs, irq_ctrl):
+assert(pkt->getSize() == sizeof(uint32_t));
+if (irqInterfaceEnable) {
+warn("SMMUv3::%s No support for interrupt sources",  
__func__);

+regs.irq_ctrl = regs.irq_ctrlack = pkt->getLE();
+}
+break;

 case offsetof(SMMURegs, cr1):
 case offsetof(SMMURegs, cr2):
diff --git a/src/dev/arm/smmu_v3.hh b/src/dev/arm/smmu_v3.hh
index 2d9c1c5..e20ab4d 100644
--- a/src/dev/arm/smmu_v3.hh
+++ b/src/dev/arm/smmu_v3.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013, 2018-2019 ARM Limited
+ * Copyright (c) 2013, 2018-2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -94,6 +94,8 @@
 SMMUTableWalkPort tableWalkPort;
 SMMUControlPort   controlPort;

+const bool irqInterfaceEnable;
+
 ARMArchTLB  tlb;
 ConfigCache configCache;
 IPACacheipaCache;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Gerrit-Change-Number: 38555
Gerrit-PatchSet: 3
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: SMMUv3, enable interrupt interface

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38555 )



Change subject: dev-arm: SMMUv3, enable interrupt interface
..

dev-arm: SMMUv3, enable interrupt interface

Users can set "irq_interface_enable" to allow software to program
SMMU_IRQ_CTRL and SMMU_IRQ_CTRLACK. This is required to boot Linux v5.4+
in a reasonable time. Notice the model does not implement architectural
interrupt sources, so no assertions will happen.

Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Signed-off-by: Adrian Herrera 
---
M src/dev/arm/SMMUv3.py
M src/dev/arm/smmu_v3.cc
M src/dev/arm/smmu_v3.hh
3 files changed, 17 insertions(+), 2 deletions(-)



diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
index f53b8ec..f444d64 100644
--- a/src/dev/arm/SMMUv3.py
+++ b/src/dev/arm/SMMUv3.py
@@ -91,6 +91,11 @@
 reg_map = Param.AddrRange('Address range for control registers')
 system = Param.System(Parent.any, "System this device is part of")

+irq_interface_enable = Param.Bool(False,
+"This flag enables software to program SMMU_IRQ_CTRL and "
+"SMMU_IRQ_CTRLACK as if the model implemented architectural "
+"interrupt sources")
+
 device_interfaces = VectorParam.SMMUv3DeviceInterface([],
 "Responder interfaces")

diff --git a/src/dev/arm/smmu_v3.cc b/src/dev/arm/smmu_v3.cc
index 543a11a..3076f5e 100644
--- a/src/dev/arm/smmu_v3.cc
+++ b/src/dev/arm/smmu_v3.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013, 2018-2019 ARM Limited
+ * Copyright (c) 2013, 2018-2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -58,6 +58,7 @@
 requestPort(name() + ".request", *this),
 tableWalkPort(name() + ".walker", *this),
 controlPort(name() + ".control", *this, params.reg_map),
+irqInterfaceEnable(params.irq_interface_enable),
 tlb(params.tlb_entries, params.tlb_assoc, params.tlb_policy, this),
 configCache(params.cfg_entries, params.cfg_assoc, params.cfg_policy,  
this),
 ipaCache(params.ipa_entries, params.ipa_assoc, params.ipa_policy,  
this),

@@ -627,6 +628,13 @@
 assert(pkt->getSize() == sizeof(uint32_t));
 regs.cr0 = regs.cr0ack = pkt->getLE();
 break;
+case offsetof(SMMURegs, irq_ctrl):
+assert(pkt->getSize() == sizeof(uint32_t));
+if (irqInterfaceEnable) {
+warn("SMMUv3::%s No support for interrupt sources",  
__func__);

+regs.irq_ctrl = regs.irq_ctrlack = pkt->getLE();
+}
+break;

 case offsetof(SMMURegs, cr1):
 case offsetof(SMMURegs, cr2):
diff --git a/src/dev/arm/smmu_v3.hh b/src/dev/arm/smmu_v3.hh
index 2d9c1c5..e20ab4d 100644
--- a/src/dev/arm/smmu_v3.hh
+++ b/src/dev/arm/smmu_v3.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013, 2018-2019 ARM Limited
+ * Copyright (c) 2013, 2018-2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -94,6 +94,8 @@
 SMMUTableWalkPort tableWalkPort;
 SMMUControlPort   controlPort;

+const bool irqInterfaceEnable;
+
 ARMArchTLB  tlb;
 ConfigCache configCache;
 IPACacheipaCache;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Gerrit-Change-Number: 38555
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: util: m5ops, optional extra build flags

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38416 )


Change subject: util: m5ops, optional extra build flags
..

util: m5ops, optional extra build flags

This increases compilation control for users. Main use case is building
m5ops as part of an image distribution. Specifying a different sysroot
or dynamic linker may be required when the cross toolchain is built as
part of the process.

Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
Signed-off-by: Adrian Herrera 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38416
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Gabe Black 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M util/m5/SConstruct
1 file changed, 11 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/util/m5/SConstruct b/util/m5/SConstruct
index 5725f6c..63143a8 100644
--- a/util/m5/SConstruct
+++ b/util/m5/SConstruct
@@ -232,16 +232,24 @@
 #
 # This also considers scons command line settings which may look  
like
 # environment variables, but are set after "scons" on the command  
line.

-def get_abi_opt(name, default):
+def _extract_abi_opt_val(name, default):
 var_name = env.subst('${ABI}.%s' % name)
-env[name] = os.environ.get(
-var_name, ARGUMENTS.get(var_name, default))
+return os.environ.get(var_name, ARGUMENTS.get(var_name,  
default))

+def get_abi_opt(name, default):
+env[name] = _extract_abi_opt_val(name, default)
+def append_abi_opt(name):
+env.Append(**{ name: _extract_abi_opt_val(name, '') })

 # Process the ABI's settings in the SConsopts file, storing them
 # in a copy of the primary environment.
 env.SConscript(Dir(root).File('SConsopts'),
exports=[ 'env', 'get_abi_opt' ])

+# The user can pass extra build flags for each ABI
+append_abi_opt('CCFLAGS')
+append_abi_opt('CXXFLAGS')
+append_abi_opt('LINKFLAGS')
+
 # Check if this version of QEMU is available for running unit  
tests.

 env['HAVE_QEMU'] = env.Detect('${QEMU}') is not None
 if env['HAVE_QEMU'] and env.Detect('${CC}'):

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
Gerrit-Change-Number: 38416
Gerrit-PatchSet: 4
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: term, remove install target

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38415 )


Change subject: util: term, remove install target
..

util: term, remove install target

Installing the term utility within the host filesystem is an unlikely
scenario. Most times, the utility will be used in place or trivially
copied to a local directory within the PATH.

Furthermore, the install target hardcoded a privileged installation,
which is a non-standard and insecure technique.

Change-Id: I1592a304017c6b24a9421aa353229fb5a5baae43
Signed-off-by: Adrian Herrera 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38415
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M util/term/Makefile
1 file changed, 0 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/util/term/Makefile b/util/term/Makefile
index 4aa1c52..ab4f749 100644
--- a/util/term/Makefile
+++ b/util/term/Makefile
@@ -31,9 +31,6 @@
 m5term: term.c
$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LDLIBS)

-install: m5term
-   $(SUDO) install -o root -m 555 m5term /usr/local/bin
-
 clean:
@rm -f m5term *~ .#*


--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1592a304017c6b24a9421aa353229fb5a5baae43
Gerrit-Change-Number: 38415
Gerrit-PatchSet: 2
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: m5ops, optional extra build flags

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38416 )



Change subject: util: m5ops, optional extra build flags
..

util: m5ops, optional extra build flags

This increases compilation control for users. Main use case is building
m5ops as part of an image distribution. Specifying a different sysroot
or dynamic linker may be required when the cross toolchain is built as
part of the process.

Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
Signed-off-by: Adrian Herrera 
---
M util/m5/SConstruct
1 file changed, 9 insertions(+), 3 deletions(-)



diff --git a/util/m5/SConstruct b/util/m5/SConstruct
index 6f1ca9f..61cee6a 100644
--- a/util/m5/SConstruct
+++ b/util/m5/SConstruct
@@ -197,16 +197,22 @@
 #
 # This also considers scons command line settings which may look  
like
 # environment variables, but are set after "scons" on the command  
line.

-def get_abi_opt(name, default):
+def get_abi_opt_val(name, default):
 var_name = env.subst('${ABI}.%s' % name)
-env[name] = os.environ.get(
-var_name, ARGUMENTS.get(var_name, default))
+return os.environ.get(var_name, ARGUMENTS.get(var_name,  
default))

+def get_abi_opt(name, default):
+env[name] = get_abi_opt_val(name, default)

 # Process the ABI's settings in the SConsopts file, storing them
 # in a copy of the primary environment.
 env.SConscript(Dir(root).File('SConsopts'),
exports=[ 'env', 'get_abi_opt' ])

+# The user can pass extra build flags for each ABI
+env.Append(CFLAGS=[get_abi_opt_val('CFLAGS', '')])
+env.Append(CXXFLAGS=[get_abi_opt_val('CXXFLAGS', '')])
+env.Append(CXXFLAGS=[get_abi_opt_val('LDFLAGS', '')])
+
 # Check if this version of QEMU is available for running unit  
tests.

 env['HAVE_QEMU'] = env.Detect('${QEMU}') is not None
 if env['HAVE_QEMU'] and env.Detect('${CC}'):

--
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[gem5-dev] Change in gem5/gem5[develop]: util: term, remove install target

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38415 )



Change subject: util: term, remove install target
..

util: term, remove install target

Installing the term utility within the host filesystem is an unlikely
scenario. Most times, the utility will be used in place or trivially
copied to a local directory within the PATH.

Furthermore, the install target hardcoded a privileged installation,
which is a non-standard and insecure technique.

Change-Id: I1592a304017c6b24a9421aa353229fb5a5baae43
Signed-off-by: Adrian Herrera 
---
M util/term/Makefile
1 file changed, 0 insertions(+), 3 deletions(-)



diff --git a/util/term/Makefile b/util/term/Makefile
index 4aa1c52..ab4f749 100644
--- a/util/term/Makefile
+++ b/util/term/Makefile
@@ -31,9 +31,6 @@
 m5term: term.c
$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LDLIBS)

-install: m5term
-   $(SUDO) install -o root -m 555 m5term /usr/local/bin
-
 clean:
@rm -f m5term *~ .#*


--
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Gerrit-Branch: develop
Gerrit-Change-Id: I1592a304017c6b24a9421aa353229fb5a5baae43
Gerrit-Change-Number: 38415
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera 
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[gem5-dev] Change in gem5/gem5[develop]: util: m5term, fix LDFLAGS, standard make variables

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38256 )


Change subject: util: m5term, fix LDFLAGS, standard make variables
..

util: m5term, fix LDFLAGS, standard make variables

Enables build systems to provide necessary flags to build m5term.
Useful specially if a different linker is intended to be used.

Change-Id: If7f867cc0965d6ad4627b5421e00a99cc3d64989
Signed-off-by: Adrian Herrera 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38256
Reviewed-by: Gabe Black 
Reviewed-by: Jason Lowe-Power 
Maintainer: Gabe Black 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M util/term/Makefile
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/util/term/Makefile b/util/term/Makefile
index 658b961..4aa1c52 100644
--- a/util/term/Makefile
+++ b/util/term/Makefile
@@ -24,12 +24,12 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-CCFLAGS= -g -O0
+CFLAGS ?= -g -O0

 default: m5term

 m5term: term.c
-   $(CC) $(LFLAGS) -o $@ $^
+   $(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LDLIBS)

 install: m5term
$(SUDO) install -o root -m 555 m5term /usr/local/bin

--
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Gerrit-Branch: develop
Gerrit-Change-Id: If7f867cc0965d6ad4627b5421e00a99cc3d64989
Gerrit-Change-Number: 38256
Gerrit-PatchSet: 3
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: m5term, remove hardcoded superuser install

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38296 )



Change subject: util: m5term, remove hardcoded superuser install
..

util: m5term, remove hardcoded superuser install

This is a non-standard practice. If the user needs to install the
utility in a privileged directory, it should run "sudo make install"
instead.

Change-Id: I55b7221f2e6215a14b12902ef96221fb35701837
Signed-off-by: Adrian Herrera 
---
M util/term/Makefile
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/util/term/Makefile b/util/term/Makefile
index fd98aae..2242856 100644
--- a/util/term/Makefile
+++ b/util/term/Makefile
@@ -37,7 +37,7 @@

 install: m5term
mkdir -p $(DESTDIR)$(bindir)
-   $(SUDO) install -o root -m 555 m5term $(DESTDIR)$(bindir)
+   install -m 755 m5term $(DESTDIR)$(bindir)

 clean:
@rm -f m5term *~ .#*

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I55b7221f2e6215a14b12902ef96221fb35701837
Gerrit-Change-Number: 38296
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera 
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[gem5-dev] Change in gem5/gem5[develop]: util: m5term, configurable install directories

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38295 )



Change subject: util: m5term, configurable install directories
..

util: m5term, configurable install directories

Use standard GNU Make install directory variables. Build systems can
configure these to install the utility in custom staging areas.

Change-Id: Ib8d73ec717e1c8c99b24df33e93e1a74cf8aa717
Signed-off-by: Adrian Herrera 
---
M util/term/Makefile
1 file changed, 6 insertions(+), 1 deletion(-)



diff --git a/util/term/Makefile b/util/term/Makefile
index 4aa1c52..fd98aae 100644
--- a/util/term/Makefile
+++ b/util/term/Makefile
@@ -24,6 +24,10 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+prefix ?= /usr/local
+exec_prefix ?= $(prefix)
+bindir ?= $(exec_prefix)/bin
+
 CFLAGS ?= -g -O0

 default: m5term
@@ -32,7 +36,8 @@
$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LDLIBS)

 install: m5term
-   $(SUDO) install -o root -m 555 m5term /usr/local/bin
+   mkdir -p $(DESTDIR)$(bindir)
+   $(SUDO) install -o root -m 555 m5term $(DESTDIR)$(bindir)

 clean:
@rm -f m5term *~ .#*

--
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Gerrit-Change-Id: Ib8d73ec717e1c8c99b24df33e93e1a74cf8aa717
Gerrit-Change-Number: 38295
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[gem5-dev] Change in gem5/gem5[develop]: util: m5term, fix LDFLAGS, standard make variables

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38256 )



Change subject: util: m5term, fix LDFLAGS, standard make variables
..

util: m5term, fix LDFLAGS, standard make variables

Enables build systems to provide necessary flags to build m5term.
Useful specially if a different linker is intended to be used.

Change-Id: If7f867cc0965d6ad4627b5421e00a99cc3d64989
Signed-off-by: Adrian Herrera 
---
M util/term/Makefile
1 file changed, 2 insertions(+), 2 deletions(-)



diff --git a/util/term/Makefile b/util/term/Makefile
index 658b961..4aa1c52 100644
--- a/util/term/Makefile
+++ b/util/term/Makefile
@@ -24,12 +24,12 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-CCFLAGS= -g -O0
+CFLAGS ?= -g -O0

 default: m5term

 m5term: term.c
-   $(CC) $(LFLAGS) -o $@ $^
+   $(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LDLIBS)

 install: m5term
$(SUDO) install -o root -m 555 m5term /usr/local/bin

--
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Gerrit-Branch: develop
Gerrit-Change-Id: If7f867cc0965d6ad4627b5421e00a99cc3d64989
Gerrit-Change-Number: 38256
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[gem5-dev] Change in gem5/gem5[develop]: configs: MemConfig, add QoSMemSinkCtrl support

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35797 )



Change subject: configs: MemConfig, add QoSMemSinkCtrl support
..

configs: MemConfig, add QoSMemSinkCtrl support

QoSMemSinkInterface is a special case of memory interface type, similar
to SimpleMemory. It requires a QoSMemSinkCtrl where most model parameters
are exposed. By adding support in "config_mem", we allow configurations
with multiple QoSMemSinkCtrls to be centrally configured, particularly
interleaving parameters.

Change-Id: I46462b55d587acd2c861963bc0279bce92d5f450
---
M configs/common/MemConfig.py
1 file changed, 5 insertions(+), 1 deletion(-)



diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index 8221f85..63301ab 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -229,11 +229,15 @@
  static_frontend_latency  
= '4ns')

 elif opt_mem_type == "SimpleMemory":
 mem_ctrl = m5.objects.SimpleMemory()
+elif opt_mem_type == "QoSMemSinkInterface":
+mem_ctrl = m5.objects.QoSMemSinkCtrl()
 else:
 mem_ctrl = m5.objects.MemCtrl()

 # Hookup the controller to the interface and add to the  
list

-if opt_mem_type != "SimpleMemory":
+if opt_mem_type == "QoSMemSinkInterface":
+mem_ctrl.interface = dram_intf
+elif opt_mem_type != "SimpleMemory":
 mem_ctrl.dram = dram_intf

 mem_ctrls.append(mem_ctrl)

--
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Gerrit-Change-Id: I46462b55d587acd2c861963bc0279bce92d5f450
Gerrit-Change-Number: 35797
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Gerrit-Owner: Adrian Herrera 
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: SMMUv3, default CMDQ entries to 128

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35297 )


Change subject: dev-arm: SMMUv3, default CMDQ entries to 128
..

dev-arm: SMMUv3, default CMDQ entries to 128

From Linux 587e6c10a7ce89a5924fdbeff2ec524fbd6a124b, SMMUv3
implementations in 64-bit platforms must report a minimum of 128 CMDQ
entries via SMMU_IDR1. Otherwise, the SMMUv3 Linux driver returns -ENXIO.

Change-Id: I304aac1b734515b3077003e8d67cc19730afc67f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35297
Reviewed-by: Giacomo Travaglini 
Maintainer: Giacomo Travaglini 
Tested-by: kokoro 
---
M src/dev/arm/SMMUv3.py
1 file changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
index 29c1568..f53b8ec 100644
--- a/src/dev/arm/SMMUv3.py
+++ b/src/dev/arm/SMMUv3.py
@@ -162,9 +162,9 @@
 # [0] S2P = 0b1, Stage 2 translation supported.
 smmu_idr0 = Param.UInt32(0x094C100F, "SMMU_IDR0 register");

-# [25:21] CMDQS = 0b00101, Maximum number of Command queue entries
-# as log 2 (entries) (0b00101 = 32 entries).
-smmu_idr1 = Param.UInt32(0x00A0, "SMMU_IDR1 register");
+# [25:21] CMDQS = 0b00111, Maximum number of Command queue entries
+# as log 2 (entries) (0b00111 = 128 entries).
+smmu_idr1 = Param.UInt32(0x00E0, "SMMU_IDR1 register");

 smmu_idr2 = Param.UInt32(0, "SMMU_IDR2 register");
 smmu_idr3 = Param.UInt32(0, "SMMU_IDR3 register");

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I304aac1b734515b3077003e8d67cc19730afc67f
Gerrit-Change-Number: 35297
Gerrit-PatchSet: 2
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Ciro Santilli 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: SMMUv3, default CMDQ entries to 128

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35297 )



Change subject: dev-arm: SMMUv3, default CMDQ entries to 128
..

dev-arm: SMMUv3, default CMDQ entries to 128

From Linux 587e6c10a7ce89a5924fdbeff2ec524fbd6a124b, SMMUv3
implementations in 64-bit platforms must report a minimum of 128 CMDQ
entries via SMMU_IDR1. Otherwise, the SMMUv3 Linux driver returns -ENXIO.

Change-Id: I304aac1b734515b3077003e8d67cc19730afc67f
---
M src/dev/arm/SMMUv3.py
1 file changed, 3 insertions(+), 3 deletions(-)



diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
index 29c1568..f53b8ec 100644
--- a/src/dev/arm/SMMUv3.py
+++ b/src/dev/arm/SMMUv3.py
@@ -162,9 +162,9 @@
 # [0] S2P = 0b1, Stage 2 translation supported.
 smmu_idr0 = Param.UInt32(0x094C100F, "SMMU_IDR0 register");

-# [25:21] CMDQS = 0b00101, Maximum number of Command queue entries
-# as log 2 (entries) (0b00101 = 32 entries).
-smmu_idr1 = Param.UInt32(0x00A0, "SMMU_IDR1 register");
+# [25:21] CMDQS = 0b00111, Maximum number of Command queue entries
+# as log 2 (entries) (0b00111 = 128 entries).
+smmu_idr1 = Param.UInt32(0x00E0, "SMMU_IDR1 register");

 smmu_idr2 = Param.UInt32(0, "SMMU_IDR2 register");
 smmu_idr3 = Param.UInt32(0, "SMMU_IDR3 register");

--
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: FVPBasePwrCtrl, fix vector resizing

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35075 )


Change subject: dev-arm: FVPBasePwrCtrl, fix vector resizing
..

dev-arm: FVPBasePwrCtrl, fix vector resizing

(1) ThreadContexts are registered into System in BaseCPU::init.
(2) FVPBasePwrCtrl state is resized based on registered ThreadContexts
in FVPBasePwrCtrl::init.

FVPBasePwrCtrl::init may be called before BaseCPU::init based on the
model names alphabetical order, leading to segmentation faults.
To fix this, (2) is now carried out in FVPBasePwrCtrl::startup.

Change-Id: Ica6c5b7448da556d61aee53f8777a709fcad2212
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35075
Reviewed-by: Giacomo Travaglini 
Maintainer: Giacomo Travaglini 
Tested-by: kokoro 
---
M src/dev/arm/fvp_base_pwr_ctrl.cc
M src/dev/arm/fvp_base_pwr_ctrl.hh
2 files changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/dev/arm/fvp_base_pwr_ctrl.cc  
b/src/dev/arm/fvp_base_pwr_ctrl.cc

index fc66e1c..d6b6a59 100644
--- a/src/dev/arm/fvp_base_pwr_ctrl.cc
+++ b/src/dev/arm/fvp_base_pwr_ctrl.cc
@@ -58,13 +58,13 @@
 }

 void
-FVPBasePwrCtrl::init()
+FVPBasePwrCtrl::startup()
 {
 // All cores are ON by default (PwrStatus.{l0,l1} = 0b1)
 corePwrStatus.resize(sys->threads.size(), 0x6000);
 for (const auto &tc : sys->threads)
 poweredCoresPerCluster[tc->socketId()] += 1;
-BasicPioDevice::init();
+BasicPioDevice::startup();
 }

 void
diff --git a/src/dev/arm/fvp_base_pwr_ctrl.hh  
b/src/dev/arm/fvp_base_pwr_ctrl.hh

index aa446a8..92c3198 100644
--- a/src/dev/arm/fvp_base_pwr_ctrl.hh
+++ b/src/dev/arm/fvp_base_pwr_ctrl.hh
@@ -88,7 +88,7 @@
  */
 void clearWakeRequest(ThreadContext *const tc);

-void init() override;
+void startup() override;

   protected:
 Tick read(PacketPtr pkt) override;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ica6c5b7448da556d61aee53f8777a709fcad2212
Gerrit-Change-Number: 35075
Gerrit-PatchSet: 2
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Tiago Mück 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: FVPBasePwrCtrl, fix vector resizing

[Adrian Herrera (Gerrit) via gem5-dev]

Adrian Herrera has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35075 )



Change subject: dev-arm: FVPBasePwrCtrl, fix vector resizing
..

dev-arm: FVPBasePwrCtrl, fix vector resizing

(1) ThreadContexts are registered into System in BaseCPU::init.
(2) FVPBasePwrCtrl state is resized based on registered ThreadContexts
in FVPBasePwrCtrl::init.

FVPBasePwrCtrl::init may be called before BaseCPU::init based on the
model names alphabetical order, leading to segmentation faults.
To fix this, (2) is now carried out in FVPBasePwrCtrl::startup.

Change-Id: Ica6c5b7448da556d61aee53f8777a709fcad2212
---
M src/dev/arm/fvp_base_pwr_ctrl.cc
M src/dev/arm/fvp_base_pwr_ctrl.hh
2 files changed, 3 insertions(+), 3 deletions(-)



diff --git a/src/dev/arm/fvp_base_pwr_ctrl.cc  
b/src/dev/arm/fvp_base_pwr_ctrl.cc

index fc66e1c..d6b6a59 100644
--- a/src/dev/arm/fvp_base_pwr_ctrl.cc
+++ b/src/dev/arm/fvp_base_pwr_ctrl.cc
@@ -58,13 +58,13 @@
 }

 void
-FVPBasePwrCtrl::init()
+FVPBasePwrCtrl::startup()
 {
 // All cores are ON by default (PwrStatus.{l0,l1} = 0b1)
 corePwrStatus.resize(sys->threads.size(), 0x6000);
 for (const auto &tc : sys->threads)
 poweredCoresPerCluster[tc->socketId()] += 1;
-BasicPioDevice::init();
+BasicPioDevice::startup();
 }

 void
diff --git a/src/dev/arm/fvp_base_pwr_ctrl.hh  
b/src/dev/arm/fvp_base_pwr_ctrl.hh

index aa446a8..92c3198 100644
--- a/src/dev/arm/fvp_base_pwr_ctrl.hh
+++ b/src/dev/arm/fvp_base_pwr_ctrl.hh
@@ -88,7 +88,7 @@
  */
 void clearWakeRequest(ThreadContext *const tc);

-void init() override;
+void startup() override;

   protected:
 Tick read(PacketPtr pkt) override;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/35075
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ica6c5b7448da556d61aee53f8777a709fcad2212
Gerrit-Change-Number: 35075
Gerrit-PatchSet: 1
Gerrit-Owner: Adrian Herrera 
Gerrit-MessageType: newchange
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