[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: arch-arm: Instantiate a single HTM checkpoint at ISA::startup

2020-09-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/35016 ) Change subject: arch-arm: Instantiate a single HTM checkpoint at ISA::startup .. arch-arm: Instantiate a single

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: cpu: Allow storing an invalid HTM checkpoint

2020-09-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/35015 ) Change subject: cpu: Allow storing an invalid HTM checkpoint .. cpu: Allow storing an invalid HTM checkpoint

[gem5-dev] Change in gem5/gem5[develop]: ext: Add timing indications to every TestCase

2020-09-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32653 ) Change subject: ext: Add timing indications to every TestCase .. ext: Add timing indications to every TestCase The

[gem5-dev] Change in gem5/gem5[develop]: ext: Monkeypatch os.waitpid to extract CPU time from subprocess

2020-09-25 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32652 ) Change subject: ext: Monkeypatch os.waitpid to extract CPU time from subprocess .. ext: Monkeypatch os.waitpid to

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: arch-arm: Instantiate a single HTM checkpoint at ISA::startup

2020-09-23 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Timothy Hayes, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/35016 to review the following change. Change subject: arch-arm: Instantiate a single HTM checkpoint at ISA::startup

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: cpu: Allow storing an invalid HTM checkpoint

2020-09-23 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Timothy Hayes, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/35015 to review the following change. Change subject: cpu: Allow storing an invalid HTM checkpoint

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Implement GICv4.1 GICD_TYPER2 as RES0

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34875 ) Change subject: dev-arm: Implement GICv4.1 GICD_TYPER2 as RES0 .. dev-arm: Implement GICv4.1 GICD_TYPER2 as RES0 If

[gem5-dev] Change in gem5/gem5[develop]: cpu: BaseCPU using ArchMMU instead of ArchDTB/ArchITB

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/34976 to review the following change. Change subject: cpu: BaseCPU using ArchMMU instead of ArchDTB/ArchITB

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Replace any getDTBPtr/getITBPtr usage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34978 ) Change subject: arch-arm: Replace any getDTBPtr/getITBPtr usage .. arch-arm: Replace any

[gem5-dev] Change in gem5/gem5[develop]: arch: Add generic BaseMMU

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/34975 to review the following change. Change subject: arch: Add generic BaseMMU .. arch: Add

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Replace any getDTBPtr/getITBPtr usage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34979 ) Change subject: arch-x86: Replace any getDTBPtr/getITBPtr usage .. arch-x86: Replace any

[gem5-dev] Change in gem5/gem5[develop]: cpu: Remove unused demapInstPage and demapDataPage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34977 ) Change subject: cpu: Remove unused demapInstPage and demapDataPage .. cpu: Remove unused demapInstPage

[gem5-dev] Change in gem5/gem5[develop]: cpu: Remove the old getDTBPtr/getITBPtr virtual methods

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34984 ) Change subject: cpu: Remove the old getDTBPtr/getITBPtr virtual methods .. cpu: Remove the old

[gem5-dev] Change in gem5/gem5[develop]: arch-sparc: Replace any getDTBPtr/getITBPtr usage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34982 ) Change subject: arch-sparc: Replace any getDTBPtr/getITBPtr usage .. arch-sparc: Replace any

[gem5-dev] Change in gem5/gem5[develop]: sim: Replace any getDTBPtr/getITBPtr usage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34981 ) Change subject: sim: Replace any getDTBPtr/getITBPtr usage .. sim: Replace any getDTBPtr/getITBPtr usage

[gem5-dev] Change in gem5/gem5[develop]: mem: Replace any getDTBPtr/getITBPtr usage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34983 ) Change subject: mem: Replace any getDTBPtr/getITBPtr usage .. mem: Replace any getDTBPtr/getITBPtr usage

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Replace any getDTBPtr/getITBPtr usage

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34980 ) Change subject: arch-riscv: Replace any getDTBPtr/getITBPtr usage .. arch-riscv: Replace any

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: TLBI ALLE2IS should broadcast to the IS domain

2020-09-22 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34795 ) Change subject: arch-arm: TLBI ALLE2IS should broadcast to the IS domain .. arch-arm: TLBI ALLE2IS should broadcast

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add ID_MMFR4{,EL1} system registers

2020-09-21 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34876 ) Change subject: arch-arm: Add ID_MMFR4{,EL1} system registers .. arch-arm: Add ID_MMFR4{,EL1} system

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Implement GICv4.1 GICD_TYPER2 as RES0

2020-09-21 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Andreas Sandberg, Ciro Santilli, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/34875 to review the following change. Change subject: dev-arm: Implement GICv4.1 GICD_TYPER2 as RES0

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: TLBI ALLE2IS should broadcast to the IS domain

2020-09-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/34795 to review the following change. Change subject: arch-arm: TLBI ALLE2IS should broadcast to the IS domain

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: arch-arm: Fix ArmISA namespace requirement for Arm KVM

2020-09-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34418 ) Change subject: arch-arm: Fix ArmISA namespace requirement for Arm KVM .. arch-arm: Fix ArmISA namespace requirement

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix ArmISA namespace requirement for Arm KVM

2020-09-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34418 ) Change subject: arch-arm: Fix ArmISA namespace requirement for Arm KVM .. arch-arm: Fix ArmISA namespace

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Implement Arm MHU (Message Handling Unit)

2020-09-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34378 ) Change subject: dev-arm: Implement Arm MHU (Message Handling Unit) .. dev-arm: Implement Arm MHU (Message

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Define a ParentMem object for DTB autogen

2020-09-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34376 ) Change subject: dev-arm: Define a ParentMem object for DTB autogen .. dev-arm: Define a ParentMem object

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Add doorbell interface class

2020-09-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34377 ) Change subject: dev-arm: Add doorbell interface class .. dev-arm: Add doorbell interface class JIRA:

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Adding a SRAM in VExpress_GEM5_V1

2020-09-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34375 ) Change subject: dev-arm: Adding a SRAM in VExpress_GEM5_V1 .. dev-arm: Adding a SRAM in VExpress_GEM5_V1

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Instantiate SCMI in VExpress_GEM5 platforms

2020-09-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34380 ) Change subject: dev-arm: Instantiate SCMI in VExpress_GEM5 platforms .. dev-arm: Instantiate SCMI in

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix ArmISA namespace requirement for TME instructions

2020-09-09 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34235 ) Change subject: arch-arm: Fix ArmISA namespace requirement for TME instructions .. arch-arm: Fix ArmISA namespace

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix ArmISA namespace requirement for TME instructions

2020-09-09 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34235 ) Change subject: arch-arm: Fix ArmISA namespace requirement for TME instructions .. arch-arm: Fix

[gem5-dev] Change in gem5/gem5[develop]: cpu: HTM Implementation for O3CPU

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30328 ) Change subject: cpu: HTM Implementation for O3CPU .. cpu: HTM Implementation for O3CPU JIRA:

[gem5-dev] Change in gem5/gem5[develop]: mem: Add HTM fields to the Packet object

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30318 ) Change subject: mem: Add HTM fields to the Packet object .. mem: Add HTM fields to the Packet object JIRA:

[gem5-dev] Change in gem5/gem5[develop]: cpu: HTM Implementation for TimingCPU

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30327 ) Change subject: cpu: HTM Implementation for TimingCPU .. cpu: HTM Implementation for TimingCPU JIRA:

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM ThreadContext API

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30324 ) Change subject: cpu: Add HTM ThreadContext API .. cpu: Add HTM ThreadContext API JIRA:

[gem5-dev] Change in gem5/gem5[develop]: sim: Add HTM Generic Fault

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30325 ) Change subject: sim: Add HTM Generic Fault .. sim: Add HTM Generic Fault JIRA:

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM ExecContext API

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30323 ) Change subject: cpu: Add HTM ExecContext API .. cpu: Add HTM ExecContext API * initiateHtmCmd(Request::Flags flags)

[gem5-dev] Change in gem5/gem5[develop]: cpu: Base dyn inst HTM flags getter

2020-09-08 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30326 ) Change subject: cpu: Base dyn inst HTM flags getter .. cpu: Base dyn inst HTM flags getter JIRA:

[gem5-dev] Change in gem5/gem5[develop]: mem: Add HTM fields to Request

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30316 ) Change subject: mem: Add HTM fields to Request .. mem: Add HTM fields to Request This starts the support of

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM Instruction Flags

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30321 ) Change subject: cpu: Add HTM Instruction Flags .. cpu: Add HTM Instruction Flags IsHtmStart: Starts a HTM

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM CPU API

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30322 ) Change subject: cpu: Add HTM CPU API .. cpu: Add HTM CPU API JIRA: https://gem5.atlassian.net/browse/GEM5-587

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HtmCpu DebugFlag

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30320 ) Change subject: cpu: Add HtmCpu DebugFlag .. cpu: Add HtmCpu DebugFlag JIRA:

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: XPACD, XPACI, XPACLRI do not trap

2020-09-03 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34055 ) Change subject: arch-arm: XPACD, XPACI, XPACLRI do not trap .. arch-arm: XPACD, XPACI, XPACLRI do not

[gem5-dev] Change in gem5/gem5[develop]: mem: Relax packet limit in packet queue

2020-09-02 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30317 ) Change subject: mem: Relax packet limit in packet queue .. mem: Relax packet limit in packet queue JIRA:

[gem5-dev] Change in gem5/gem5[develop]: arch: Add uReset helper to UPCState

2020-09-02 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30315 ) Change subject: arch: Add uReset helper to UPCState .. arch: Add uReset helper to UPCState This allows to reset

[gem5-dev] Change in gem5/gem5[develop]: arch, mem: Initial Hardware Transactional Memory implementation

2020-09-02 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30314 ) Change subject: arch, mem: Initial Hardware Transactional Memory implementation .. arch, mem: Initial Hardware

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix coding style in addressTranslation methods

2020-08-28 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33434 ) Change subject: arch-arm: Fix coding style in addressTranslation methods .. arch-arm: Fix coding style in

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Check if PAC is implemented before executing insts

2020-08-28 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33455 ) Change subject: arch-arm: Check if PAC is implemented before executing insts .. arch-arm: Check if PAC is

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Introduce HavePACExt helper

2020-08-28 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33454 ) Change subject: arch-arm: Introduce HavePACExt helper .. arch-arm: Introduce HavePACExt helper This will check for

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Check if PAC is implemented before executing insts

2020-08-26 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33455 ) Change subject: arch-arm: Check if PAC is implemented before executing insts .. arch-arm: Check if PAC is

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Introduce HavePACExt helper

2020-08-26 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33454 ) Change subject: arch-arm: Introduce HavePACExt helper .. arch-arm: Introduce HavePACExt helper This will

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Rewrite addressTranslation to use BitUnions

2020-08-26 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33356 ) Change subject: arch-arm: Rewrite addressTranslation to use BitUnions .. arch-arm: Rewrite addressTranslation to use

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Refactor Address Translation (AT) code

2020-08-26 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33354 ) Change subject: arch-arm: Refactor Address Translation (AT) code .. arch-arm: Refactor Address Translation (AT) code

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Remove deadcode from AArch64 address translation

2020-08-26 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33355 ) Change subject: arch-arm: Remove deadcode from AArch64 address translation .. arch-arm: Remove deadcode from AArch64

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix coding style in addressTranslation methods

2020-08-26 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33434 ) Change subject: arch-arm: Fix coding style in addressTranslation methods .. arch-arm: Fix coding style in

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Refactor Address Translation (AT) code

2020-08-25 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33354 ) Change subject: arch-arm: Refactor Address Translation (AT) code .. arch-arm: Refactor Address

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Rewrite addressTranslation to use BitUnions

2020-08-25 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33356 ) Change subject: arch-arm: Rewrite addressTranslation to use BitUnions .. arch-arm: Rewrite

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Remove deadcode from AArch64 address translation

2020-08-25 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33355 ) Change subject: arch-arm: Remove deadcode from AArch64 address translation .. arch-arm: Remove deadcode

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Rename SelfDebug member variables

2020-08-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32775 ) Change subject: arch-arm: Rename SelfDebug member variables .. arch-arm: Rename SelfDebug member variables *

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Remove setters from SoftwareStep

2020-08-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32774 ) Change subject: arch-arm: Remove setters from SoftwareStep .. arch-arm: Remove setters from SoftwareStep

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Early checking if debug is enabled in TLB

2020-08-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32776 ) Change subject: arch-arm: Early checking if debug is enabled in TLB .. arch-arm: Early checking if debug is enabled

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Remove setters from SoftwareStep

2020-08-17 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32774 to review the following change. Change subject: arch-arm: Remove setters from SoftwareStep

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Rename SelfDebug member variables

2020-08-17 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32775 to review the following change. Change subject: arch-arm: Rename SelfDebug member variables

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Early checking if debug is enabled in TLB

2020-08-17 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Richard Cooper, Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32776 to review the following change. Change subject: arch-arm: Early checking if debug is enabled in TLB

[gem5-dev] Change in gem5/gem5[develop]: util: Change gen_arm_fs_files.py to allow selective compilation

2020-08-15 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32554 ) Change subject: util: Change gen_arm_fs_files.py to allow selective compilation .. util: Change

[gem5-dev] Change in gem5/gem5[develop]: util: Add Xen compilation to gen_arm_fs_files.py

2020-08-15 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32557 ) Change subject: util: Add Xen compilation to gen_arm_fs_files.py .. util: Add Xen compilation to gen_arm_fs_files.py

[gem5-dev] Change in gem5/gem5[develop]: util: Allow the short -j option in gen_arm_fs_files.py

2020-08-15 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32555 ) Change subject: util: Allow the short -j option in gen_arm_fs_files.py .. util: Allow the short -j option in

[gem5-dev] Change in gem5/gem5[develop]: util: Remove dependency check

2020-08-15 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32556 ) Change subject: util: Remove dependency check .. util: Remove dependency check The list is rather old and it

[gem5-dev] Change in gem5/gem5[develop]: ext: Add timing indications to every TestCase

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32653 ) Change subject: ext: Add timing indications to every TestCase .. ext: Add timing indications to every

[gem5-dev] Change in gem5/gem5[develop]: ext: Monkeypatch os.waitpid to extract CPU time from subprocess

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32652 to review the following change. Change subject: ext: Monkeypatch os.waitpid to extract CPU time from subprocess

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Use isSecure variable for Stage2Lookup

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32639 ) Change subject: arch-arm: Use isSecure variable for Stage2Lookup .. arch-arm: Use isSecure variable for Stage2Lookup

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Disable HVC when SCR_EL3.HCE is 0

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32636 ) Change subject: arch-arm: Disable HVC when SCR_EL3.HCE is 0 .. arch-arm: Disable HVC when SCR_EL3.HCE is 0 This was

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: VSTTBR_EL2 doesn't contain a VMID field

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32637 ) Change subject: arch-arm: VSTTBR_EL2 doesn't contain a VMID field .. arch-arm: VSTTBR_EL2 doesn't contain a VMID

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix SoftwareStep::debugExceptionReturnSS

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32634 ) Change subject: arch-arm: Fix SoftwareStep::debugExceptionReturnSS .. arch-arm: Fix

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32638 ) Change subject: arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors .. arch-arm: Fix physmem NS attribute in

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix XN in TLB permissions

2020-08-14 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32635 ) Change subject: arch-arm: Fix XN in TLB permissions .. arch-arm: Fix XN in TLB permissions The SIF condition check

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors

2020-08-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32638 to review the following change. Change subject: arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Disable HVC when SCR_EL3.HCE is 0

2020-08-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32636 to review the following change. Change subject: arch-arm: Disable HVC when SCR_EL3.HCE is 0

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix XN in TLB permissions

2020-08-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32635 to review the following change. Change subject: arch-arm: Fix XN in TLB permissions ..

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: VSTTBR_EL2 doesn't contain a VMID field

2020-08-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32637 to review the following change. Change subject: arch-arm: VSTTBR_EL2 doesn't contain a VMID field

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Use isSecure variable for Stage2Lookup

2020-08-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32639 to review the following change. Change subject: arch-arm: Use isSecure variable for Stage2Lookup

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix SoftwareStep::debugExceptionReturnSS

2020-08-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Hello Richard Cooper, Nikos Nikoleris, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/32634 to review the following change. Change subject: arch-arm: Fix SoftwareStep::debugExceptionReturnSS

[gem5-dev] Change in gem5/gem5[develop]: util: Allow the short -j option in gen_arm_fs_files.py

2020-08-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32555 ) Change subject: util: Allow the short -j option in gen_arm_fs_files.py .. util: Allow the short -j option

[gem5-dev] Change in gem5/gem5[develop]: util: Add Xen compilation to gen_arm_fs_files.py

2020-08-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32557 ) Change subject: util: Add Xen compilation to gen_arm_fs_files.py .. util: Add Xen compilation to

[gem5-dev] Change in gem5/gem5[develop]: util: Change gen_arm_fs_files.py to allow selective compilation

2020-08-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32554 ) Change subject: util: Change gen_arm_fs_files.py to allow selective compilation .. util: Change

[gem5-dev] Change in gem5/gem5[develop]: util: Remove dependency check

2020-08-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32556 ) Change subject: util: Remove dependency check .. util: Remove dependency check The list is rather old

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Reduce boilerplate when extracting SelfDebug from tc

2020-08-10 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31354 ) Change subject: arch-arm: Reduce boilerplate when extracting SelfDebug from tc .. arch-arm: Reduce boilerplate

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Fix _CTL_EL.ISTATUS when masking the irq

2020-08-10 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31775 ) Change subject: dev-arm: Fix _CTL_EL.ISTATUS when masking the irq .. dev-arm: Fix _CTL_EL.ISTATUS when masking the

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Avoid code duplication in Pl111

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31176 ) Change subject: dev-arm: Avoid code duplication in Pl111 .. dev-arm: Avoid code duplication in Pl111 Change-Id:

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Relax size constraint on AMBA ID registers

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31175 ) Change subject: dev-arm: Relax size constraint on AMBA ID registers .. dev-arm: Relax size constraint on AMBA ID

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make the Sp805 use the new ArmInterruptPin::active

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31939 ) Change subject: dev-arm: Make the Sp805 use the new ArmInterruptPin::active .. dev-arm: Make the Sp805 use the new

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make Sp804 use the ArmInterruptPin

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31938 ) Change subject: dev-arm: Make Sp804 use the ArmInterruptPin .. dev-arm: Make Sp804 use the ArmInterruptPin

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: generateBasicPioDeviceNode requiring an ArmInterruptPin

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31941 ) Change subject: dev-arm: generateBasicPioDeviceNode requiring an ArmInterruptPin .. dev-arm:

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Fix DTB autogen for HDLcd

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31940 ) Change subject: dev-arm: Fix DTB autogen for HDLcd .. dev-arm: Fix DTB autogen for HDLcd The HDLcd was wrongly

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make AmbaInt/DmaDevice use the ArmInterruptPin

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31936 ) Change subject: dev-arm: Make AmbaInt/DmaDevice use the ArmInterruptPin .. dev-arm: Make AmbaInt/DmaDevice use the

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make Pl011 UART use the ArmInterruptPin

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31935 ) Change subject: dev-arm: Make Pl011 UART use the ArmInterruptPin .. dev-arm: Make Pl011 UART use the ArmInterruptPin

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Introduce the active boolean for ArmInterruptPin

2020-07-30 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31934 ) Change subject: dev-arm: Introduce the active boolean for ArmInterruptPin .. dev-arm: Introduce the active boolean

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make Sp804 use the ArmInterruptPin

2020-07-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/31938 ) Change subject: dev-arm: Make Sp804 use the ArmInterruptPin .. dev-arm: Make Sp804 use the

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make the Sp805 use the new ArmInterruptPin::active

2020-07-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/31939 ) Change subject: dev-arm: Make the Sp805 use the new ArmInterruptPin::active .. dev-arm: Make the Sp805

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Make AmbaInt/DmaDevice use the ArmInterruptPin

2020-07-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/31936 ) Change subject: dev-arm: Make AmbaInt/DmaDevice use the ArmInterruptPin .. dev-arm: Make

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Introduce the active boolean for ArmInterruptPin

2020-07-29 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/31934 ) Change subject: dev-arm: Introduce the active boolean for ArmInterruptPin .. dev-arm: Introduce the

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