[gem5-dev] Change in public/gem5[master]: mem-cache: Make invalidate a common function between tag classes
Nikos Nikoleris has submitted this change and it was merged. ( https://gem5-review.googlesource.com/8286 ) Change subject: mem-cache: Make invalidate a common function between tag classes .. mem-cache: Make invalidate a common function between tag classes invalidate was defined as a separate function in the base associative and fully-associative tags classes although both functions should implement identical functionality. This patch moves the invalidate function in the base tags class. Change-Id: I206ee969b00ab9e05873c6d87531474fcd712907 Reviewed-by: Andreas SandbergReviewed-on: https://gem5-review.googlesource.com/8286 Reviewed-by: Daniel Carvalho Maintainer: Nikos Nikoleris --- M src/mem/cache/blk.hh M src/mem/cache/tags/base.hh M src/mem/cache/tags/base_set_assoc.hh M src/mem/cache/tags/fa_lru.cc M src/mem/cache/tags/lru.hh M src/mem/cache/tags/random_repl.cc M src/mem/cache/tags/random_repl.hh 7 files changed, 52 insertions(+), 38 deletions(-) Approvals: Daniel Carvalho: Looks good to me, approved Nikos Nikoleris: Looks good to me, approved diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh index 44691c1..66f05c8 100644 --- a/src/mem/cache/blk.hh +++ b/src/mem/cache/blk.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2016 ARM Limited + * Copyright (c) 2012-2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -164,12 +164,9 @@ public: CacheBlk() -: task_id(ContextSwitchTaskId::Unknown), - tag(0), data(0), status(0), whenReady(0), - set(-1), way(-1), isTouched(false), refCount(0), - srcMasterId(Request::invldMasterId), - tickInserted(0) -{} +{ +invalidate(); +} CacheBlk(const CacheBlk&) = delete; CacheBlk& operator=(const CacheBlk&) = delete; @@ -210,8 +207,14 @@ */ void invalidate() { +tag = MaxAddr; +task_id = ContextSwitchTaskId::Unknown; status = 0; +whenReady = MaxTick; isTouched = false; +refCount = 0; +srcMasterId = Request::invldMasterId; +tickInserted = MaxTick; lockList.clear(); } diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh index 9714d9a..dfd8aeb 100644 --- a/src/mem/cache/tags/base.hh +++ b/src/mem/cache/tags/base.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014,2016 ARM Limited + * Copyright (c) 2012-2014,2016-2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -236,7 +236,18 @@ return -1; } -virtual void invalidate(CacheBlk *blk) = 0; +/** + * This function updates the tags when a block is invalidated but + * does not invalidate the block itself. + * @param blk The block to invalidate. + */ +virtual void invalidate(CacheBlk *blk) +{ +assert(blk); +assert(blk->isValid()); +tagsInUse--; +occupancies[blk->srcMasterId]--; +} virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles ) = 0; diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh index 44f68d5..835b0cf 100644 --- a/src/mem/cache/tags/base_set_assoc.hh +++ b/src/mem/cache/tags/base_set_assoc.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014 ARM Limited + * Copyright (c) 2012-2014,2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -72,7 +72,6 @@ * BlkType* accessBlock(); * BlkType* findVictim(); * void insertBlock(); - * void invalidate(); */ class BaseSetAssoc : public BaseTags { @@ -134,22 +133,6 @@ CacheBlk *findBlockBySetAndWay(int set, int way) const override; /** - * Invalidate the given block. - * @param blk The block to invalidate. - */ -void invalidate(CacheBlk *blk) override -{ -assert(blk); -assert(blk->isValid()); -tagsInUse--; -assert(blk->srcMasterId < cache->system->maxMasters()); -occupancies[blk->srcMasterId]--; -blk->srcMasterId = Request::invldMasterId; -blk->task_id = ContextSwitchTaskId::Unknown; -blk->tickInserted = curTick(); -} - -/** * Access block and update replacement data. May not succeed, in which case * nullptr is returned. This has all the implications of a cache * access and should only be used as such. Returns the access latency as a diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 1ee34b7..d403989 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013,2016 ARM Limited + * Copyright (c) 2013,2016-2017 ARM Limited * All rights reserved. * * The license
[gem5-dev] Change in public/gem5[master]: mem-cache: Make invalidate a common function between tag classes
Hello Gabe Black, Jason Lowe-Power, Daniel Carvalho, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/8286 to look at the new patch set (#4). Change subject: mem-cache: Make invalidate a common function between tag classes .. mem-cache: Make invalidate a common function between tag classes invalidate was defined as a separate function in the base associative and fully-associative tags classes although both functions should implement identical functionality. This patch moves the invalidate function in the base tags class. Change-Id: I206ee969b00ab9e05873c6d87531474fcd712907 Reviewed-by: Andreas Sandberg--- M src/mem/cache/blk.hh M src/mem/cache/tags/base.hh M src/mem/cache/tags/base_set_assoc.hh M src/mem/cache/tags/fa_lru.cc M src/mem/cache/tags/lru.hh M src/mem/cache/tags/random_repl.cc M src/mem/cache/tags/random_repl.hh 7 files changed, 52 insertions(+), 38 deletions(-) -- To view, visit https://gem5-review.googlesource.com/8286 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I206ee969b00ab9e05873c6d87531474fcd712907 Gerrit-Change-Number: 8286 Gerrit-PatchSet: 4 Gerrit-Owner: Nikos Nikoleris Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in public/gem5[master]: mem-cache: Make invalidate a common function between tag classes
Hello Gabe Black, Daniel Carvalho, Jason Lowe-Power, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/8286 to look at the new patch set (#3). Change subject: mem-cache: Make invalidate a common function between tag classes .. mem-cache: Make invalidate a common function between tag classes invalidate was defined as a separate function in the base associative and fully-associative tags classes although both functions should implement identical functionality. This patch moves the invalidate function in the base tags class. Change-Id: I206ee969b00ab9e05873c6d87531474fcd712907 Reviewed-by: Andreas Sandberg--- M src/mem/cache/blk.hh M src/mem/cache/tags/base.hh M src/mem/cache/tags/base_set_assoc.hh M src/mem/cache/tags/fa_lru.cc M src/mem/cache/tags/fa_lru.hh M src/mem/cache/tags/lru.hh M src/mem/cache/tags/random_repl.cc M src/mem/cache/tags/random_repl.hh 8 files changed, 53 insertions(+), 39 deletions(-) -- To view, visit https://gem5-review.googlesource.com/8286 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I206ee969b00ab9e05873c6d87531474fcd712907 Gerrit-Change-Number: 8286 Gerrit-PatchSet: 3 Gerrit-Owner: Nikos Nikoleris Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in public/gem5[master]: mem-cache: Make invalidate a common function between tag classes
Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/8286 to review the following change. Change subject: mem-cache: Make invalidate a common function between tag classes .. mem-cache: Make invalidate a common function between tag classes invalidate was defined as a separate function in the base associative and fully-associative tags classes although both functions should implement identical functionality. This patch moves the invalidate function in the base tags class. Change-Id: I206ee969b00ab9e05873c6d87531474fcd712907 Reviewed-by: Andreas Sandberg--- M src/mem/cache/blk.hh M src/mem/cache/tags/base.hh M src/mem/cache/tags/base_set_assoc.hh M src/mem/cache/tags/fa_lru.cc M src/mem/cache/tags/fa_lru.hh M src/mem/cache/tags/random_repl.cc M src/mem/cache/tags/random_repl.hh 7 files changed, 50 insertions(+), 49 deletions(-) diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh index 44691c1..66f05c8 100644 --- a/src/mem/cache/blk.hh +++ b/src/mem/cache/blk.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2016 ARM Limited + * Copyright (c) 2012-2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -164,12 +164,9 @@ public: CacheBlk() -: task_id(ContextSwitchTaskId::Unknown), - tag(0), data(0), status(0), whenReady(0), - set(-1), way(-1), isTouched(false), refCount(0), - srcMasterId(Request::invldMasterId), - tickInserted(0) -{} +{ +invalidate(); +} CacheBlk(const CacheBlk&) = delete; CacheBlk& operator=(const CacheBlk&) = delete; @@ -210,8 +207,14 @@ */ void invalidate() { +tag = MaxAddr; +task_id = ContextSwitchTaskId::Unknown; status = 0; +whenReady = MaxTick; isTouched = false; +refCount = 0; +srcMasterId = Request::invldMasterId; +tickInserted = MaxTick; lockList.clear(); } diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh index 9714d9a..f407ec1 100644 --- a/src/mem/cache/tags/base.hh +++ b/src/mem/cache/tags/base.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014,2016 ARM Limited + * Copyright (c) 2012-2014,2016-2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -236,7 +236,18 @@ return -1; } -virtual void invalidate(CacheBlk *blk) = 0; +/** + * This function updates the tags when a block is invalidated but + * does not invalidate the block itself. + * @param blk The block to invalidate. + */ +void invalidate(CacheBlk *blk) +{ +assert(blk); +assert(blk->isValid()); +tagsInUse--; +occupancies[blk->srcMasterId]--; +} virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles ) = 0; diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh index c1be946..7d95568 100644 --- a/src/mem/cache/tags/base_set_assoc.hh +++ b/src/mem/cache/tags/base_set_assoc.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014 ARM Limited + * Copyright (c) 2012-2014,2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -71,7 +71,6 @@ * BlkType* accessBlock(); * BlkType* findVictim(); * void insertBlock(); - * void invalidate(); */ class BaseSetAssoc : public BaseTags { @@ -131,22 +130,6 @@ CacheBlk *findBlockBySetAndWay(int set, int way) const override; /** - * Invalidate the given block. - * @param blk The block to invalidate. - */ -void invalidate(CacheBlk *blk) override -{ -assert(blk); -assert(blk->isValid()); -tagsInUse--; -assert(blk->srcMasterId < cache->system->maxMasters()); -occupancies[blk->srcMasterId]--; -blk->srcMasterId = Request::invldMasterId; -blk->task_id = ContextSwitchTaskId::Unknown; -blk->tickInserted = curTick(); -} - -/** * Access block and update replacement data. May not succeed, in which case * nullptr is returned. This has all the implications of a cache * access and should only be used as such. Returns the access latency as a diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 1ee34b7..1d27663 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013,2016 ARM Limited + * Copyright (c) 2013,2016-2017 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -160,13 +160,6 @@ return nullptr; } -void -FALRU::invalidate(CacheBlk *blk) -{ -assert(blk); -tagsInUse--; -} - CacheBlk* FALRU::accessBlock(Addr addr,