[gem5-dev] Change in gem5/gem5[develop]: arch, sim: Return whether or not a pseudo inst was recognized.

2020-03-26 Thread Gabe Black (Gerrit)
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25948 )


Change subject: arch,sim: Return whether or not a pseudo inst was  
recognized.

..

arch,sim: Return whether or not a pseudo inst was recognized.

Otherwise there's no way to distinguish whether return values are from
the calls themselves, including what they mean in the context (success
or failure?) or the pseudo inst dispatch function itself.

Change-Id: I3e71c277f175c69af0d1adeb3299d88d095dfa84
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25948
Tested-by: Gem5 Cloud Project GCB service account  
<345032938...@cloudbuild.gserviceaccount.com>

Tested-by: kokoro 
Maintainer: Jason Lowe-Power 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Alexandru Duțu 
---
M src/arch/arm/tlb.cc
M src/arch/x86/tlb.cc
M src/sim/pseudo_inst.hh
3 files changed, 42 insertions(+), 34 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Alexandru Duțu: Looks good to me, approved
  kokoro: Regressions pass
  Gem5 Cloud Project GCB service account: Regressions pass



diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 5a92a0c..84160bb 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -141,7 +141,8 @@
 req->setLocalAccessor(
 [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles
 {
-uint64_t ret = PseudoInst::pseudoInst(tc,  
func);

+uint64_t ret;
+PseudoInst::pseudoInst(tc, func, ret);
 if (mode == Read)
 pkt->setLE(ret);
 return Cycles(1);
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 46bab48..53492b0 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -265,8 +265,8 @@
 req->setLocalAccessor(
 [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles
 {
-uint64_t ret =
-PseudoInst::pseudoInst(tc, func);
+uint64_t ret;
+PseudoInst::pseudoInst(tc, func, ret);
 if (mode == Read)
 pkt->setLE(ret);
 return Cycles(1);
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index fbf997a..be9e5bb 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -130,100 +130,109 @@
  * manner using the ISA-specific getArguments functions.
  *
  * @param func M5 pseudo op major function number (see utility/m5/m5ops.h)
+ * @param result A reference to a uint64_t to store a result in.
+ * @return Whether the pseudo instruction was recognized/handled.
  */

 template 
-uint64_t
-pseudoInst(ThreadContext *tc, uint8_t func)
+bool
+pseudoInst(ThreadContext *tc, uint8_t func, uint64_t )
 {
 DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i)\n", func);

+result = 0;
+
 switch (func) {
   case M5OP_ARM:
 invokeSimcall(tc, arm);
-break;
+return true;

   case M5OP_QUIESCE:
 invokeSimcall(tc, quiesce);
-break;
+return true;

   case M5OP_QUIESCE_NS:
 invokeSimcall(tc, quiesceNs);
-break;
+return true;

   case M5OP_QUIESCE_CYCLE:
 invokeSimcall(tc, quiesceCycles);
-break;
+return true;

   case M5OP_QUIESCE_TIME:
-return invokeSimcall(tc, quiesceTime);
+result = invokeSimcall(tc, quiesceTime);
+return true;

   case M5OP_RPNS:
-return invokeSimcall(tc, rpns);
+result = invokeSimcall(tc, rpns);
+return true;

   case M5OP_WAKE_CPU:
 invokeSimcall(tc, wakeCPU);
-break;
+return true;

   case M5OP_EXIT:
 invokeSimcall(tc, m5exit);
-break;
+return true;

   case M5OP_FAIL:
 invokeSimcall(tc, m5fail);
-break;
+return true;

   case M5OP_INIT_PARAM:
-return invokeSimcall(tc, initParam);
+result = invokeSimcall(tc, initParam);
+return true;

   case M5OP_LOAD_SYMBOL:
 invokeSimcall(tc, loadsymbol);
-break;
+return true;

   case M5OP_RESET_STATS:
 invokeSimcall(tc, resetstats);
-break;
+return true;

   case M5OP_DUMP_STATS:
 invokeSimcall(tc, dumpstats);
-break;
+return true;

   case M5OP_DUMP_RESET_STATS:
 invokeSimcall(tc, dumpresetstats);
-break;
+return true;

   case M5OP_CHECKPOINT:
 invokeSimcall(tc, m5checkpoint);
-break;
+return true;

   case M5OP_WRITE_FILE:
-return invokeSimcall(tc, writefile);
+result = invokeSimcall(tc, writefile);
+return true;

   case M5OP_READ_FILE:
-return invokeSimcall(tc, readfile);
+result = invokeSimcall(tc, readfile);
+return true;

   case M5OP_DEBUG_BREAK:
   

[gem5-dev] Change in gem5/gem5[develop]: arch, sim: Return whether or not a pseudo inst was recognized.

2020-02-26 Thread Gabe Black (Gerrit)
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25948 )



Change subject: arch,sim: Return whether or not a pseudo inst was  
recognized.

..

arch,sim: Return whether or not a pseudo inst was recognized.

Change-Id: I3e71c277f175c69af0d1adeb3299d88d095dfa84
---
M src/arch/arm/kvm/arm_cpu.cc
M src/arch/arm/mmapped_ipr.hh
M src/arch/x86/mmapped_ipr.hh
M src/sim/pseudo_inst.hh
4 files changed, 48 insertions(+), 37 deletions(-)



diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index 02e6240..688cbd1 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -320,8 +320,8 @@
 const uint8_t func((reg_ip >> 8) & 0xFF);

 DPRINTF(Kvm, "KVM Hypercall: %#x/%#x\n", func, subfunc);
-const uint64_t ret =
-PseudoInst::pseudoInst(getContext(0), func);
+uint64_t ret;
+PseudoInst::pseudoInst(getContext(0), func, ret);

 // Just set the return value using the KVM API instead of messing
 // with the context. We could have used the context, but that
diff --git a/src/arch/arm/mmapped_ipr.hh b/src/arch/arm/mmapped_ipr.hh
index 7df6667..92b11dc 100644
--- a/src/arch/arm/mmapped_ipr.hh
+++ b/src/arch/arm/mmapped_ipr.hh
@@ -55,7 +55,8 @@
 if (m5opRange.contains(addr)) {
 uint8_t func;
 PseudoInst::decodeAddrOffset(addr - m5opRange.start(), func);
-uint64_t ret = PseudoInst::pseudoInst(tc, func);
+uint64_t ret;
+PseudoInst::pseudoInst(tc, func, ret);
 pkt->setLE(ret);
 }
 return Cycles(1);
@@ -68,8 +69,9 @@
 auto m5opRange = tc->getSystemPtr()->m5opRange();
 if (m5opRange.contains(addr)) {
 uint8_t func;
+uint64_t ret;
 PseudoInst::decodeAddrOffset(addr - m5opRange.start(), func);
-PseudoInst::pseudoInst(tc, func);
+PseudoInst::pseudoInst(tc, func, ret);
 }
 return Cycles(1);
 }
diff --git a/src/arch/x86/mmapped_ipr.hh b/src/arch/x86/mmapped_ipr.hh
index 5b0a1e9..e2f0ccc 100644
--- a/src/arch/x86/mmapped_ipr.hh
+++ b/src/arch/x86/mmapped_ipr.hh
@@ -62,7 +62,8 @@
 if (m5opRange.contains(addr)) {
 uint8_t func;
 PseudoInst::decodeAddrOffset(addr - m5opRange.start(), func);
-uint64_t ret = PseudoInst::pseudoInst(tc,  
func);

+uint64_t ret;
+PseudoInst::pseudoInst(tc, func, ret);
 pkt->setLE(ret);
 } else {
 Addr offset = addr & mask(3);
@@ -83,7 +84,8 @@
 if (m5opRange.contains(addr)) {
 uint8_t func;
 PseudoInst::decodeAddrOffset(addr - m5opRange.start(), func);
-PseudoInst::pseudoInst(tc, func);
+uint64_t ret;
+PseudoInst::pseudoInst(tc, func, ret);
 } else {
 Addr offset = addr & mask(3);
 MiscRegIndex index = (MiscRegIndex)(addr / sizeof(RegVal));
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index 9be742e..5b7a073 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -130,100 +130,109 @@
  * manner using the ISA-specific getArguments functions.
  *
  * @param func M5 pseudo op major function number (see utility/m5/m5ops.h)
+ * @param result A reference to a uint64_t to store a result in.
+ * @return Whether the pseudo instruction was recognized/handled.
  */

 template 
-uint64_t
-pseudoInst(ThreadContext *tc, uint8_t func)
+bool
+pseudoInst(ThreadContext *tc, uint8_t func, uint64_t )
 {
 DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i)\n", func);

+result = 0;
+
 switch (func) {
   case M5OP_ARM:
 invokeSimcall(tc, arm);
-break;
+return true;

   case M5OP_QUIESCE:
 invokeSimcall(tc, quiesce);
-break;
+return true;

   case M5OP_QUIESCE_NS:
 invokeSimcall(tc, quiesceNs);
-break;
+return true;

   case M5OP_QUIESCE_CYCLE:
 invokeSimcall(tc, quiesceCycles);
-break;
+return true;

   case M5OP_QUIESCE_TIME:
-return invokeSimcall(tc, quiesceTime);
+result = invokeSimcall(tc, quiesceTime);
+return true;

   case M5OP_RPNS:
-return invokeSimcall(tc, rpns);
+result = invokeSimcall(tc, rpns);
+return true;

   case M5OP_WAKE_CPU:
 invokeSimcall(tc, wakeCPU);
-break;
+return true;

   case M5OP_EXIT:
 invokeSimcall(tc, m5exit);
-break;
+return true;

   case M5OP_FAIL:
 invokeSimcall(tc, m5fail);
-break;
+return true;

   case M5OP_INIT_PARAM:
-return invokeSimcall(tc, initParam);
+result = invokeSimcall(tc, initParam);
+return true;

   case M5OP_LOAD_SYMBOL:
 invokeSimcall(tc, loadsymbol);
-break;
+return true;

   case M5OP_RESET_STATS:
 invokeSimcall(tc, resetstats);