[gem5-dev] Change in gem5/gem5[develop]: arm: Return whether a semihosting call was recognized/handled.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/25949 )
Change subject: arm: Return whether a semihosting call was
recognized/handled.
..
arm: Return whether a semihosting call was recognized/handled.
Otherwise there's no way to determine whether the return value was from
the semihosting mechanism itself, or from one of the calls. There would
also be no way to determine whether a call had actually happened.
Change-Id: Ie2da812172fe2f9c1e2b5be95561863bd12920b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25949
Reviewed-by: Gabe Black
Maintainer: Gabe Black
Tested-by: Gem5 Cloud Project GCB service account
<345032938...@cloudbuild.gserviceaccount.com>
---
M src/arch/arm/semihosting.cc
M src/arch/arm/semihosting.hh
M src/arch/arm/system.cc
M src/arch/arm/system.hh
4 files changed, 18 insertions(+), 14 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
Gem5 Cloud Project GCB service account: Regressions pass
diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc
index b6db38a..230ded1 100644
--- a/src/arch/arm/semihosting.cc
+++ b/src/arch/arm/semihosting.cc
@@ -153,21 +153,21 @@
tickShift);
}
-void
+bool
ArmSemihosting::call64(ThreadContext *tc, bool gem5_ops)
{
RegVal op = tc->readIntReg(ArmISA::INTREG_X0 & mask(32));
if (op > MaxStandardOp && !gem5_ops) {
unrecognizedCall(
tc, "Gem5 semihosting op (0x%x) disabled from here.", op);
-return;
+return false;
}
auto it = calls.find(op);
if (it == calls.end()) {
unrecognizedCall(
tc, "Unknown aarch64 semihosting call: op = 0x%x", op);
-return;
+return false;
}
const SemiCall = it->second;
@@ -175,23 +175,25 @@
auto err = call.call64(this, tc);
semiErrno = err.second;
DPRINTF(Semihosting, "\t ->: 0x%x, %i\n", err.first, err.second);
+
+return true;
}
-void
+bool
ArmSemihosting::call32(ThreadContext *tc, bool gem5_ops)
{
RegVal op = tc->readIntReg(ArmISA::INTREG_R0);
if (op > MaxStandardOp && !gem5_ops) {
unrecognizedCall(
tc, "Gem5 semihosting op (0x%x) disabled from here.", op);
-return;
+return false;
}
auto it = calls.find(op);
if (it == calls.end()) {
unrecognizedCall(
tc, "Unknown aarch32 semihosting call: op = 0x%x", op);
-return;
+return false;
}
const SemiCall = it->second;
@@ -199,6 +201,8 @@
auto err = call.call32(this, tc);
semiErrno = err.second;
DPRINTF(Semihosting, "\t ->: 0x%x, %i\n", err.first, err.second);
+
+return true;
}
void
diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh
index 9aa5b41..5884349 100644
--- a/src/arch/arm/semihosting.hh
+++ b/src/arch/arm/semihosting.hh
@@ -214,9 +214,9 @@
ArmSemihosting(const ArmSemihostingParams *p);
/** Perform an Arm Semihosting call from aarch64 code. */
-void call64(ThreadContext *tc, bool gem5_ops);
+bool call64(ThreadContext *tc, bool gem5_ops);
/** Perform an Arm Semihosting call from aarch32 code. */
-void call32(ThreadContext *tc, bool gem5_ops);
+bool call32(ThreadContext *tc, bool gem5_ops);
public: // SimObject and related interfaces
void serialize(CheckpointOut ) const override;
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index e61402a..5d8808c 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -179,16 +179,16 @@
return FullSystem && getArmSystem(tc)->haveSemihosting();
}
-void
+bool
ArmSystem::callSemihosting64(ThreadContext *tc, bool gem5_ops)
{
-getArmSystem(tc)->semihosting->call64(tc, gem5_ops);
+return getArmSystem(tc)->semihosting->call64(tc, gem5_ops);
}
-void
+bool
ArmSystem::callSemihosting32(ThreadContext *tc, bool gem5_ops)
{
-getArmSystem(tc)->semihosting->call32(tc, gem5_ops);
+return getArmSystem(tc)->semihosting->call32(tc, gem5_ops);
}
void
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index fc32d0f..370a3df 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -314,10 +314,10 @@
static bool haveSemihosting(ThreadContext *tc);
/** Make a Semihosting call from aarch64 */
-static void callSemihosting64(ThreadContext *tc, bool gem5_ops=false);
+static bool callSemihosting64(ThreadContext *tc, bool gem5_ops=false);
/** Make a Semihosting call from aarch32 */
-static void callSemihosting32(ThreadContext *tc, bool gem5_ops=false);
+static bool callSemihosting32(ThreadContext *tc, bool gem5_ops=false);
/** Make a call to notify the power controller of STANDBYWFI assertion
*/
static void callSetStandByWfi(ThreadContext *tc);
--
To view, visit
[gem5-dev] Change in gem5/gem5[develop]: arm: Return whether a semihosting call was recognized/handled.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/25949 )
Change subject: arm: Return whether a semihosting call was
recognized/handled.
..
arm: Return whether a semihosting call was recognized/handled.
Change-Id: Ie2da812172fe2f9c1e2b5be95561863bd12920b1
---
M src/arch/arm/semihosting.cc
M src/arch/arm/semihosting.hh
M src/arch/arm/system.cc
M src/arch/arm/system.hh
4 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc
index 08728ed..6e58556 100644
--- a/src/arch/arm/semihosting.cc
+++ b/src/arch/arm/semihosting.cc
@@ -153,21 +153,21 @@
tickShift);
}
-void
+bool
ArmSemihosting::call64(ThreadContext *tc, bool gem5_ops)
{
RegVal op = tc->readIntReg(ArmISA::INTREG_X0 & mask(32));
if (op > MaxStandardOp && !gem5_ops) {
unrecognizedCall(
tc, "Gem5 semihosting op (0x%x) disabled from here.", op);
-return;
+return false;
}
auto it = calls.find(op);
if (it == calls.end()) {
unrecognizedCall(
tc, "Unknown aarch64 semihosting call: op = 0x%x", op);
-return;
+return false;
}
const SemiCall = it->second;
@@ -175,23 +175,25 @@
auto err = call.call64(this, tc);
semiErrno = err.second;
DPRINTF(Semihosting, "\t ->: 0x%x, %i\n", err.first, err.second);
+
+return true;
}
-void
+bool
ArmSemihosting::call32(ThreadContext *tc, bool gem5_ops)
{
RegVal op = tc->readIntReg(ArmISA::INTREG_R0);
if (op > MaxStandardOp && !gem5_ops) {
unrecognizedCall(
tc, "Gem5 semihosting op (0x%x) disabled from here.", op);
-return;
+return false;
}
auto it = calls.find(op);
if (it == calls.end()) {
unrecognizedCall(
tc, "Unknown aarch32 semihosting call: op = 0x%x", op);
-return;
+return false;
}
const SemiCall = it->second;
@@ -199,6 +201,8 @@
auto err = call.call32(this, tc);
semiErrno = err.second;
DPRINTF(Semihosting, "\t ->: 0x%x, %i\n", err.first, err.second);
+
+return true;
}
void
diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh
index 7b575c0..d45aa74 100644
--- a/src/arch/arm/semihosting.hh
+++ b/src/arch/arm/semihosting.hh
@@ -214,9 +214,9 @@
ArmSemihosting(const ArmSemihostingParams *p);
/** Perform an Arm Semihosting call from aarch64 code. */
-void call64(ThreadContext *tc, bool gem5_ops=false);
+bool call64(ThreadContext *tc, bool gem5_ops=false);
/** Perform an Arm Semihosting call from aarch32 code. */
-void call32(ThreadContext *tc, bool gem5_ops=false);
+bool call32(ThreadContext *tc, bool gem5_ops=false);
public: // SimObject and related interfaces
void serialize(CheckpointOut ) const override;
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 3cd8858..950caee 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -291,16 +291,16 @@
return FullSystem && getArmSystem(tc)->haveSemihosting();
}
-void
+bool
ArmSystem::callSemihosting64(ThreadContext *tc, bool gem5_ops)
{
-getArmSystem(tc)->semihosting->call64(tc, gem5_ops);
+return getArmSystem(tc)->semihosting->call64(tc, gem5_ops);
}
-void
+bool
ArmSystem::callSemihosting32(ThreadContext *tc, bool gem5_ops)
{
-getArmSystem(tc)->semihosting->call32(tc, gem5_ops);
+return getArmSystem(tc)->semihosting->call32(tc, gem5_ops);
}
ArmSystem *
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index b598977..e890d10 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -334,10 +334,10 @@
static bool haveSemihosting(ThreadContext *tc);
/** Make a Semihosting call from aarch64 */
-static void callSemihosting64(ThreadContext *tc, bool gem5_ops=false);
+static bool callSemihosting64(ThreadContext *tc, bool gem5_ops=false);
/** Make a Semihosting call from aarch32 */
-static void callSemihosting32(ThreadContext *tc, bool gem5_ops=false);
+static bool callSemihosting32(ThreadContext *tc, bool gem5_ops=false);
};
class GenericArmSystem : public ArmSystem
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/25949
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie2da812172fe2f9c1e2b5be95561863bd12920b1
Gerrit-Change-Number: 25949
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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