[gem5-dev] Change in gem5/gem5[develop]: mem-cache: Use PacketPtr in tags's accessBlock
Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/38116 )
Change subject: mem-cache: Use PacketPtr in tags's accessBlock
..
mem-cache: Use PacketPtr in tags's accessBlock
Pass the packet to the tags, so that the replacement policies
more execution information.
Change-Id: I201884a6d60e3299fc3c9befebbb2e8b64a007f0
Signed-off-by: Daniel R. Carvalho
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38116
Tested-by: kokoro
Reviewed-by: Nikos Nikoleris
Reviewed-by: Jason Lowe-Power
Maintainer: Nikos Nikoleris
---
M src/mem/cache/base.cc
M src/mem/cache/tags/base.hh
M src/mem/cache/tags/base_set_assoc.hh
M src/mem/cache/tags/fa_lru.cc
M src/mem/cache/tags/fa_lru.hh
M src/mem/cache/tags/sector_tags.cc
M src/mem/cache/tags/sector_tags.hh
7 files changed, 18 insertions(+), 21 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 48731cf..04e127d 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -1141,7 +1141,7 @@
// Access block in the tags
Cycles tag_latency(0);
-blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), tag_latency);
+blk = tags->accessBlock(pkt, tag_latency);
DPRINTF(Cache, "%s for %s %s\n", __func__, pkt->print(),
blk ? "hit " + blk->print() : "miss");
diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh
index cc5dd99..77d6f9d 100644
--- a/src/mem/cache/tags/base.hh
+++ b/src/mem/cache/tags/base.hh
@@ -285,12 +285,11 @@
* should only be used as such. Returns the tag lookup latency as a
side
* effect.
*
- * @param addr The address to find.
- * @param is_secure True if the target memory space is secure.
+ * @param pkt The packet holding the address to find.
* @param lat The latency of the tag lookup.
* @return Pointer to the cache block if found.
*/
-virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat)
= 0;
+virtual CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat) = 0;
/**
* Generate the tag from the given address.
diff --git a/src/mem/cache/tags/base_set_assoc.hh
b/src/mem/cache/tags/base_set_assoc.hh
index 30592f1..dc749dd 100644
--- a/src/mem/cache/tags/base_set_assoc.hh
+++ b/src/mem/cache/tags/base_set_assoc.hh
@@ -117,14 +117,13 @@
* should only be used as such. Returns the tag lookup latency as a
side
* effect.
*
- * @param addr The address to find.
- * @param is_secure True if the target memory space is secure.
+ * @param pkt The packet holding the address to find.
* @param lat The latency of the tag lookup.
* @return Pointer to the cache block if found.
*/
-CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
+CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat) override
{
-CacheBlk *blk = findBlock(addr, is_secure);
+CacheBlk *blk = findBlock(pkt->getAddr(), pkt->isSecure());
// Access all tags in parallel, hence one in each way. The data
side
// either accesses all blocks in parallel, or one block
sequentially on
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 53d1246..5fea07e 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -128,17 +128,18 @@
}
CacheBlk*
-FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat)
+FALRU::accessBlock(const PacketPtr pkt, Cycles &lat)
{
-return accessBlock(addr, is_secure, lat, 0);
+return accessBlock(pkt, lat, 0);
}
CacheBlk*
-FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat,
+FALRU::accessBlock(const PacketPtr pkt, Cycles &lat,
CachesMask *in_caches_mask)
{
CachesMask mask = 0;
-FALRUBlk* blk = static_cast(findBlock(addr, is_secure));
+FALRUBlk* blk =
+static_cast(findBlock(pkt->getAddr(), pkt->isSecure()));
// If a cache hit
if (blk && blk->isValid()) {
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 9e45a26..b96a1a0 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -173,19 +173,18 @@
* cache access and should only be used as such.
* Returns tag lookup latency and the inCachesMask flags as a side
effect.
*
- * @param addr The address to look for.
- * @param is_secure True if the target memory space is secure.
+ * @param pkt The packet holding the address to find.
* @param lat The latency of the tag lookup.
* @param in_cache_mask Mask indicating the caches in which the blk
fits.
* @return Pointer to the cache block.
*/
-CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat
[gem5-dev] Change in gem5/gem5[develop]: mem-cache: Use PacketPtr in tags's accessBlock
Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/38116 )
Change subject: mem-cache: Use PacketPtr in tags's accessBlock
..
mem-cache: Use PacketPtr in tags's accessBlock
Pass the packet to the tags, so that the replacement policies
more execution information.
Change-Id: I201884a6d60e3299fc3c9befebbb2e8b64a007f0
Signed-off-by: Daniel R. Carvalho
---
M src/mem/cache/base.cc
M src/mem/cache/tags/base.hh
M src/mem/cache/tags/base_set_assoc.hh
M src/mem/cache/tags/fa_lru.cc
M src/mem/cache/tags/fa_lru.hh
M src/mem/cache/tags/sector_tags.cc
M src/mem/cache/tags/sector_tags.hh
7 files changed, 18 insertions(+), 21 deletions(-)
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 98467ab..6eb8920 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -1081,7 +1081,7 @@
// Access block in the tags
Cycles tag_latency(0);
-blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), tag_latency);
+blk = tags->accessBlock(pkt, tag_latency);
DPRINTF(Cache, "%s for %s %s\n", __func__, pkt->print(),
blk ? "hit " + blk->print() : "miss");
diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh
index 5a407a6..2edf74d 100644
--- a/src/mem/cache/tags/base.hh
+++ b/src/mem/cache/tags/base.hh
@@ -285,12 +285,11 @@
* should only be used as such. Returns the tag lookup latency as a
side
* effect.
*
- * @param addr The address to find.
- * @param is_secure True if the target memory space is secure.
+ * @param pkt The packet holding the address to find.
* @param lat The latency of the tag lookup.
* @return Pointer to the cache block if found.
*/
-virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat)
= 0;
+virtual CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat) = 0;
/**
* Generate the tag from the given address.
diff --git a/src/mem/cache/tags/base_set_assoc.hh
b/src/mem/cache/tags/base_set_assoc.hh
index b13b007..07e19a5 100644
--- a/src/mem/cache/tags/base_set_assoc.hh
+++ b/src/mem/cache/tags/base_set_assoc.hh
@@ -117,14 +117,13 @@
* should only be used as such. Returns the tag lookup latency as a
side
* effect.
*
- * @param addr The address to find.
- * @param is_secure True if the target memory space is secure.
+ * @param pkt The packet holding the address to find.
* @param lat The latency of the tag lookup.
* @return Pointer to the cache block if found.
*/
-CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
+CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat) override
{
-CacheBlk *blk = findBlock(addr, is_secure);
+CacheBlk *blk = findBlock(pkt->getAddr(), pkt->isSecure());
// Access all tags in parallel, hence one in each way. The data
side
// either accesses all blocks in parallel, or one block
sequentially on
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index e61a280..6fbc485 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -127,17 +127,18 @@
}
CacheBlk*
-FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat)
+FALRU::accessBlock(const PacketPtr pkt, Cycles &lat)
{
-return accessBlock(addr, is_secure, lat, 0);
+return accessBlock(pkt, lat, 0);
}
CacheBlk*
-FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat,
+FALRU::accessBlock(const PacketPtr pkt, Cycles &lat,
CachesMask *in_caches_mask)
{
CachesMask mask = 0;
-FALRUBlk* blk = static_cast(findBlock(addr, is_secure));
+FALRUBlk* blk =
+static_cast(findBlock(pkt->getAddr(), pkt->isSecure()));
// If a cache hit
if (blk && blk->isValid()) {
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 1d7e45a..550a44b 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -173,19 +173,18 @@
* cache access and should only be used as such.
* Returns tag lookup latency and the inCachesMask flags as a side
effect.
*
- * @param addr The address to look for.
- * @param is_secure True if the target memory space is secure.
+ * @param pkt The packet holding the address to find.
* @param lat The latency of the tag lookup.
* @param in_cache_mask Mask indicating the caches in which the blk
fits.
* @return Pointer to the cache block.
*/
-CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
+CacheBlk* accessBlock(const PacketPtr pkt, Cycles &lat,
CachesMask *in_cache_mask);
/**
* Just a wrapper of above function to conform with the base interface.
*/
-CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override;
+CacheBlk* accessBlock(const Packet
