Aweseome. My concern is that the read/write functions are getting
long and hard to read. Is there anything that makes sense to break
out into a second function? (i.e. the actual unaligned handling part?
Maybe a readUnaligned and writeUnaligned function with just a simple
check in read/write to
i stick to that rule too, and i like it as well. it's not that hard, and
when followed, makes for easier coding, you can be sure that you're
affecting the class var you want, instead of a random local var. i totally
vote to stick with the rule, and *actually following it* :).
lisa
On Sun, Nov
On Sat, Nov 8, 2008 at 9:12 PM, Gabe Black [EMAIL PROTECTED] wrote:
- Would it be possible to condense the code a bit? I think doing
things a little more lockstep with the two requests would help; also
I'd think you can assume that both requests end up being the same in
terms of
- It's still the official policy that local variables are lower
w/underscores while class members are mixed case... sometimes I have
mixed feelings about that one myself but I've been trying to do a
better job of sticking with it.
I was actually under the impression that the underscore
# HG changeset patch
# User Gabe Black [EMAIL PROTECTED]
# Date 1226207167 28800
# Node ID dc856beee70a0af5562dc3d83a94fb177bcd292e
# Parent d449af5378971cd0eb6bbafb84900a8f7ed50251
CPU: Make unaligned accesses work in the timing simple CPU.
diff --git a/src/cpu/simple/timing.cc
Ignore this. I forgot to qrefresh. In any case, the right version of
this fixes up a lot of the issues with the earlier version with the
notable exception of separating the split portions of the read and
write functions.
Gabe
[EMAIL PROTECTED] wrote:
# HG changeset patch
# User Gabe Black
I think I'll push what I've got and then try to figure out how to
refactor it. I agree that it feels really repetitive, but it's tricky
since there are a lot of little things that change each time that would
have to be parameterized and a lot of values that flow through the whole
process. I don't
changeset 17157c5f7e15 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=17157c5f7e15
description:
X86: Make the timing simple CPU handle variable length instructions.
diffstat:
1 file changed, 1 deletion(-)
src/cpu/simple/timing.cc |1 -
diffs (41 lines):
diff -r
changeset 8b9aaeac5bab in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8b9aaeac5bab
description:
X86: Fix completeAcc get call.
diffstat:
0 files changed
diffs (49 lines):
diff -r 17157c5f7e15 -r 8b9aaeac5bab src/arch/x86/insts/microldstop.hh
---
changeset f186533c0dc2 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f186533c0dc2
description:
X86: Add x86 reference output for the timing CPU.
diffstat:
32 files changed, 2091 insertions(+)
tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini| 96 +
* do-regression: qsub timed out, retrying locally
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-atomic passed.
*
Great feedback on the coding style... thanks. My main point was that
we should either follow the rule or get rid of it; sounds like
following it is the way to go.
Nate's comments point out a couple of holes:
- We don't really have a Python coding style (though the existing
style page doesn't
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