Re: [m5-dev] possible contributions to M5

2010-07-15 Thread Jiayuan Meng
Got it! I'll take a look at m5threads and prepare the patches to upload! Thanks! Jiayuan On Thu, Jul 15, 2010 at 9:51 AM, Steve Reinhardt ste...@gmail.com wrote: On Wed, Jul 14, 2010 at 6:46 AM, Jiayuan Meng jerryh...@gmail.com wrote: Thank you all for the suggestions! === I have

Re: [m5-dev] possible contributions to M5

2010-07-14 Thread Jiayuan Meng
Thank you all for the suggestions! === I have the following questions: === 1. how would M5 support plugins with pseudo instructions in the ISA? Following Gabe's thoughts: * M5 can provide general, customizable pseudo instructions One possibility is to have this pseudo instruction

Re: [m5-dev] possible contributions to M5

2010-07-13 Thread Jiayuan Meng
2. SIMD cores: Based on TimingSimpleCPU. This sounds pretty interesting too. Does the ISA matter much, or do you think it could be pretty generic? Did you add new instructions to do things? Yes, I amended the Alpha ISA and added two instructions to mark the begin and end of branch

Re: [m5-dev] possible contributions to M5

2010-07-13 Thread Jiayuan Meng
1. An in-order CPU module with multi-threading (switching threads upon cache accesses) based on TimingSimpleCPU This is probably #1 on the priority list Is this inorder model detailed (in terms of pipeline stages, branch prediciton, Functional Units, etc.)? No it's not detailed (so

Re: [m5-dev] possible contributions to M5

2010-07-13 Thread Jiayuan Meng
Hi Steve, Personally I would say 2,3,4,1... but I can understand how others might have different priorities. (Actually I haven't seen two people with the same order yet!) Maybe I should first re-take Stats101 to measure the best average of the ordering :) I think a key question that

[m5-dev] possible contributions to M5

2010-07-12 Thread Jiayuan Meng
Dear M5 Team, I'll soon start to work on integrating our M5-based simulator, MV5, into M5. I've read some documentation on the current status of M5, and I'd like to share my plan/ideas with you and hear your suggestions. Since M5 will soon replace its entire memory system modeling with RubyGems,

Re: [m5-dev] Any interest in directory coherence based on Jiayuan's Patch

2009-05-28 Thread Jiayuan Meng
Dear all, Just curious --- Is anyone going to ICS or coming around New York around June 10 or 11th? If so, we can meet and talk :) I know it's been a long struggle --- we have made a couple attempts in the past to get the patches into M5's source tree, but we didn't make much progress and I think

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-10-13 Thread Jiayuan Meng
next). Steve On Sun, Oct 12, 2008 at 1:52 PM, jiayuan meng [EMAIL PROTECTED] wrote: Hey all, As a first step to submit my first patch, here is a brief PPT presentation for the banked cache module. Let me know if you have any questions. I will refine the code and submit the full

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-09-22 Thread jiayuan meng
guidelines, etc.) Did you use a revision control system as you did your work? Thanks, Nate 2008/7/11 jiayuan meng [EMAIL PROTECTED]: Dear all, I appreciate all your support to help me with M5. I really love it. I'm a graduate student working with Prof. Kevin Skadron at University

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-09-21 Thread Jiayuan Meng
can work with you to make sure that the code meets all of the requirements (doesn't break things, is reasonably organized, meets the style guidelines, etc.) Did you use a revision control system as you did your work? Thanks, Nate 2008/7/11 jiayuan meng [EMAIL PROTECTED]: Dear all, I

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-07-30 Thread Jiayuan Meng
/11 jiayuan meng [EMAIL PROTECTED]: Dear all, I appreciate all your support to help me with M5. I really love it. I'm a graduate student working with Prof. Kevin Skadron at University of Virginia. And now, I'd like to submit patches to M5 that enables it to simulate CMP architecture. I have

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-07-28 Thread jiayuan meng
/12 jiayuan meng [EMAIL PROTECTED]: I'm going to pull the repository of m5_stable and base my patches upon this version, will that be fine? Date: Fri, 11 Jul 2008 16:50:19 -0700 From: [EMAIL PROTECTED] To: m5-dev@m5sim.org Subject: Re: [m5-dev

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-07-12 Thread jiayuan meng
guidelines, etc.) Did you use a revision control system as you did your work? Thanks, Nate 2008/7/11 jiayuan meng [EMAIL PROTECTED]: Dear all, I appreciate all your support to help me with M5. I really love it. I'm a graduate student working with Prof. Kevin Skadron at University

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-07-11 Thread jiayuan meng
to make sure that the code meets all of the requirements (doesn't break things, is reasonably organized, meets the style guidelines, etc.) Did you use a revision control system as you did your work? Thanks, Nate 2008/7/11 jiayuan meng [EMAIL PROTECTED]: Dear all, I appreciate all

Re: [m5-dev] submit patches: Mesh2D, directory coherence, and multithreading

2008-07-11 Thread jiayuan meng
for simple CPUs. I wouldn't mind figuring out checkpoints with the multithreaded simple CPUs as it would free me from EIO trace madness. Let me know when the patches are in m5. -Rick jiayuan meng wrote: Thanks! Yeah, I used mercurial queue to manage the patches. Ali and Steve helped