changeset 51f3026d4cbb in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=51f3026d4cbb
description:
Registers: Eliminate the ISA defined integer register file.
diffstat:
28 files changed, 27 insertions(+), 628 deletions(-)
src/arch/alpha/intregfile.cc | 22 -----
src/arch/alpha/intregfile.hh | 31 -------
src/arch/alpha/regfile.cc | 2
src/arch/alpha/regfile.hh | 16 ----
src/arch/arm/regfile/int_regfile.hh | 41 ----------
src/arch/arm/regfile/regfile.cc | 2
src/arch/arm/regfile/regfile.hh | 23 -----
src/arch/mips/SConscript | 1
src/arch/mips/regfile.cc | 14 ---
src/arch/mips/regfile/int_regfile.cc | 103 --------------------------
src/arch/mips/regfile/int_regfile.hh | 17 ----
src/arch/mips/regfile/regfile.cc | 17 ----
src/arch/mips/regfile/regfile.hh | 5 -
src/arch/sparc/SConscript | 1
src/arch/sparc/intregfile.cc | 80 --------------------
src/arch/sparc/intregfile.hh | 29 -------
src/arch/sparc/predecoder.hh | 1
src/arch/sparc/regfile.cc | 17 ----
src/arch/sparc/regfile.hh | 10 --
src/arch/x86/SConscript | 1
src/arch/x86/intregfile.cc | 132 ----------------------------------
src/arch/x86/intregfile.hh | 27 ------
src/arch/x86/regfile.cc | 27 ------
src/arch/x86/regfile.hh | 15 +--
src/cpu/inorder/cpu.cc | 6 -
src/cpu/inorder/cpu.hh | 2
src/cpu/simple_thread.cc | 6 +
src/cpu/simple_thread.hh | 7 +
diffs (truncated from 1126 to 300 lines):
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/alpha/intregfile.cc
--- a/src/arch/alpha/intregfile.cc Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/intregfile.cc Wed Jul 08 23:02:20 2009 -0700
@@ -30,11 +30,7 @@
* Kevin Lim
*/
-#include <cstring>
-
-#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/intregfile.hh"
-#include "sim/serialize.hh"
namespace AlphaISA {
@@ -52,23 +48,5 @@
/* 24 */ 24, 25, 26, 27, 28, 29, 30, 31 };
#endif
-void
-IntRegFile::clear()
-{
- std::memset(regs, 0, sizeof(regs));
-}
-
-void
-IntRegFile::serialize(std::ostream &os)
-{
- SERIALIZE_ARRAY(regs, NumIntRegs);
-}
-
-void
-IntRegFile::unserialize(Checkpoint *cp, const std::string §ion)
-{
- UNSERIALIZE_ARRAY(regs, NumIntRegs);
-}
-
} // namespace AlphaISA
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/alpha/intregfile.hh
--- a/src/arch/alpha/intregfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/intregfile.hh Wed Jul 08 23:02:20 2009 -0700
@@ -32,42 +32,13 @@
#ifndef __ARCH_ALPHA_INTREGFILE_HH__
#define __ARCH_ALPHA_INTREGFILE_HH__
-#include <iosfwd>
-#include <string>
-
-#include "arch/alpha/types.hh"
-
-class Checkpoint;
+#include "arch/alpha/isa_traits.hh"
namespace AlphaISA {
// redirected register map, really only used for the full system case.
extern const int reg_redir[NumIntRegs];
-class IntRegFile
-{
- protected:
- IntReg regs[NumIntRegs];
-
- public:
- IntReg
- readReg(int intReg)
- {
- return regs[intReg];
- }
-
- void
- setReg(int intReg, const IntReg &val)
- {
- regs[intReg] = val;
- }
-
- void clear();
-
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string §ion);
-};
-
} // namespace AlphaISA
#endif // __ARCH_ALPHA_INTREGFILE_HH__
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/alpha/regfile.cc
--- a/src/arch/alpha/regfile.cc Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/regfile.cc Wed Jul 08 23:02:20 2009 -0700
@@ -41,7 +41,6 @@
void
RegFile::serialize(EventManager *em, ostream &os)
{
- intRegFile.serialize(os);
SERIALIZE_SCALAR(pc);
SERIALIZE_SCALAR(npc);
#if FULL_SYSTEM
@@ -52,7 +51,6 @@
void
RegFile::unserialize(EventManager *em, Checkpoint *cp, const string §ion)
{
- intRegFile.unserialize(cp, section);
UNSERIALIZE_SCALAR(pc);
UNSERIALIZE_SCALAR(npc);
#if FULL_SYSTEM
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/alpha/regfile.hh
--- a/src/arch/alpha/regfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/regfile.hh Wed Jul 08 23:02:20 2009 -0700
@@ -89,9 +89,6 @@
setNextNPC(Addr val)
{ }
- protected:
- IntRegFile intRegFile; // (signed) integer register file
-
public:
#if FULL_SYSTEM
int intrflag; // interrupt flag
@@ -100,19 +97,6 @@
void
clear()
{
- intRegFile.clear();
- }
-
- IntReg
- readIntReg(int intReg)
- {
- return intRegFile.readReg(intReg);
- }
-
- void
- setIntReg(int intReg, const IntReg &val)
- {
- intRegFile.setReg(intReg, val);
}
void serialize(EventManager *em, std::ostream &os);
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/arm/regfile/int_regfile.hh
--- a/src/arch/arm/regfile/int_regfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/arm/regfile/int_regfile.hh Wed Jul 08 23:02:20 2009 -0700
@@ -43,11 +43,6 @@
namespace ArmISA
{
- static inline std::string getIntRegName(RegIndex)
- {
- return "";
- }
-
enum MiscIntRegNums {
zero_reg = NumIntArchRegs,
addr_reg,
@@ -77,42 +72,6 @@
r14_abt
};
- class IntRegFile
- {
- protected:
- IntReg regs[NumIntRegs];
-
- public:
- IntReg readReg(int intReg)
- {
- DPRINTF(IntRegs, "Reading int reg %d as %#x.\n",
- intReg, regs[intReg]);
- return regs[intReg];
- }
-
- void clear()
- {
- bzero(regs, sizeof(regs));
- }
-
- Fault setReg(int intReg, const IntReg &val)
- {
- DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", intReg, val);
- regs[intReg] = val;
- return NoFault;
- }
-
- void serialize(std::ostream &os)
- {
- SERIALIZE_ARRAY(regs, NumIntRegs);
- }
-
- void unserialize(Checkpoint *cp, const std::string §ion)
- {
- UNSERIALIZE_ARRAY(regs, NumIntRegs);
- }
- };
-
} // namespace ArmISA
#endif
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/arm/regfile/regfile.cc
--- a/src/arch/arm/regfile/regfile.cc Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/arm/regfile/regfile.cc Wed Jul 08 23:02:20 2009 -0700
@@ -57,7 +57,6 @@
void
RegFile::serialize(EventManager *em, ostream &os)
{
- intRegFile.serialize(os);
SERIALIZE_SCALAR(npc);
SERIALIZE_SCALAR(nnpc);
}
@@ -65,7 +64,6 @@
void
RegFile::unserialize(EventManager *em, Checkpoint *cp, const string §ion)
{
- intRegFile.unserialize(cp, section);
UNSERIALIZE_SCALAR(npc);
UNSERIALIZE_SCALAR(nnpc);
}
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/arm/regfile/regfile.hh
--- a/src/arch/arm/regfile/regfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/arm/regfile/regfile.hh Wed Jul 08 23:02:20 2009 -0700
@@ -67,25 +67,10 @@
class RegFile
{
- protected:
- IntRegFile intRegFile; // (signed) integer register file
-
public:
void clear()
- {
- intRegFile.clear();
- }
-
- IntReg readIntReg(int intReg)
- {
- return intRegFile.readReg(intReg);
- }
-
- void setIntReg(int intReg, const IntReg &val)
- {
- intRegFile.setReg(intReg, val);
- }
+ {}
protected:
Addr pc; // program counter
@@ -95,14 +80,12 @@
public:
Addr readPC()
{
- return intRegFile.readReg(PCReg);
- //return pc;
+ return pc;
}
void setPC(Addr val)
{
- intRegFile.setReg(PCReg, val);
- //pc = val;
+ pc = val;
}
Addr readNextPC()
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/mips/SConscript
--- a/src/arch/mips/SConscript Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/mips/SConscript Wed Jul 08 23:02:20 2009 -0700
@@ -35,7 +35,6 @@
if env['TARGET_ISA'] == 'mips':
Source('faults.cc')
Source('isa.cc')
- Source('regfile/int_regfile.cc')
Source('regfile/misc_regfile.cc')
Source('regfile/regfile.cc')
Source('tlb.cc')
diff -r c7295a4826d5 -r 51f3026d4cbb src/arch/mips/regfile.cc
--- a/src/arch/mips/regfile.cc Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/mips/regfile.cc Wed Jul 08 23:02:20 2009 -0700
@@ -48,7 +48,6 @@
void RegFile::clear()
{
- intRegFile.clear();
miscRegFile.clear();
}
@@ -56,20 +55,9 @@
RegFile::reset(std::string core_name, ThreadID num_threads,
unsigned num_vpes)
{
- bzero(&intRegFile, sizeof(intRegFile));
miscRegFile.reset(core_name, num_threads, num_vpes);
}
-IntReg RegFile::readIntReg(int intReg)
-{
- return intRegFile.readReg(intReg);
-}
-
-Fault RegFile::setIntReg(int intReg, const IntReg &val)
-{
- return intRegFile.setReg(intReg, val);
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