changeset 7d7df4ad7486 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=7d7df4ad7486
description:
X86: Actually check page protections.
diffstat:
1 file changed, 12 insertions(+)
src/arch/x86/tlb.cc | 12 ++++++++++++
diffs (22 lines):
diff -r 4bbd6239223c -r 7d7df4ad7486 src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc Wed Feb 25 10:18:51 2009 -0800
+++ b/src/arch/x86/tlb.cc Wed Feb 25 10:18:58 2009 -0800
@@ -649,6 +649,18 @@
#endif
}
// Do paging protection checks.
+ bool inUser = (csAttr.dpl == 3 &&
+ !(flags & (CPL0FlagBit << FlagShift)));
+ if (inUser && !entry->user ||
+ write && !entry->writable) {
+ // The page must have been present to get into the TLB in
+ // the first place. We'll assume the reserved bits are
+ // fine even though we're not checking them.
+ return new PageFault(vaddr, true, write,
+ inUser, false, execute);
+ }
+
+
DPRINTF(TLB, "Entry found with paddr %#x, "
"doing protection checks.\n", entry->paddr);
Addr paddr = entry->paddr | (vaddr & (entry->size-1));
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