changeset b702f4fdf16c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b702f4fdf16c
description:
X86: Add a check to chks which raises #GP(selector) if selector is NULL
or not in the GDT.
diffstat:
2 files changed, 9 insertions(+), 2 deletions(-)
src/arch/x86/isa/microasm.isa | 3 ++-
src/arch/x86/isa/microops/regop.isa | 8 +++++++-
diffs (38 lines):
diff -r 541097c69e22 -r b702f4fdf16c src/arch/x86/isa/microasm.isa
--- a/src/arch/x86/isa/microasm.isa Wed Feb 25 10:16:43 2009 -0800
+++ b/src/arch/x86/isa/microasm.isa Wed Feb 25 10:16:54 2009 -0800
@@ -86,7 +86,8 @@
# Add in symbols for the various checks of segment selectors.
for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
- "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck"):
+ "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
+ "TRCheck"):
assembler.symbols[check] = "Seg%s" % check
for reg in ("TR", "IDTR"):
diff -r 541097c69e22 -r b702f4fdf16c src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Wed Feb 25 10:16:43 2009 -0800
+++ b/src/arch/x86/isa/microops/regop.isa Wed Feb 25 10:16:54 2009 -0800
@@ -234,7 +234,8 @@
enum SegmentSelectorCheck {
SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
- SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck
+ SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck,
+ SegTRCheck
};
enum LongModeDescriptorType {
@@ -1118,6 +1119,11 @@
"in legacy mode.\\n");
}
break;
+ case SegTRCheck:
+ if (!selector.si || selector.ti) {
+ fault = new GeneralProtection(selector);
+ }
+ break;
default:
panic("Undefined segment check type.\\n");
}
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