[m5-dev] changeset in m5: X86: Add a trace flag for tracing faults.

[Gabe Black]

changeset ecbd27e5d1f8 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ecbd27e5d1f8
description:
        X86: Add a trace flag for tracing faults.

diffstat:

3 files changed, 31 insertions(+), 2 deletions(-)
src/arch/x86/SConscript |    1 +
src/arch/x86/faults.cc  |   24 +++++++++++++++++++++++-
src/arch/x86/faults.hh  |    8 +++++++-

diffs (105 lines):

diff -r c24a1ffc4ad0 -r ecbd27e5d1f8 src/arch/x86/SConscript
--- a/src/arch/x86/SConscript   Wed Feb 25 10:17:54 2009 -0800
+++ b/src/arch/x86/SConscript   Wed Feb 25 10:17:59 2009 -0800
@@ -113,6 +113,7 @@
         TraceFlag('LocalApic', "Local APIC debugging")
         TraceFlag('PageTableWalker', \
                   "Page table walker state machine debugging")
+        TraceFlag('Faults', "Trace all faults/exceptions/traps")
 
         SimObject('X86LocalApic.py')
         SimObject('X86System.py')
diff -r c24a1ffc4ad0 -r ecbd27e5d1f8 src/arch/x86/faults.cc
--- a/src/arch/x86/faults.cc    Wed Feb 25 10:17:54 2009 -0800
+++ b/src/arch/x86/faults.cc    Wed Feb 25 10:17:59 2009 -0800
@@ -103,6 +103,8 @@
 #if FULL_SYSTEM
     void X86FaultBase::invoke(ThreadContext * tc)
     {
+        Addr pc = tc->readPC();
+        DPRINTF(Faults, "RIP %#x: vector %d: %s\n", pc, vector, describe());
         using namespace X86ISAInst::RomLabels;
         HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
         MicroPC entry;
@@ -116,7 +118,7 @@
             entry = extern_label_legacyModeInterrupt;
         }
         tc->setIntReg(INTREG_MICRO(1), vector);
-        tc->setIntReg(INTREG_MICRO(7), tc->readPC());
+        tc->setIntReg(INTREG_MICRO(7), pc);
         if (errorCode != (uint64_t)(-1)) {
             if (m5reg.mode == LongMode) {
                 entry = extern_label_longModeInterruptWithError;
@@ -132,6 +134,18 @@
         tc->setMicroPC(romMicroPC(entry));
         tc->setNextMicroPC(romMicroPC(entry) + 1);
     }
+
+    std::string
+    X86FaultBase::describe() const
+    {
+        std::stringstream ss;
+        ccprintf(ss, "%s", mnemonic());
+        if (errorCode != (uint64_t)(-1)) {
+            ccprintf(ss, "(%#x)", errorCode);
+        }
+
+        return ss.str();
+    }
     
     void X86Trap::invoke(ThreadContext * tc)
     {
@@ -163,6 +177,14 @@
         }
     }
 
+    std::string
+    PageFault::describe() const
+    {
+        std::stringstream ss;
+        ccprintf(ss, "%s at %#x", X86FaultBase::describe(), addr);
+        return ss.str();
+    }
+
 #endif
 } // namespace X86ISA
 
diff -r c24a1ffc4ad0 -r ecbd27e5d1f8 src/arch/x86/faults.hh
--- a/src/arch/x86/faults.hh    Wed Feb 25 10:17:54 2009 -0800
+++ b/src/arch/x86/faults.hh    Wed Feb 25 10:17:59 2009 -0800
@@ -62,6 +62,8 @@
 #include "base/misc.hh"
 #include "sim/faults.hh"
 
+#include <string>
+
 namespace X86ISA
 {
     // Base class for all x86 "faults" where faults is in the m5 sense
@@ -102,6 +104,8 @@
 
 #if FULL_SYSTEM
         void invoke(ThreadContext * tc);
+
+        virtual std::string describe() const;
 #endif
     };
 
@@ -342,6 +346,8 @@
 
 #if FULL_SYSTEM
         void invoke(ThreadContext * tc);
+
+        virtual std::string describe() const;
 #endif
     };
 
@@ -414,7 +420,7 @@
     {
       public:
         SoftwareInterrupt(uint8_t _vector) :
-            X86Interrupt("Software Interrupt", "INTn", _vector)
+            X86Interrupt("Software Interrupt", "#INTR", _vector)
         {}
 
         bool isSoft()
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