changeset b741b3e7164b in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=b741b3e7164b description: fixed MC146818 checkpointing bug and added isa serialization calls to simple_thread
diffstat: 2 files changed, 28 insertions(+), 4 deletions(-) src/cpu/simple_thread.cc | 10 ++++++++++ src/dev/mc146818.cc | 22 ++++++++++++++++++---- diffs (66 lines): diff -r e93e6d7b48a0 -r b741b3e7164b src/cpu/simple_thread.cc --- a/src/cpu/simple_thread.cc Sat Oct 10 22:31:56 2009 -0700 +++ b/src/cpu/simple_thread.cc Thu Oct 15 15:15:24 2009 -0700 @@ -199,6 +199,11 @@ SERIALIZE_SCALAR(nextPC); SERIALIZE_SCALAR(nextNPC); // thread_num and cpu_id are deterministic from the config + + // + // Now must serialize all the ISA dependent state + // + isa.serialize(os); } @@ -214,6 +219,11 @@ UNSERIALIZE_SCALAR(nextPC); UNSERIALIZE_SCALAR(nextNPC); // thread_num and cpu_id are deterministic from the config + + // + // Now must unserialize all the ISA dependent state + // + isa.unserialize(cp, section); } #if FULL_SYSTEM diff -r e93e6d7b48a0 -r b741b3e7164b src/dev/mc146818.cc --- a/src/dev/mc146818.cc Sat Oct 10 22:31:56 2009 -0700 +++ b/src/dev/mc146818.cc Thu Oct 15 15:15:24 2009 -0700 @@ -207,6 +207,15 @@ arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data)); paramOut(os, base + ".stat_regA", stat_regA); paramOut(os, base + ".stat_regB", stat_regB); + + // + // save the timer tick and rtc clock tick values to correctly reschedule + // them during unserialize + // + Tick rtcTimerInterruptTickOffset = event.when() - curTick; + SERIALIZE_SCALAR(rtcTimerInterruptTickOffset); + Tick rtcClockTickOffset = event.when() - curTick; + SERIALIZE_SCALAR(rtcClockTickOffset); } void @@ -218,10 +227,15 @@ paramIn(cp, section, base + ".stat_regA", stat_regA); paramIn(cp, section, base + ".stat_regB", stat_regB); - // We're not unserializing the event here, but we need to - // rescehedule the event since curTick was moved forward by the - // checkpoint - reschedule(event, curTick + event.interval); + // + // properly schedule the timer and rtc clock events + // + Tick rtcTimerInterruptTickOffset; + UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset); + reschedule(event, curTick + rtcTimerInterruptTickOffset); + Tick rtcClockTickOffset; + UNSERIALIZE_SCALAR(rtcClockTickOffset); + reschedule(tickEvent, curTick + rtcClockTickOffset); } MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i) _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev