[gem5-dev] Cron /z/m5/regression/do-regression quick
scons: `build/ALPHA_SE/m5.debug' is up to date. scons: `build/ALPHA_SE_MOESI_hammer/m5.debug' is up to date. scons: `build/ALPHA_SE_MESI_CMP_directory/m5.debug' is up to date. scons: `build/ALPHA_SE_MOESI_CMP_directory/m5.debug' is up to date. scons: `build/ALPHA_SE_MOESI_CMP_token/m5.debug' is up to date. scons: `build/ALPHA_FS/m5.debug' is up to date. scons: `build/MIPS_SE/m5.debug' is up to date. scons: `build/POWER_SE/m5.debug' is up to date. scons: `build/SPARC_SE/m5.debug' is up to date. scons: `build/SPARC_FS/m5.debug' is up to date. scons: `build/X86_SE/m5.debug' is up to date. scons: `build/X86_FS/m5.debug' is up to date. scons: `build/ARM_SE/m5.debug' is up to date. scons: `build/ARM_FS/m5.debug' is up to date. scons: `build/ALPHA_SE/m5.fast' is up to date. scons: `build/ALPHA_SE_MOESI_hammer/m5.fast' is up to date. scons: `build/ALPHA_SE_MESI_CMP_directory/m5.fast' is up to date. scons: `build/ALPHA_SE_MOESI_CMP_directory/m5.fast' is up to date. scons: `build/ALPHA_SE_MOESI_CMP_token/m5.fast' is up to date. scons: `build/ALPHA_FS/m5.fast' is up to date. scons: `build/MIPS_SE/m5.fast' is up to date. scons: `build/POWER_SE/m5.fast' is up to date. scons: `build/SPARC_SE/m5.fast' is up to date. scons: `build/SPARC_FS/m5.fast' is up to date. scons: `build/X86_SE/m5.fast' is up to date. scons: `build/X86_FS/m5.fast' is up to date. scons: `build/ARM_SE/m5.fast' is up to date. scons: `build/ARM_FS/m5.fast' is up to date. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/inorder-timing passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/o3-timing passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-atomic passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/o3-timing passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-atomic passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing passed. * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby passed. * build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing passed. * build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-atomic passed. * build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-timing passed. * build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-atomic-mp passed. * build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-timing-mp passed. * build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest passed. * build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby passed. * build/ALPHA_SE/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby passed. * build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer passed. * build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer passed. * build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer passed. * build/ALPHA_SE_MOESI_hammer/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer passed. * build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory passed. * build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory passed. * build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory passed. * build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory passed. * build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory passed. * build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory passed. * build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory passed. * build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory passed. * build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token passed. * build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token passed. * build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token passed. * build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token passed. * build/ALPHA_FS/tests/opt/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic passed. * build/ALPHA_FS/tests/opt/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual passed. * build/ALPHA_FS/tests/opt/quick/10.linux-boot/alpha/linu
[gem5-dev] changeset in gem5: gcc 4.0: Add some virtual destructors to make...
changeset 4d1005f78496 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4d1005f78496 description: gcc 4.0: Add some virtual destructors to make gcc 4.0 happy. diffstat: src/base/stats/output.hh | 1 + src/cpu/inorder/resource_pool.hh | 2 +- 2 files changed, 2 insertions(+), 1 deletions(-) diffs (23 lines): diff -r b9ba22cb23f2 -r 4d1005f78496 src/base/stats/output.hh --- a/src/base/stats/output.hh Fri Jun 03 13:52:18 2011 -0500 +++ b/src/base/stats/output.hh Tue Jun 07 00:24:49 2011 -0700 @@ -46,6 +46,7 @@ struct Output { +virtual ~Output() {} virtual void begin() = 0; virtual void end() = 0; virtual bool valid() const = 0; diff -r b9ba22cb23f2 -r 4d1005f78496 src/cpu/inorder/resource_pool.hh --- a/src/cpu/inorder/resource_pool.hh Fri Jun 03 13:52:18 2011 -0500 +++ b/src/cpu/inorder/resource_pool.hh Tue Jun 07 00:24:49 2011 -0700 @@ -122,7 +122,7 @@ public: ResourcePool(InOrderCPU *_cpu, ThePipeline::Params *params); -~ResourcePool(); +virtual ~ResourcePool(); std::string name(); ___ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Review Request: ISA parser: Loosen the regular expressions matching filenames.
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/737/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary --- ISA parser: Loosen the regular expressions matching filenames. The regular expressions matching filenames in the ##include directives and the internally generated ##newfile directives where only looking for filenames composed of alpha numeric characters, periods, and dashes. In Unix/Linux, the rules for what characters can be in a filename are much looser than that. This change replaces those expressions with ones that look for anything other than a quote character. Technically quote characters are allowed as well so we should allow escaping them somehow, but the additional complexity probably isn't worth it. Diffs - src/arch/isa_parser.py 4d1005f78496 Diff: http://reviews.m5sim.org/r/737/diff Testing --- Thanks, Gabe ___ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request: ISA parser: Loosen the regular expressions matching filenames.
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/737/#review1300 --- Ship it! - Steve On 2011-06-07 02:24:01, Gabe Black wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/737/ > --- > > (Updated 2011-06-07 02:24:01) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > --- > > ISA parser: Loosen the regular expressions matching filenames. > > The regular expressions matching filenames in the ##include directives and the > internally generated ##newfile directives where only looking for filenames > composed of alpha numeric characters, periods, and dashes. In Unix/Linux, the > rules for what characters can be in a filename are much looser than that. This > change replaces those expressions with ones that look for anything other than > a quote character. Technically quote characters are allowed as well so we > should allow escaping them somehow, but the additional complexity probably > isn't worth it. > > > Diffs > - > > src/arch/isa_parser.py 4d1005f78496 > > Diff: http://reviews.m5sim.org/r/737/diff > > > Testing > --- > > > Thanks, > > Gabe > > ___ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] changeset in gem5: ISA parser: Loosen the regular expressions ma...
changeset 1810956fa5dc in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=1810956fa5dc description: ISA parser: Loosen the regular expressions matching filenames. The regular expressions matching filenames in the ##include directives and the internally generated ##newfile directives where only looking for filenames composed of alpha numeric characters, periods, and dashes. In Unix/Linux, the rules for what characters can be in a filename are much looser than that. This change replaces those expressions with ones that look for anything other than a quote character. Technically quote characters are allowed as well so we should allow escaping them somehow, but the additional complexity probably isn't worth it. diffstat: src/arch/isa_parser.py | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diffs (21 lines): diff -r 4d1005f78496 -r 1810956fa5dc src/arch/isa_parser.py --- a/src/arch/isa_parser.pyTue Jun 07 00:24:49 2011 -0700 +++ b/src/arch/isa_parser.pyTue Jun 07 00:46:54 2011 -0700 @@ -1215,7 +1215,7 @@ return t def t_NEWFILE(self, t): -r'^\#\#newfile\s+"[\w/.-]*"' +r'^\#\#newfile\s+"[^"]*"' self.fileNameStack.push((t.value[11:-1], t.lexer.lineno)) t.lexer.lineno = 0 @@ -1998,7 +1998,7 @@ f.close() # This regular expression matches '##include' directives -includeRE = re.compile(r'^\s*##include\s+"(?P[\w/.-]*)".*$', +includeRE = re.compile(r'^\s*##include\s+"(?P[^"]*)".*$', re.MULTILINE) def replace_include(self, matchobj, dirname): ___ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Query on inheritance and virtual functions
Consider the following class declarations -- class A { public: virtual void function() = 0; }; class B : public A { private: void function(); } int main() { B b; b.function(); } Will this code compile correctly? -- Nilay ___ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Query on inheritance and virtual functions
When you declare your function private, you can't use instance.function() to access it. Is it generating a compile time error? On 8 Jun 2011, at 00:31, Nilay Vaish wrote: > Consider the following class declarations -- > > class A > { > public: >virtual void function() = 0; > }; > > class B : public A > { > private: >void function(); > } > > int main() > { > B b; > b.function(); > } > > Will this code compile correctly? > > -- > Nilay > ___ > gem5-dev mailing list > gem5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/gem5-dev ___ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] changeset in m5: scons: rename TraceFlags to DebugFlags
Why not just let TraceFlags be interpreted as DebugFlags, so TraceFlags still works for users. On 3 Jun 2011, at 02:08, Nathan Binkert wrote: > changeset 9228e00459d4 in /z/repo/m5 > details: http://repo.m5sim.org/m5?cmd=changeset;node=9228e00459d4 > description: > scons: rename TraceFlags to DebugFlags > > diffstat: > > src/SConscript | 2 - > src/arch/SConscript | 6 +- > src/arch/arm/SConscript | 8 ++-- > src/arch/mips/SConscript| 2 +- > src/arch/power/SConscript | 2 +- > src/arch/sparc/SConscript | 4 +- > src/arch/x86/SConscript | 10 +++--- > src/base/SConscript | 24 +++--- > src/base/vnc/SConscript | 2 +- > src/cpu/SConscript | 54 > src/cpu/inorder/SConscript | 44 +- > src/cpu/o3/SConscript | 24 +++--- > src/cpu/ozone/SConscript| 10 +++--- > src/cpu/pred/SConscript | 2 +- > src/cpu/simple/SConscript | 2 +- > src/cpu/testers/directedtest/SConscript | 2 +- > src/cpu/testers/memtest/SConscript | 2 +- > src/cpu/testers/networktest/SConscript | 2 +- > src/cpu/testers/rubytest/SConscript | 2 +- > src/dev/SConscript | 50 +++--- > src/dev/alpha/SConscript| 4 +- > src/dev/arm/SConscript | 8 ++-- > src/dev/mips/SConscript | 2 +- > src/dev/sparc/SConscript| 2 +- > src/dev/x86/SConscript | 16 > src/kern/SConscript | 6 +- > src/mem/SConscript | 34 ++-- > src/mem/cache/SConscript| 8 ++-- > src/mem/cache/tags/SConscript | 4 +- > src/sim/SConscript | 34 ++-- > 30 files changed, 185 insertions(+), 187 deletions(-) > > diffs (truncated from 687 to 300 lines): > > diff -r 483e936f44f0 -r 9228e00459d4 src/SConscript > --- a/src/SConscript Thu Jun 02 17:36:18 2011 -0700 > +++ b/src/SConscript Thu Jun 02 17:36:21 2011 -0700 > @@ -270,7 +270,6 @@ > if name in debug_flags: > raise AttributeError, "Flag %s already specified" % name > debug_flags[name] = (name, (), desc) > -TraceFlag = DebugFlag > > def CompoundFlag(name, flags, desc=None): > if name in debug_flags: > @@ -280,7 +279,6 @@ > debug_flags[name] = (name, compound, desc) > > Export('DebugFlag') > -Export('TraceFlag') > Export('CompoundFlag') > > > diff -r 483e936f44f0 -r 9228e00459d4 src/arch/SConscript > --- a/src/arch/SConscript Thu Jun 02 17:36:18 2011 -0700 > +++ b/src/arch/SConscript Thu Jun 02 17:36:21 2011 -0700 > @@ -126,7 +126,7 @@ > > env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) > > -TraceFlag('IntRegs') > -TraceFlag('FloatRegs') > -TraceFlag('MiscRegs') > +DebugFlag('IntRegs') > +DebugFlag('FloatRegs') > +DebugFlag('MiscRegs') > CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) > diff -r 483e936f44f0 -r 9228e00459d4 src/arch/arm/SConscript > --- a/src/arch/arm/SConscript Thu Jun 02 17:36:18 2011 -0700 > +++ b/src/arch/arm/SConscript Thu Jun 02 17:36:21 2011 -0700 > @@ -65,10 +65,10 @@ > SimObject('ArmNativeTrace.py') > SimObject('ArmTLB.py') > > -TraceFlag('Arm') > -TraceFlag('TLBVerbose') > -TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi") > -TraceFlag('Predecoder', "Instructions returned by the predecoder") > +DebugFlag('Arm') > +DebugFlag('TLBVerbose') > +DebugFlag('Faults', "Trace Exceptions, interrupts, svc/swi") > +DebugFlag('Predecoder', "Instructions returned by the predecoder") > if env['FULL_SYSTEM']: > Source('interrupts.cc') > Source('stacktrace.cc') > diff -r 483e936f44f0 -r 9228e00459d4 src/arch/mips/SConscript > --- a/src/arch/mips/SConscriptThu Jun 02 17:36:18 2011 -0700 > +++ b/src/arch/mips/SConscriptThu Jun 02 17:36:21 2011 -0700 > @@ -41,7 +41,7 @@ > Source('dsp.cc') > > SimObject('MipsTLB.py') > -TraceFlag('MipsPRA') > +DebugFlag('MipsPRA') > > if env['FULL_SYSTEM']: > SimObject('MipsSystem.py') > diff -r 483e936f44f0 -r 9228e00459d4 src/arch/power/SConscript > --- a/src/arch/power/SConscript Thu Jun 02 17:36:18 2011 -0700 > +++ b/src/arch/power/SConscript Thu Jun 02 17:36:21 2011 -0700 > @@ -45,7 +45,7 @@ > Source('utility.cc') > > SimObject('PowerTLB.py') > -TraceFlag('Power') > +DebugFlag('Power') > > if not env['FULL_SYSTEM']: > Source('process.cc') > diff -r 483e936f44f0 -r 9228e00459d4 src/arch/sparc/SConscript > --- a/src/arch/sparc/SConscript Thu Jun 02 17:36:18 2011 -0700 > +++ b/src