For now, I'm going to make the miscregfile have the event and cause an
interrupt when the timer goes off. This really sounds crappy to me, but
I'd have to add new functions to get at the interrupt object like there
are for the TLB. That wouldn't be hard, but I wanted to point out I'd be
adding
Oh, and one thing I forgot, registers can be like faults where they're
little islands of the ISA. They know how to translate indexes, and they
could use bitunions, which if it works (I don't remember if it does)
could be inherited from (or inherit, with some modifications) to be able
to pull
Thanks for the email... can't say I really follow all the nuances
after a quick read, but I'm glad you're thinking about it. Just a few
comments off the top of my head:
The common indexing scheme across all register types is something we
inherited from SimpleScalar. It's not ideal for actually
I'm at a point now where the kernel is trying to wait for the 8254
timer to tick 300 times before moving to the local APIC timer to use for
timer interrupts. As we determined before, the 8254 is the same as the
PIT used in Alpha Tsunami, so I'm going to move the Alpha code to a
neutral
I just got back from my trip. I'll try to review this in the next
couple of days, but I'm going to work on getting the copyright stuff
done first.
Nate
On Thu, May 22, 2008 at 2:01 PM, Ali Saidi [EMAIL PROTECTED] wrote:
So this fixes some bugs in the previous version (specifically hginfo.cc
