Re: [gem5-dev] Review Request: Ruby: Correctly set access permissions for directory entries

2011-06-06 Thread Nilay Vaish 

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(Updated 2011-06-06 14:45:22.384167)


Review request for Default.


Summary
---

Ruby: Correctly set access permissions for directory entries
The access permissions for the directory entries are not being set correctly.
This is because pointers are not used for handling directory entries.
function. get and set functions for access permissions have been added to the
Controller state machine. The changePermission() function provided by the
AbstractEntry and AbstractCacheEntry classes has been exposed to SLICC
code once again. The set_permission() functionality has been removed.

NOTE: Each protocol will have to define these get and set functions in order
to compile successfully.


Diffs
-

  src/mem/protocol/MESI_CMP_directory-L1cache.sm b9ba22cb23f2 
  src/mem/protocol/MESI_CMP_directory-L2cache.sm b9ba22cb23f2 
  src/mem/protocol/MESI_CMP_directory-dir.sm b9ba22cb23f2 
  src/mem/protocol/MESI_CMP_directory-dma.sm b9ba22cb23f2 
  src/mem/protocol/MI_example-cache.sm b9ba22cb23f2 
  src/mem/protocol/MI_example-dir.sm b9ba22cb23f2 
  src/mem/protocol/MI_example-dma.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-L1cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-L2cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-dir.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-dma.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-L1cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-L2cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-dir.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-dma.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_hammer-cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_hammer-dir.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_hammer-dma.sm b9ba22cb23f2 
  src/mem/protocol/Network_test-cache.sm b9ba22cb23f2 
  src/mem/protocol/Network_test-dir.sm b9ba22cb23f2 
  src/mem/protocol/RubySlicc_Types.sm b9ba22cb23f2 
  src/mem/ruby/slicc_interface/AbstractController.hh b9ba22cb23f2 
  src/mem/slicc/ast/MethodCallExprAST.py b9ba22cb23f2 
  src/mem/slicc/symbols/StateMachine.py b9ba22cb23f2 

Diff: http://reviews.m5sim.org/r/684/diff


Testing (updated)
---

Passes regression tests and 1 loads with ruby random tester.


Thanks,

Nilay

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Re: [gem5-dev] Review Request: Ruby: Correctly set access permissions for directory entries

2011-06-06 Thread Nilay Vaish 

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This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/684/
---

(Updated 2011-06-06 14:44:19.791924)


Review request for Default.


Summary (updated)
---

Ruby: Correctly set access permissions for directory entries
The access permissions for the directory entries are not being set correctly.
This is because pointers are not used for handling directory entries.
function. get and set functions for access permissions have been added to the
Controller state machine. The changePermission() function provided by the
AbstractEntry and AbstractCacheEntry classes has been exposed to SLICC
code once again. The set_permission() functionality has been removed.

NOTE: Each protocol will have to define these get and set functions in order
to compile successfully.


Diffs (updated)
-

  src/mem/protocol/MESI_CMP_directory-L1cache.sm b9ba22cb23f2 
  src/mem/protocol/MESI_CMP_directory-L2cache.sm b9ba22cb23f2 
  src/mem/protocol/MESI_CMP_directory-dir.sm b9ba22cb23f2 
  src/mem/protocol/MESI_CMP_directory-dma.sm b9ba22cb23f2 
  src/mem/protocol/MI_example-cache.sm b9ba22cb23f2 
  src/mem/protocol/MI_example-dir.sm b9ba22cb23f2 
  src/mem/protocol/MI_example-dma.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-L1cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-L2cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-dir.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_directory-dma.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-L1cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-L2cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-dir.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_CMP_token-dma.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_hammer-cache.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_hammer-dir.sm b9ba22cb23f2 
  src/mem/protocol/MOESI_hammer-dma.sm b9ba22cb23f2 
  src/mem/protocol/Network_test-cache.sm b9ba22cb23f2 
  src/mem/protocol/Network_test-dir.sm b9ba22cb23f2 
  src/mem/protocol/RubySlicc_Types.sm b9ba22cb23f2 
  src/mem/ruby/slicc_interface/AbstractController.hh b9ba22cb23f2 
  src/mem/slicc/ast/MethodCallExprAST.py b9ba22cb23f2 
  src/mem/slicc/symbols/StateMachine.py b9ba22cb23f2 

Diff: http://reviews.m5sim.org/r/684/diff


Testing
---


Thanks,

Nilay

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Re: [gem5-dev] [m5-dev] Review Request: stats: move code that loops over all stats into python

2011-06-06 Thread nathan binkert 
> Where in the code is the signal from "kill -USR1" handled to dump stats?

% grep -nR USR1 src
src/sim/init.cc:97:signal(SIGUSR1, dumpStatsHandler);
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Re: [gem5-dev] [m5-dev] Review Request: stats: move code that loops over all stats into python

2011-06-06 Thread Jack Harvard 

On 12 May 2011, at 04:24, Nathan Binkert wrote:

> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/690/#review1226
> ---
> 
> 
> I guess I should have said something, but there are several more diffs to 
> come down the road.  I just wanted to get some out of the way now.  By the 
> end, there will be no output code in C++ at all.
> 
> 
> src/python/m5/stats/__init__.py
> 
> 
>  If you have a periodic dumping of stats because of an event and you get a 
> dumpstats from an m5op or from kill -USR1, you don't want to dump twice in 
> the same cycle because stuff just doesn't work well.
> 

Where in the code is the signal from "kill -USR1" handled to dump stats?

> - Nathan
> 
> 
> On 2011-05-10 06:08:36, Nathan Binkert wrote:
>> 
>> ---
>> This is an automatically generated e-mail. To reply, visit:
>> http://reviews.m5sim.org/r/690/
>> ---
>> 
>> (Updated 2011-05-10 06:08:36)
>> 
>> 
>> Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
>> Nathan Binkert.
>> 
>> 
>> Summary
>> ---
>> 
>> stats: move code that loops over all stats into python
>> 
>> 
>> Diffs
>> -
>> 
>> src/base/SConscript 44f8c2507d85 
>> src/base/statistics.hh 44f8c2507d85 
>> src/base/statistics.cc 44f8c2507d85 
>> src/base/stats/info.hh 44f8c2507d85 
>> src/base/stats/mysql.hh 44f8c2507d85 
>> src/base/stats/mysql.cc 44f8c2507d85 
>> src/base/stats/output.hh 44f8c2507d85 
>> src/base/stats/output.cc 44f8c2507d85 
>> src/base/stats/text.hh 44f8c2507d85 
>> src/base/stats/text.cc 44f8c2507d85 
>> src/base/stats/visit.hh 44f8c2507d85 
>> src/base/stats/visit.cc 44f8c2507d85 
>> src/python/m5/simulate.py 44f8c2507d85 
>> src/python/m5/stats/__init__.py PRE-CREATION 
>> src/python/swig/stats.i 44f8c2507d85 
>> 
>> Diff: http://reviews.m5sim.org/r/690/diff
>> 
>> 
>> Testing
>> ---
>> 
>> quick regressions pass (though most recently run with review 689 and 691)
>> 
>> 
>> Thanks,
>> 
>> Nathan
>> 
>> 
> 
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[gem5-dev] Cron /z/m5/regression/do-regression quick

2011-06-06 Thread Cron Daemon 
scons: `build/ALPHA_SE_MOESI_hammer/m5.debug' is up to date.
scons: `build/ALPHA_SE_MESI_CMP_directory/m5.debug' is up to date.
scons: `build/ALPHA_SE_MOESI_CMP_directory/m5.debug' is up to date.
scons: `build/ALPHA_SE_MOESI_CMP_token/m5.debug' is up to date.
scons: `build/ALPHA_FS/m5.debug' is up to date.
scons: `build/MIPS_SE/m5.debug' is up to date.
scons: `build/POWER_SE/m5.debug' is up to date.
scons: `build/SPARC_SE/m5.debug' is up to date.
scons: `build/SPARC_FS/m5.debug' is up to date.
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scons: `build/ARM_SE/m5.debug' is up to date.
scons: `build/ARM_FS/m5.debug' is up to date.
scons: `build/ALPHA_SE_MOESI_hammer/m5.fast' is up to date.
scons: `build/ALPHA_SE_MESI_CMP_directory/m5.fast' is up to date.
scons: `build/ALPHA_SE_MOESI_CMP_directory/m5.fast' is up to date.
scons: `build/ALPHA_SE_MOESI_CMP_token/m5.fast' is up to date.
scons: `build/ALPHA_FS/m5.fast' is up to date.
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