Re: [gem5-dev] Review Request: ISA parser: Simplify operand type handling.

2011-06-12 Thread Gabe Black
On 06/04/11 09:32, Steve Reinhardt wrote:
 On Sat, Jun 4, 2011 at 1:57 AM, Gabe Black gbl...@eecs.umich.edu wrote:
 To clarify, is this signed/unsigned issue something we need to deal with
 before this patch goes in, or can it be dealt with separately later?
 I'd like to see it handled before the patch is committed, mostly
 because I'm still not 100% convinced that these changes don't break
 something.  Also when something gets deferred like this there's always
 the uncertainty of when/if it's going to get taken care of... nothing
 personal, I'd feel the same way if it was my own patch.

 Steve
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I was thinking about this today, and if we expand the read/write
functions to handle signed types too, we're really just expanding the
arbitrary set of types they can handle, not removing the limitation that
you have to stay within those types which is what I think you don't like.

Instead of extending what we already have as far as explicit
instantiation, it would be nice to have a more automatic mechanism where
we'd just feed a list of types and a template (you can pass templates as
template arguments, sort of like function pointers but for templates)
and have some widget that cranks out the actual instantiation without so
much copy and paste coding. Some Googling indicates that Boost already
does this with some macros it has for working with sequences. I'm
looking into that more, and I'm thinking it would be best to figure out
how they did it and then make our own, rather than introduce a great big
new dependency.

Combining that with the first point, I think a nice solution would be to
have the ISA parser spit out a list of types that read/write need to
support in whatever form is necessary (preliminary reading suggests a
#define) and then have the CPU models all feed that into the
instantiator widget to get the versions they need. Then we'd get exactly
the functions we need and cut out a bunch of repetition in the source.
This would be at the reasonable cost (in my opinion) of some additional
complexity, although in some ways it would trade one type of complexity
for another.


Also, while looking for information about Boost (in progress right now)
I found their page where they talk about their license (link below).
Looking through it, there are some ideas there which seem relevant to
gem5. Specifically, I like the idea of a single license for everything,
perhaps involving assigning copyright to a neutral body like a gem5
foundation or something, and then just referring to it in the actual
source files. That would get rid of lots of redundant text, and they
make a good point that all that text is the sort of thing lawyers might
get their underwear in a bunch over. There may be (but isn't
necessarily) subtle variation on a file by file basis, and it's probably
a lot more work to go through if somebody ever needed to do that.

http://www.boost.org/users/license.html

Gabe
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Re: [gem5-dev] Review Request: LibElf: Build the error management code in libelf.

2011-06-12 Thread Gabe Black
Ping

On 06/04/11 11:39, Gabe Black wrote:
 ---
 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/735/
 ---

 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.


 Summary
 ---

 LibElf: Build the error management code in libelf.

 This change makes some minor changes to get the error management code in
 libelf to build on Linux and to built it into the library.


 Diffs
 -

   ext/libelf/SConscript b9ba22cb23f2 
   ext/libelf/_libelf.h b9ba22cb23f2 
   ext/libelf/elf_errmsg.c b9ba22cb23f2 

 Diff: http://reviews.m5sim.org/r/735/diff


 Testing
 ---


 Thanks,

 Gabe

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Re: [gem5-dev] Review Request: Loader: Handle bad section names when loading an ELF file.

2011-06-12 Thread Gabe Black
Ping

On 06/04/11 11:42, Gabe Black wrote:
 ---
 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/736/
 ---

 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.


 Summary
 ---

 Loader: Handle bad section names when loading an ELF file.

 If there's a problem when reading the section names from a supposed ELF file,
 this change makes gem5 print an error message as returned by libelf and die.
 Previously these sorts of errors would make gem5 segfault when it tried to
 access the section name through a NULL pointer.


 Diffs
 -

   src/base/loader/elf_object.cc b9ba22cb23f2 

 Diff: http://reviews.m5sim.org/r/736/diff


 Testing
 ---


 Thanks,

 Gabe

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Re: [gem5-dev] Review Request: [mq]: FunctionalAccess.9.patch

2011-06-12 Thread Nilay Vaish

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/611/
---

(Updated 2011-06-12 14:55:00.907885)


Review request for Default.


Summary (updated)
---

[mq]: FunctionalAccess.9.patch


Diffs (updated)
-

  configs/example/ruby_direct_test.py ac4da9f8ea80 
  configs/example/ruby_fs.py ac4da9f8ea80 
  configs/example/ruby_mem_test.py ac4da9f8ea80 
  configs/example/ruby_network_test.py ac4da9f8ea80 
  configs/example/ruby_random_test.py ac4da9f8ea80 
  configs/ruby/MESI_CMP_directory.py ac4da9f8ea80 
  configs/ruby/MI_example.py ac4da9f8ea80 
  configs/ruby/MOESI_CMP_directory.py ac4da9f8ea80 
  configs/ruby/MOESI_CMP_token.py ac4da9f8ea80 
  configs/ruby/MOESI_hammer.py ac4da9f8ea80 
  configs/ruby/Ruby.py ac4da9f8ea80 
  src/cpu/testers/memtest/memtest.hh ac4da9f8ea80 
  src/cpu/testers/memtest/memtest.cc ac4da9f8ea80 
  src/mem/packet.hh ac4da9f8ea80 
  src/mem/packet.cc ac4da9f8ea80 
  src/mem/protocol/MOESI_CMP_directory-L1cache.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_CMP_directory-L2cache.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_CMP_directory-dir.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_hammer-cache.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_hammer-dir.sm ac4da9f8ea80 
  src/mem/ruby/network/Network.cc ac4da9f8ea80 
  src/mem/ruby/network/Network.py ac4da9f8ea80 
  src/mem/ruby/profiler/Profiler.cc ac4da9f8ea80 
  src/mem/ruby/profiler/Profiler.py ac4da9f8ea80 
  src/mem/ruby/recorder/Tracer.cc ac4da9f8ea80 
  src/mem/ruby/recorder/Tracer.py ac4da9f8ea80 
  src/mem/ruby/slicc_interface/AbstractController.hh ac4da9f8ea80 
  src/mem/ruby/slicc_interface/AbstractController.cc PRE-CREATION 
  src/mem/ruby/slicc_interface/Controller.py ac4da9f8ea80 
  src/mem/ruby/slicc_interface/SConscript ac4da9f8ea80 
  src/mem/ruby/system/AbstractMemory.hh PRE-CREATION 
  src/mem/ruby/system/AbstractMemory.cc PRE-CREATION 
  src/mem/ruby/system/AbstractMemory.py PRE-CREATION 
  src/mem/ruby/system/Cache.py ac4da9f8ea80 
  src/mem/ruby/system/CacheMemory.hh ac4da9f8ea80 
  src/mem/ruby/system/CacheMemory.cc ac4da9f8ea80 
  src/mem/ruby/system/DirectoryMemory.hh ac4da9f8ea80 
  src/mem/ruby/system/DirectoryMemory.cc ac4da9f8ea80 
  src/mem/ruby/system/DirectoryMemory.py ac4da9f8ea80 
  src/mem/ruby/system/RubyPort.hh ac4da9f8ea80 
  src/mem/ruby/system/RubyPort.cc ac4da9f8ea80 
  src/mem/ruby/system/RubySystem.py ac4da9f8ea80 
  src/mem/ruby/system/SConscript ac4da9f8ea80 
  src/mem/ruby/system/Sequencer.py ac4da9f8ea80 
  src/mem/ruby/system/System.hh ac4da9f8ea80 
  src/mem/ruby/system/System.cc ac4da9f8ea80 
  src/mem/slicc/ast/MemberExprAST.py ac4da9f8ea80 

Diff: http://reviews.m5sim.org/r/611/diff


Testing
---


Thanks,

Nilay

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Re: [gem5-dev] Review Request: Ruby: Add support for functional accesses

2011-06-12 Thread Nilay Vaish

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/611/
---

(Updated 2011-06-12 14:55:53.667339)


Review request for Default.


Summary (updated)
---

Ruby: Add support for functional accesses
This patch is meant for implementing functional access support in Ruby.
Currently only the M5Port of RubyPort supports functional accesses. The
support for functional through the PioPort will be added as a separate
patch. The patch has been tested for MI, MOESI directory, MOESI hammer
and MESI directory protocols. It seems that MOESI token protocol cannot
support functional accesses with it current implementation, there seems
to be some problem with the L2 cache controller.


Diffs (updated)
-

  configs/example/ruby_direct_test.py ac4da9f8ea80 
  configs/example/ruby_fs.py ac4da9f8ea80 
  configs/example/ruby_mem_test.py ac4da9f8ea80 
  configs/example/ruby_network_test.py ac4da9f8ea80 
  configs/example/ruby_random_test.py ac4da9f8ea80 
  configs/ruby/MESI_CMP_directory.py ac4da9f8ea80 
  configs/ruby/MI_example.py ac4da9f8ea80 
  configs/ruby/MOESI_CMP_directory.py ac4da9f8ea80 
  configs/ruby/MOESI_CMP_token.py ac4da9f8ea80 
  configs/ruby/MOESI_hammer.py ac4da9f8ea80 
  configs/ruby/Ruby.py ac4da9f8ea80 
  src/cpu/testers/memtest/memtest.hh ac4da9f8ea80 
  src/cpu/testers/memtest/memtest.cc ac4da9f8ea80 
  src/mem/packet.hh ac4da9f8ea80 
  src/mem/packet.cc ac4da9f8ea80 
  src/mem/protocol/MOESI_CMP_directory-L1cache.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_CMP_directory-L2cache.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_CMP_directory-dir.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_hammer-cache.sm ac4da9f8ea80 
  src/mem/protocol/MOESI_hammer-dir.sm ac4da9f8ea80 
  src/mem/ruby/network/Network.cc ac4da9f8ea80 
  src/mem/ruby/network/Network.py ac4da9f8ea80 
  src/mem/ruby/profiler/Profiler.cc ac4da9f8ea80 
  src/mem/ruby/profiler/Profiler.py ac4da9f8ea80 
  src/mem/ruby/recorder/Tracer.cc ac4da9f8ea80 
  src/mem/ruby/recorder/Tracer.py ac4da9f8ea80 
  src/mem/ruby/slicc_interface/AbstractController.hh ac4da9f8ea80 
  src/mem/ruby/slicc_interface/AbstractController.cc PRE-CREATION 
  src/mem/ruby/slicc_interface/Controller.py ac4da9f8ea80 
  src/mem/ruby/slicc_interface/SConscript ac4da9f8ea80 
  src/mem/ruby/system/AbstractMemory.hh PRE-CREATION 
  src/mem/ruby/system/AbstractMemory.cc PRE-CREATION 
  src/mem/ruby/system/AbstractMemory.py PRE-CREATION 
  src/mem/ruby/system/Cache.py ac4da9f8ea80 
  src/mem/ruby/system/CacheMemory.hh ac4da9f8ea80 
  src/mem/ruby/system/CacheMemory.cc ac4da9f8ea80 
  src/mem/ruby/system/DirectoryMemory.hh ac4da9f8ea80 
  src/mem/ruby/system/DirectoryMemory.cc ac4da9f8ea80 
  src/mem/ruby/system/DirectoryMemory.py ac4da9f8ea80 
  src/mem/ruby/system/RubyPort.hh ac4da9f8ea80 
  src/mem/ruby/system/RubyPort.cc ac4da9f8ea80 
  src/mem/ruby/system/RubySystem.py ac4da9f8ea80 
  src/mem/ruby/system/SConscript ac4da9f8ea80 
  src/mem/ruby/system/Sequencer.py ac4da9f8ea80 
  src/mem/ruby/system/System.hh ac4da9f8ea80 
  src/mem/ruby/system/System.cc ac4da9f8ea80 
  src/mem/slicc/ast/MemberExprAST.py ac4da9f8ea80 

Diff: http://reviews.m5sim.org/r/611/diff


Testing
---


Thanks,

Nilay

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[gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression --scratch all

2011-06-12 Thread Cron Daemon
* build/SPARC_SE/tests/opt/long/70.twolf/sparc/linux/simple-atomic FAILED!
* build/SPARC_SE/tests/opt/long/50.vortex/sparc/linux/simple-timing FAILED!
* build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing FAILED!
* build/SPARC_SE/tests/opt/long/70.twolf/sparc/linux/simple-timing FAILED!
* build/SPARC_SE/tests/opt/long/50.vortex/sparc/linux/simple-atomic FAILED!
* build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-atomic FAILED!
* build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic FAILED!
* build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-timing FAILED!
* 
build/SPARC_FS/tests/opt/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic 
FAILED!
* build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing FAILED!
scons: *** Found dependency cycle(s):
* build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-atomic-mp 
passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/o3-timing passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing passed.
* build/ALPHA_SE/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby 
passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-atomic passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby 
passed.
* build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-atomic 
passed.
* build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby passed.
* build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-timing 
passed.
* build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-timing-mp 
passed.
* build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing 
passed.
* build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/inorder-timing passed.
* build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/inorder-timing passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby 
passed.
* build/ALPHA_SE/tests/opt/long/40.perlbmk/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/inorder-timing passed.
* build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/opt/long/40.perlbmk/alpha/tru64/simple-timing passed.
* 
build/ALPHA_SE_MOESI_hammer/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
 passed.
* 
build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
 passed.
* build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-timing passed.
* 
build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
 passed.
* 
build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
 passed.
* 
build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
 passed.
* 
build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory
 passed.
* 
build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory
 passed.
* 
build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
 passed.
* 
build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory
 passed.
* 
build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory
 passed.
* build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/inorder-timing passed.
* 

Re: [gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression --scratch all

2011-06-12 Thread Korey Sewell
Looks like I still got some work to do w/the SPARC regressions. I definitely
didnt think adding a few control flags would cause pain, but I must've
unknowingly hit some other spot in the code since control flags should have
nothing to do with how the simple cpus operate.

On Sun, Jun 12, 2011 at 6:18 PM, Cron Daemon r...@zizzer.eecs.umich.eduwrote:

 * build/SPARC_SE/tests/opt/long/70.twolf/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/50.vortex/sparc/linux/simple-timing
 FAILED!
 * build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing
 FAILED!
 * build/SPARC_SE/tests/opt/long/70.twolf/sparc/linux/simple-timing
 FAILED!
 * build/SPARC_SE/tests/opt/long/50.vortex/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-timing
 FAILED!
 *
 build/SPARC_FS/tests/opt/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing FAILED!
 scons: *** Found dependency cycle(s):
 * build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-atomic-mp
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/o3-timing passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-atomic
 passed.
 *
 build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby
 passed.
 * build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby
 passed.
 * build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-timing-mp
 passed.
 * build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/inorder-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/inorder-timing
 passed.
 *
 build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby
 passed.
 * build/ALPHA_SE/tests/opt/long/40.perlbmk/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/inorder-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/40.perlbmk/alpha/tru64/simple-timing
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
 passed.
 * build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-timing
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
 passed.
 *
 build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
 passed.
 *
 build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory
 passed.
 *
 build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory
 passed.
 *
 build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
 

Re: [gem5-dev] Review Request: Loader: Handle bad section names when loading an ELF file.

2011-06-12 Thread Steve Reinhardt

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/736/#review1325
---

Ship it!


- Steve


On 2011-06-04 11:42:05, Gabe Black wrote:
 
 ---
 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/736/
 ---
 
 (Updated 2011-06-04 11:42:05)
 
 
 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.
 
 
 Summary
 ---
 
 Loader: Handle bad section names when loading an ELF file.
 
 If there's a problem when reading the section names from a supposed ELF file,
 this change makes gem5 print an error message as returned by libelf and die.
 Previously these sorts of errors would make gem5 segfault when it tried to
 access the section name through a NULL pointer.
 
 
 Diffs
 -
 
   src/base/loader/elf_object.cc b9ba22cb23f2 
 
 Diff: http://reviews.m5sim.org/r/736/diff
 
 
 Testing
 ---
 
 
 Thanks,
 
 Gabe
 


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Re: [gem5-dev] Review Request: LibElf: Build the error management code in libelf.

2011-06-12 Thread Steve Reinhardt

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/735/#review1326
---

Ship it!


- Steve


On 2011-06-04 11:39:02, Gabe Black wrote:
 
 ---
 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/735/
 ---
 
 (Updated 2011-06-04 11:39:02)
 
 
 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.
 
 
 Summary
 ---
 
 LibElf: Build the error management code in libelf.
 
 This change makes some minor changes to get the error management code in
 libelf to build on Linux and to built it into the library.
 
 
 Diffs
 -
 
   ext/libelf/SConscript b9ba22cb23f2 
   ext/libelf/_libelf.h b9ba22cb23f2 
   ext/libelf/elf_errmsg.c b9ba22cb23f2 
 
 Diff: http://reviews.m5sim.org/r/735/diff
 
 
 Testing
 ---
 
 
 Thanks,
 
 Gabe
 


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Re: [gem5-dev] Review Request: inorder/dtb: make sure DTB translate correct address

2011-06-12 Thread Korey Sewell


 On 2011-06-11 09:56:39, Steve Reinhardt wrote:
  Shouldn't you get rid of the cache_unit.cc changes now?  I thought that was 
  the point.
  
  This is still a hack, in my opinion; note that the comment on the _pc field 
  in mem/request.hh says for tracing/debugging, i.e., it's not intended to 
  be architectural.  Also, it isn't always set (e.g., for device accesses), 
  though for CPU accesses it should be.  So I'd say (1) it should work and 
  (2) it's a much less ugly hack than what you had before, so assuming you do 
  get rid of the cache_unit.cc changes I'd say it's fine.
  
  I still think having a ProxyThreadContext wrapped around a DynInst is the 
  right way to do it, but I can see where that also looks like a lot of 
  mostly unnecessary overhead.

The hacky cache_unit.cc code will definitely be cleaned up in the final change. 

I was thinking that although the ProxyThreadContextDynInst seems like the 
right way to do this for DTB accesses, I think it may not work well for ITB 
accesses as it could be possible that the DynInst has not even been created 
yet. Typically, one might fetch the cache block and then create the DynInst 
(done in simple and o3) rather than vice versa (done in inorder).

I'm thinking the right thing to do is to make the _pc field in Request more 
than a debugging feature, and then add a isSet flag there along with an  
assertion in getPC() to make sure that any reader of the PC will not get a 
uninitialized value. That way, you have one generalized way to access the TLB 
whether it be ITB or DTB access.


- Korey


---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/743/#review1323
---


On 2011-06-10 22:52:04, Korey Sewell wrote:
 
 ---
 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/743/
 ---
 
 (Updated 2011-06-10 22:52:04)
 
 
 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.
 
 
 Summary
 ---
 
 inorder/dtb: make sure DTB translate correct address
 The DTB expects the correct PC in the ThreadContext
 but how if the memory accesses are speculative? Shouldn't
 we send along the requestor's PC to the translate functions?
 
 
 Diffs
 -
 
   src/arch/alpha/tlb.cc 77d12d8f7971 
   src/cpu/inorder/resources/cache_unit.cc 77d12d8f7971 
 
 Diff: http://reviews.m5sim.org/r/743/diff
 
 
 Testing
 ---
 
 
 Thanks,
 
 Korey
 


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Re: [gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression --scratch all

2011-06-12 Thread Korey Sewell
ok, looks like these sparc runs are just regression updates that I didnt do
for the long runs (phew!).

I'll update them shortly.

On Sun, Jun 12, 2011 at 6:19 PM, Korey Sewell ksew...@umich.edu wrote:

 Looks like I still got some work to do w/the SPARC regressions. I
 definitely didnt think adding a few control flags would cause pain, but I
 must've unknowingly hit some other spot in the code since control flags
 should have nothing to do with how the simple cpus operate.


 On Sun, Jun 12, 2011 at 6:18 PM, Cron Daemon 
 r...@zizzer.eecs.umich.eduwrote:

 * build/SPARC_SE/tests/opt/long/70.twolf/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/50.vortex/sparc/linux/simple-timing
 FAILED!
 * build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing
 FAILED!
 * build/SPARC_SE/tests/opt/long/70.twolf/sparc/linux/simple-timing
 FAILED!
 * build/SPARC_SE/tests/opt/long/50.vortex/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-timing
 FAILED!
 *
 build/SPARC_FS/tests/opt/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic
 FAILED!
 * build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing FAILED!
 scons: *** Found dependency cycle(s):
 * build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-atomic-mp
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/o3-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-atomic
 passed.
 *
 build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby
 passed.
 * build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby
 passed.
 * build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-timing-mp
 passed.
 * build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/inorder-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/inorder-timing
 passed.
 *
 build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby
 passed.
 * build/ALPHA_SE/tests/opt/long/40.perlbmk/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/inorder-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/simple-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-atomic
 passed.
 * build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/o3-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/30.eon/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/o3-timing
 passed.
 * build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing passed.
 * build/ALPHA_SE/tests/opt/long/40.perlbmk/alpha/tru64/simple-timing
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
 passed.
 * build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-timing
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
 passed.
 *
 build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
 passed.
 *
 build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
 passed.
 *
 build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory
 passed.
 *
 

Re: [gem5-dev] Review Request: ISA parser: Simplify operand type handling.

2011-06-12 Thread Steve Reinhardt
On Sun, Jun 12, 2011 at 1:05 AM, Gabe Black gbl...@eecs.umich.edu wrote:

 I was thinking about this today, and if we expand the read/write
 functions to handle signed types too, we're really just expanding the
 arbitrary set of types they can handle, not removing the limitation that
 you have to stay within those types which is what I think you don't like.

I think originally we supported memory accesses for any operand type
you could define, but that stopped being true once you made the
definitions extensible.  My immediate concern is just to make sure
that switching from the old explicit sign extensions to some implicit
sign extensions that happened as a side effect of C type conversions
is really doing the right thing, but having a cleaner way of doing
memory accesses of arbitrary types is a good idea.

 Instead of extending what we already have as far as explicit
 instantiation, it would be nice to have a more automatic mechanism where
 we'd just feed a list of types and a template (you can pass templates as
 template arguments, sort of like function pointers but for templates)
 and have some widget that cranks out the actual instantiation without so
 much copy and paste coding.

That sounds interesting, but seems like overkill... I just looked at
the SimpleCPU code, and as far as I can tell, the memory access type
(the arg type for read() and write()) is only used for two things: to
determine the size of the access, and to control the data type in the
InstRecord type for exec tracing (basically this is mostly setting the
data_status enum, but also using the proper double vs int field in the
data union).  The actual type clearly doesn't matter at all for the
first, and only a subset of types are supported for the second.

The original idea with the templates was that they might permit faster
implementations for functional CPU models that communicated directly
with memory.  However, if anything we've gone in the other direction
by implementing these templates in terms of readBytes() and
writeBytes().

So my general feeling is that if we want to make significant changes
to this interface, I'd be more inclined to streamline it and have the
generated ISA code call readBytes() and writeBytes() directly with a
size and some additional info to make exec tracing work (which should
get rid of the templates entirely, I think) rather than expanding the
template interface.  Then the burden of converting from an untyped
sequence of bytes to whatever the ISA wants could be done entirely in
the ISA definition, which seems like a good place for it.  Does that
make sense?  Do you think it's feasible or worthwhile?

 Also, while looking for information about Boost (in progress right now)
 I found their page where they talk about their license (link below).
 Looking through it, there are some ideas there which seem relevant to
 gem5. Specifically, I like the idea of a single license for everything,
 perhaps involving assigning copyright to a neutral body like a gem5
 foundation or something, and then just referring to it in the actual
 source files. That would get rid of lots of redundant text, and they
 make a good point that all that text is the sort of thing lawyers might
 get their underwear in a bunch over. There may be (but isn't
 necessarily) subtle variation on a file by file basis, and it's probably
 a lot more work to go through if somebody ever needed to do that.

We discussed this a long long time ago (when we first started
distributing the code, IIRC), and while it does have the advantages
you describe, the cost of further wrangling with lawyers is basically
not worth it IMO.  Maybe if we started a new project from scratch we
would consider it, but the horse has left the barn for gem5, I think.

Steve
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[gem5-dev] changeset in gem5: sparc: update long regressions

2011-06-12 Thread Korey Sewell
changeset 7a32aa3acd72 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7a32aa3acd72
description:
sparc: update long regressions

diffstat:

 tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini|   
 2 +-
 tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr|   
 1 -
 tests/long/00.gzip/ref/sparc/linux/o3-timing/simout|   
22 +-
 tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt |  
739 +
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini|   
 2 +-
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr|   
 1 -
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout|   
18 +-
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt |   
42 +-
 tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini|   
 2 +-
 tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr|   
 1 -
 tests/long/00.gzip/ref/sparc/linux/simple-timing/simout|   
18 +-
 tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt |  
414 ++--
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini |   
 2 +-
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/simerr |   
 1 -
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout |   
18 +-
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt  |   
42 +-
 tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini |   
 2 +-
 tests/long/10.mcf/ref/sparc/linux/simple-timing/simerr |   
 1 -
 tests/long/10.mcf/ref/sparc/linux/simple-timing/simout |   
18 +-
 tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt  |  
414 ++--
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini  |   
 2 +-
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/simerr  |  
562 ---
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/simout  |   
18 +-
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/stats.txt   |   
42 +-
 tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini  |   
 2 +-
 tests/long/50.vortex/ref/sparc/linux/simple-timing/simerr  |  
562 ---
 tests/long/50.vortex/ref/sparc/linux/simple-timing/simout  |   
18 +-
 tests/long/50.vortex/ref/sparc/linux/simple-timing/stats.txt   |  
414 ++--
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini   |   
 2 +-
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/simerr   |   
 1 -
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout   |   
22 +-
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt|   
42 +-
 tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini   |   
 2 +-
 tests/long/70.twolf/ref/sparc/linux/simple-timing/simerr   |   
 1 -
 tests/long/70.twolf/ref/sparc/linux/simple-timing/simout   |   
22 +-
 tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt|  
412 ++--
 tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr|   
 3 -
 tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout|   
21 +-
 tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt |   
52 +-
 39 files changed, 1404 insertions(+), 2556 deletions(-)

diffs (truncated from 5625 to 300 lines):

diff -r ac4da9f8ea80 -r 7a32aa3acd72 
tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini   Fri Jun 10 
22:15:34 2011 -0400
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini   Sun Jun 12 
21:35:03 2011 -0400
@@ -493,7 +493,7 @@
 [system.cpu.workload]
 type=LiveProcess
 cmd=gzip input.log 1
-cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing
+cwd=build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing
 egid=100
 env=
 errout=cerr
diff -r ac4da9f8ea80 -r 7a32aa3acd72 
tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr   Fri Jun 10 
22:15:34 2011 -0400
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr   Sun Jun 12 
21:35:03 2011 -0400
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
 hack: be nice to actually delete the event here
diff -r ac4da9f8ea80 -r 7a32aa3acd72 
tests/long/00.gzip/ref/sparc/linux/o3-timing/simout
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout   Fri Jun 10 
22:15:34 2011 -0400
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout   Sun Jun 12 
21:35:03 2011 -0400
@@ -1,16 +1,12 @@
-Redirecting stdout to