changeset 6f5299ff8260 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6f5299ff8260
description:
        MOESI_hammer: Added full-bit directory support

diffstat:

 configs/ruby/MOESI_hammer.py           |    7 +-
 src/mem/protocol/MOESI_hammer-cache.sm |   20 ++-
 src/mem/protocol/MOESI_hammer-dir.sm   |  262 +++++++++++++++++++++++++++-----
 src/mem/protocol/MOESI_hammer-msg.sm   |    4 +-
 src/mem/protocol/RubySlicc_Exports.sm  |    1 +
 src/mem/ruby/network/Network.cc        |    1 +
 6 files changed, 244 insertions(+), 51 deletions(-)

diffs (truncated from 741 to 300 lines):

diff -r 7fcfb515d7bf -r 6f5299ff8260 configs/ruby/MOESI_hammer.py
--- a/configs/ruby/MOESI_hammer.py      Sun Feb 06 22:14:18 2011 -0800
+++ b/configs/ruby/MOESI_hammer.py      Sun Feb 06 22:14:18 2011 -0800
@@ -55,7 +55,9 @@
           help="allow migratory sharing for atomic only accessed blocks")
     parser.add_option("--pf-on", action="store_true",
           help="Hammer: enable Probe Filter")
-    
+    parser.add_option("--dir-on", action="store_true",
+          help="Hammer: enable Full-bit Directory")
+
 def create_system(options, system, piobus, dma_devices):
     
     if buildEnv['PROTOCOL'] != 'MOESI_hammer':
@@ -165,7 +167,8 @@
                                                     options.map_levels),
                                          probeFilter = pf,
                                          memBuffer = mem_cntrl,
-                                         probe_filter_enabled = options.pf_on)
+                                         probe_filter_enabled = options.pf_on,
+                                         full_bit_dir_enabled = options.dir_on)
 
         if options.recycle_latency:
             dir_cntrl.recycle_latency = options.recycle_latency
diff -r 7fcfb515d7bf -r 6f5299ff8260 src/mem/protocol/MOESI_hammer-cache.sm
--- a/src/mem/protocol/MOESI_hammer-cache.sm    Sun Feb 06 22:14:18 2011 -0800
+++ b/src/mem/protocol/MOESI_hammer-cache.sm    Sun Feb 06 22:14:18 2011 -0800
@@ -137,6 +137,7 @@
     bool Dirty,              desc="Is the data dirty (different than memory)?";
     int NumPendingMsgs,      desc="Number of acks/data messages that this 
processor is waiting for";
     bool Sharers,            desc="On a GetS, did we find any other sharers in 
the system";
+    bool AppliedSilentAcks, default="false", desc="for full-bit dir, does the 
pending msg count reflect the silent acks";
     MachineID LastResponder, desc="last machine to send a response for this 
request";
     MachineID CurOwner,      desc="current owner of the block, used for 
UnblockS responses";
     Time InitialRequestTime, default="0", desc="time the initial requests was 
sent from the L1Cache";
@@ -526,6 +527,7 @@
         } else {
           out_msg.Acks := 2;
         }
+        out_msg.SilentAcks := in_msg.SilentAcks;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
         out_msg.ForwardRequestTime := in_msg.ForwardRequestTime;
@@ -558,6 +560,7 @@
         } else {
           out_msg.Acks := 2;
         }
+        out_msg.SilentAcks := in_msg.SilentAcks;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
         out_msg.ForwardRequestTime := in_msg.ForwardRequestTime;
@@ -581,6 +584,7 @@
         } else {
           out_msg.Acks := 2;
         }
+        out_msg.SilentAcks := in_msg.SilentAcks;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
         out_msg.ForwardRequestTime := in_msg.ForwardRequestTime;
@@ -600,6 +604,7 @@
         out_msg.Dirty := cache_entry.Dirty;
         DPRINTF(RubySlicc, "%s\n", out_msg.DataBlk);
         out_msg.Acks := machineCount(MachineType:L1Cache);
+        out_msg.SilentAcks := in_msg.SilentAcks;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
         out_msg.ForwardRequestTime := in_msg.ForwardRequestTime;
@@ -615,6 +620,7 @@
         out_msg.Sender := machineID;
         out_msg.Destination.add(in_msg.Requestor);
         out_msg.Acks := 1;
+        out_msg.SilentAcks := in_msg.SilentAcks;
         assert(in_msg.DirectedProbe == false);
         out_msg.MessageSize := MessageSizeType:Response_Control;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
@@ -631,6 +637,7 @@
         out_msg.Sender := machineID;
         out_msg.Destination.add(in_msg.Requestor);
         out_msg.Acks := 1;
+        out_msg.SilentAcks := in_msg.SilentAcks;
         assert(in_msg.DirectedProbe == false);
         out_msg.MessageSize := MessageSizeType:Response_Control;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
@@ -779,9 +786,17 @@
     peek(responseToCache_in, ResponseMsg) {
       assert(in_msg.Acks > 0);
       assert(is_valid(tbe));
+      DPRINTF(RubySlicc, "Sender = %s\n", in_msg.Sender);
+      DPRINTF(RubySlicc, "SilentAcks = %d\n", in_msg.SilentAcks);
+      if (tbe.AppliedSilentAcks == false) {
+        tbe.NumPendingMsgs := tbe.NumPendingMsgs - in_msg.SilentAcks;
+        tbe.AppliedSilentAcks := true;
+      }
       DPRINTF(RubySlicc, "%d\n", tbe.NumPendingMsgs);
       tbe.NumPendingMsgs := tbe.NumPendingMsgs - in_msg.Acks;
       DPRINTF(RubySlicc, "%d\n", tbe.NumPendingMsgs);
+      APPEND_TRANSITION_COMMENT(tbe.NumPendingMsgs);
+      APPEND_TRANSITION_COMMENT(in_msg.Sender);
       tbe.LastResponder := in_msg.Sender;
       if (tbe.InitialRequestTime != zero_time() && in_msg.InitialRequestTime 
!= zero_time()) {
         assert(tbe.InitialRequestTime == in_msg.InitialRequestTime);
@@ -844,6 +859,7 @@
 
   action(q_sendDataFromTBEToCache, "q", desc="Send data from TBE to cache") {
     peek(forwardToCache_in, RequestMsg) {
+        assert(in_msg.Requestor != machineID);
       enqueue(responseNetwork_out, ResponseMsg, 
latency=cache_response_latency) {
         assert(is_valid(tbe));
         out_msg.Address := address;
@@ -858,6 +874,7 @@
         } else {
           out_msg.Acks := 2;
         }
+        out_msg.SilentAcks := in_msg.SilentAcks;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
         out_msg.ForwardRequestTime := in_msg.ForwardRequestTime;
@@ -877,6 +894,7 @@
         out_msg.DataBlk := tbe.DataBlk;
         out_msg.Dirty := tbe.Dirty;
         out_msg.Acks := machineCount(MachineType:L1Cache);
+        out_msg.SilentAcks := in_msg.SilentAcks;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.InitialRequestTime := in_msg.InitialRequestTime;
         out_msg.ForwardRequestTime := in_msg.ForwardRequestTime;
@@ -1387,7 +1405,7 @@
     n_popResponseQueue;
   }
 
-  transition(SM, Data, ISM) {
+  transition(SM, {Data, Exclusive_Data}, ISM) {
     v_writeDataToCacheVerify;
     m_decrementNumberOfMessages; 
     o_checkForCompletion;
diff -r 7fcfb515d7bf -r 6f5299ff8260 src/mem/protocol/MOESI_hammer-dir.sm
--- a/src/mem/protocol/MOESI_hammer-dir.sm      Sun Feb 06 22:14:18 2011 -0800
+++ b/src/mem/protocol/MOESI_hammer-dir.sm      Sun Feb 06 22:14:18 2011 -0800
@@ -38,7 +38,8 @@
   CacheMemory * probeFilter,
   MemoryControl * memBuffer,
   int memory_controller_latency = 2,
-  bool probe_filter_enabled = false
+  bool probe_filter_enabled = false,
+  bool full_bit_dir_enabled = false
 {
 
   MessageBuffer forwardFromDir, network="To", virtual_network="3", 
ordered="false";
@@ -140,6 +141,7 @@
     State PfState,                 desc="Directory state";
     MachineID Owner,               desc="Owner node";
     DataBlock DataBlk,             desc="data for the block";
+    Set Sharers,                   desc="sharing vector for full bit 
directory";
   }
 
   // TBE entries for DMA requests
@@ -148,6 +150,7 @@
     State TBEState,        desc="Transient State";
     CoherenceResponseType ResponseType, desc="The type for the subsequent 
response message";
     int Acks, default="0", desc="The number of acks that the waiting response 
represents";
+    int SilentAcks, default="0", desc="The number of silent acks associated 
with this transaction";
     DataBlock DmaDataBlk,  desc="DMA Data to be written.  Partial blocks need 
to merged with system memory";
     DataBlock DataBlk,     desc="The current view of system memory";
     int Len,               desc="...";
@@ -173,6 +176,8 @@
 
   // ** OBJECTS **
 
+  Set fwd_set;
+
   TBETable TBEs, template_hack="<Directory_TBE>";
 
   Entry getDirectoryEntry(Address addr), return_by_ref="yes" {
@@ -191,7 +196,7 @@
     if (is_valid(tbe)) {
       return tbe.TBEState;
     } else {
-      if (probe_filter_enabled) {
+      if (probe_filter_enabled || full_bit_dir_enabled) {
         if (is_valid(pf_entry)) {
           assert(pf_entry.PfState == getDirectoryEntry(addr).DirectoryState);
         } else {
@@ -206,7 +211,7 @@
     if (is_valid(tbe)) {
       tbe.TBEState := state;
     }
-    if (probe_filter_enabled) {
+    if (probe_filter_enabled || full_bit_dir_enabled) {
       if (is_valid(pf_entry)) {
         pf_entry.PfState := state;
       }
@@ -349,7 +354,7 @@
         if (in_msg.Type == CoherenceRequestType:PUT) {
           trigger(Event:PUT, in_msg.Address, pf_entry, tbe);
         } else {
-          if (probe_filter_enabled) {
+          if (probe_filter_enabled || full_bit_dir_enabled) {
             if (is_valid(pf_entry)) {
               trigger(cache_request_to_event(in_msg.Type), in_msg.Address,
                       pf_entry, tbe);
@@ -392,26 +397,44 @@
   // Actions
   
   action(r_setMRU, "\rr", desc="manually set the MRU bit for pf entry" ) {
-    if (probe_filter_enabled) {
+    if (probe_filter_enabled || full_bit_dir_enabled) {
       assert(is_valid(cache_entry)); 
       probeFilter.setMRU(address);
     }
   }
 
   action(auno_assertUnblockerNotOwner, "auno", desc="assert unblocker not 
owner") {
-    if (probe_filter_enabled) {
+    if (probe_filter_enabled || full_bit_dir_enabled) {
       assert(is_valid(cache_entry)); 
       peek(unblockNetwork_in, ResponseMsg) {
         assert(cache_entry.Owner != in_msg.Sender);
+        if (full_bit_dir_enabled) {
+          
assert(cache_entry.Sharers.isElement(machineIDToNodeID(in_msg.Sender)) == 
false);
+        }
       }
     }
   }
 
   action(uo_updateOwnerIfPf, "uo", desc="update owner") {
-    if (probe_filter_enabled) {
+    if (probe_filter_enabled || full_bit_dir_enabled) {
       assert(is_valid(cache_entry)); 
       peek(unblockNetwork_in, ResponseMsg) {
         cache_entry.Owner := in_msg.Sender;
+        if (full_bit_dir_enabled) {
+          cache_entry.Sharers.clear();
+          cache_entry.Sharers.add(machineIDToNodeID(in_msg.Sender));
+          APPEND_TRANSITION_COMMENT(cache_entry.Sharers);
+          DPRINTF(RubySlicc, "Sharers = %d\n", cache_entry.Sharers);
+        }
+      }
+    }
+  }
+
+  action(us_updateSharerIfFBD, "us", desc="update sharer if full-bit 
directory") {
+   if (full_bit_dir_enabled) {
+      assert(probeFilter.isTagPresent(address));
+      peek(unblockNetwork_in, ResponseMsg) {
+        cache_entry.Sharers.add(machineIDToNodeID(in_msg.Sender));
       }
     }
   }
@@ -441,7 +464,7 @@
   }
 
   action(pfa_probeFilterAllocate, "pfa", desc="Allocate ProbeFilterEntry") {
-    if (probe_filter_enabled) {
+    if (probe_filter_enabled || full_bit_dir_enabled) {
       peek(requestQueue_in, RequestMsg) {
         set_cache_entry(probeFilter.allocate(address, new PfEntry));
         cache_entry.Owner := in_msg.Requestor;
@@ -450,14 +473,14 @@
   }
 
   action(pfd_probeFilterDeallocate, "pfd", desc="Deallocate ProbeFilterEntry") 
{
-    if (probe_filter_enabled) {
+    if (probe_filter_enabled || full_bit_dir_enabled) {
       probeFilter.deallocate(address);
       unset_cache_entry();
     }
   }
 
   action(ppfd_possibleProbeFilterDeallocate, "ppfd", desc="Deallocate 
ProbeFilterEntry") {
-    if (probe_filter_enabled && is_valid(cache_entry)) {
+    if ((probe_filter_enabled || full_bit_dir_enabled) && 
is_valid(cache_entry)) {
       probeFilter.deallocate(address);
       unset_cache_entry();
     }
@@ -495,7 +518,12 @@
 
   action(pa_setPendingMsgsToAll, "pa", desc="set pending msgs to all") {
     assert(is_valid(tbe));
-    tbe.NumPendingMsgs := machineCount(MachineType:L1Cache);
+    if (full_bit_dir_enabled) {
+      assert(is_valid(cache_entry));
+      tbe.NumPendingMsgs := cache_entry.Sharers.count();
+    } else {
+      tbe.NumPendingMsgs := machineCount(MachineType:L1Cache);
+    }
   }
 
   action(po_setPendingMsgsToOne, "po", desc="set pending msgs to one") {
@@ -510,13 +538,34 @@
 
   action(sa_setAcksToOne, "sa", desc="Forwarded request, set the ack amount to 
one") {
     assert(is_valid(tbe));
-    tbe.Acks := 1;
-  }   
+    peek(requestQueue_in, RequestMsg) {
+      if (full_bit_dir_enabled) {
+        assert(is_valid(cache_entry));
+        //
+        // If we are using the full-bit directory and no sharers exists beyond
+        // the requestor, then we must set the ack number to all, not one
+        //
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