[gem5-dev] Change in gem5/gem5[develop]: cpu: Get rid of the IsThreadSync StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33737 ) Change subject: cpu: Get rid of the IsThreadSync StaticInst flag. .. cpu: Get rid of the IsThreadSync StaticInst flag. This

[gem5-dev] Change in gem5/gem5[develop]: mips,cpu: Get rid of the IsCondDelaySlot StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33736 ) Change subject: mips,cpu: Get rid of the IsCondDelaySlot StaticInst flag. .. mips,cpu: Get rid of the IsCondDelaySlot

[gem5-dev] Change in gem5/gem5[develop]: mips,cpu: Get rid of the IsERET StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33738 ) Change subject: mips,cpu: Get rid of the IsERET StaticInst flag. .. mips,cpu: Get rid of the IsERET StaticInst flag. This

[gem5-dev] Change in gem5/gem5[develop]: systemc: avoid dynamic_cast in the critical path

2020-09-15 Thread Earl Ou (Gerrit) via gem5-dev
Earl Ou has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34355 ) Change subject: systemc: avoid dynamic_cast in the critical path .. systemc: avoid dynamic_cast in the critical path NodeList

[gem5-dev] Re: MessageBuffer double counting delay between arrival and dequeue ticks?

2020-09-15 Thread Srikant Bharadwaj via gem5-dev
Hi Ryan, You are right. If the message goes to the next message buffer, delay is added again. However, as far as I know we are not using the delayed ticks for calculating anything anymore. The earlier use case was to calculate the stall time within MessageBuffer, but we use the getTime to do that

[gem5-dev] Change in gem5/gem5[develop]: mips,cpu: Get rid of the IsIprAccess StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33739 ) Change subject: mips,cpu: Get rid of the IsIprAccess StaticInst flag. .. mips,cpu: Get rid of the IsIprAccess StaticInst

[gem5-dev] Change in gem5/gem5[develop]: gpu-compute: Fix deadlock in fetch_unit after branch instruction

2020-09-15 Thread Kyle Roarty (Gerrit) via gem5-dev
Kyle Roarty has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34555 ) Change subject: gpu-compute: Fix deadlock in fetch_unit after branch instruction .. gpu-compute: Fix deadlock

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: cpu,misc: Revert problematic terminology renames in BaseCPU

2020-09-15 Thread Bobby R. Bruce (Gerrit) via gem5-dev
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34495 ) Change subject: cpu,misc: Revert problematic terminology renames in BaseCPU .. cpu,misc: Revert problematic terminology

[gem5-dev] Re: MessageBuffer double counting delay between arrival and dequeue ticks?

2020-09-15 Thread Gambord, Ryan via gem5-dev
Hi Srikant, Thank you for looking into it. I noticed the miscalculation while working on something unrelated, and wasn't sure what those values were used for (I don't need them). If it's not being used, then my proposed change would be to remove it from the codebase as legacy bloat. Does anyone

[gem5-dev] Re: MessageBuffer double counting delay between arrival and dequeue ticks?

2020-09-15 Thread Jason Lowe-Power via gem5-dev
That's fine with me! I love removing code! Cheers, Jason On Tue, Sep 15, 2020 at 1:08 PM Gambord, Ryan via gem5-dev < gem5-dev@gem5.org> wrote: > Hi Srikant, > > Thank you for looking into it. I noticed the miscalculation while working > on something unrelated, and wasn't sure what those values

[gem5-dev] Change in gem5/gem5[develop]: cpu: Get rid of the unused IsMicroBranch StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33742 ) Change subject: cpu: Get rid of the unused IsMicroBranch StaticInst flag. .. cpu: Get rid of the unused IsMicroBranch

[gem5-dev] Change in gem5/gem5[develop]: x86,cpu: Get rid of the unused IsCC StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33741 ) Change subject: x86,cpu: Get rid of the unused IsCC StaticInst flag. .. x86,cpu: Get rid of the unused IsCC StaticInst flag.

[gem5-dev] Change in gem5/gem5[develop]: mem: Remove #if THE_ISA in the AbstractMemory class.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34499 ) Change subject: mem: Remove #if THE_ISA in the AbstractMemory class. .. mem: Remove #if THE_ISA in the AbstractMemory class.

[gem5-dev] Change in gem5/gem5[develop]: mips,cpu: Get rid of the IsDpsOp StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33740 ) Change subject: mips,cpu: Get rid of the IsDpsOp StaticInst flag. .. mips,cpu: Get rid of the IsDpsOp StaticInst flag. This

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: gpu: Fix a syntax error in X86GPUTLB.py.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34576 ) Change subject: gpu: Fix a syntax error in X86GPUTLB.py. .. gpu: Fix a syntax error in X86GPUTLB.py. The recent

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: arm: Use zero initialization for the BigRegVect types.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34575 ) Change subject: arm: Use zero initialization for the BigRegVect types. .. arm: Use zero initialization for the

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: mem: Remove conditional includes based on THE_ISA in ruby.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34577 ) Change subject: mem: Remove conditional includes based on THE_ISA in ruby. .. mem: Remove conditional includes

[gem5-dev] Change in gem5/gem5[release-staging-v20.1.0.0]: configs: Add special case in MemConfig

2020-09-15 Thread Jason Lowe-Power (Gerrit) via gem5-dev
Jason Lowe-Power has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34595 ) Change subject: configs: Add special case in MemConfig .. configs: Add special case in MemConfig

[gem5-dev] Change in gem5/gem5[develop]: mips,cpu: Eliminate the unused IsIndexed StaticInst flag.

2020-09-15 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33735 ) Change subject: mips,cpu: Eliminate the unused IsIndexed StaticInst flag. .. mips,cpu: Eliminate the unused IsIndexed