Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/25949 )

Change subject: arm: Return whether a semihosting call was recognized/handled.
......................................................................

arm: Return whether a semihosting call was recognized/handled.

Change-Id: Ie2da812172fe2f9c1e2b5be95561863bd12920b1
---
M src/arch/arm/semihosting.cc
M src/arch/arm/semihosting.hh
M src/arch/arm/system.cc
M src/arch/arm/system.hh
4 files changed, 18 insertions(+), 14 deletions(-)



diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc
index 08728ed..6e58556 100644
--- a/src/arch/arm/semihosting.cc
+++ b/src/arch/arm/semihosting.cc
@@ -153,21 +153,21 @@
                tickShift);
 }

-void
+bool
 ArmSemihosting::call64(ThreadContext *tc, bool gem5_ops)
 {
     RegVal op = tc->readIntReg(ArmISA::INTREG_X0 & mask(32));
     if (op > MaxStandardOp && !gem5_ops) {
         unrecognizedCall<Abi64>(
                 tc, "Gem5 semihosting op (0x%x) disabled from here.", op);
-        return;
+        return false;
     }

     auto it = calls.find(op);
     if (it == calls.end()) {
         unrecognizedCall<Abi64>(
                 tc, "Unknown aarch64 semihosting call: op = 0x%x", op);
-        return;
+        return false;
     }
     const SemiCall &call = it->second;

@@ -175,23 +175,25 @@
     auto err = call.call64(this, tc);
     semiErrno = err.second;
     DPRINTF(Semihosting, "\t ->: 0x%x, %i\n", err.first, err.second);
+
+    return true;
 }

-void
+bool
 ArmSemihosting::call32(ThreadContext *tc, bool gem5_ops)
 {
     RegVal op = tc->readIntReg(ArmISA::INTREG_R0);
     if (op > MaxStandardOp && !gem5_ops) {
         unrecognizedCall<Abi32>(
                 tc, "Gem5 semihosting op (0x%x) disabled from here.", op);
-        return;
+        return false;
     }

     auto it = calls.find(op);
     if (it == calls.end()) {
         unrecognizedCall<Abi32>(
                 tc, "Unknown aarch32 semihosting call: op = 0x%x", op);
-        return;
+        return false;
     }
     const SemiCall &call = it->second;

@@ -199,6 +201,8 @@
     auto err = call.call32(this, tc);
     semiErrno = err.second;
     DPRINTF(Semihosting, "\t ->: 0x%x, %i\n", err.first, err.second);
+
+    return true;
 }

 void
diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh
index 7b575c0..d45aa74 100644
--- a/src/arch/arm/semihosting.hh
+++ b/src/arch/arm/semihosting.hh
@@ -214,9 +214,9 @@
     ArmSemihosting(const ArmSemihostingParams *p);

     /** Perform an Arm Semihosting call from aarch64 code. */
-    void call64(ThreadContext *tc, bool gem5_ops=false);
+    bool call64(ThreadContext *tc, bool gem5_ops=false);
     /** Perform an Arm Semihosting call from aarch32 code. */
-    void call32(ThreadContext *tc, bool gem5_ops=false);
+    bool call32(ThreadContext *tc, bool gem5_ops=false);

   public: // SimObject and related interfaces
     void serialize(CheckpointOut &cp) const override;
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 3cd8858..950caee 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -291,16 +291,16 @@
     return FullSystem && getArmSystem(tc)->haveSemihosting();
 }

-void
+bool
 ArmSystem::callSemihosting64(ThreadContext *tc, bool gem5_ops)
 {
-    getArmSystem(tc)->semihosting->call64(tc, gem5_ops);
+    return getArmSystem(tc)->semihosting->call64(tc, gem5_ops);
 }

-void
+bool
 ArmSystem::callSemihosting32(ThreadContext *tc, bool gem5_ops)
 {
-    getArmSystem(tc)->semihosting->call32(tc, gem5_ops);
+    return getArmSystem(tc)->semihosting->call32(tc, gem5_ops);
 }

 ArmSystem *
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index b598977..e890d10 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -334,10 +334,10 @@
     static bool haveSemihosting(ThreadContext *tc);

     /** Make a Semihosting call from aarch64 */
-    static void callSemihosting64(ThreadContext *tc, bool gem5_ops=false);
+    static bool callSemihosting64(ThreadContext *tc, bool gem5_ops=false);

     /** Make a Semihosting call from aarch32 */
-    static void callSemihosting32(ThreadContext *tc, bool gem5_ops=false);
+    static bool callSemihosting32(ThreadContext *tc, bool gem5_ops=false);
 };

 class GenericArmSystem : public ArmSystem

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie2da812172fe2f9c1e2b5be95561863bd12920b1
Gerrit-Change-Number: 25949
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-MessageType: newchange
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