[gem5-dev] Change in gem5/gem5[develop]: stdlib: Call `setup_memory_ranges()` from the constructor
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/52883 ) Change subject: stdlib: Call `setup_memory_ranges()` from the constructor .. stdlib: Call `setup_memory_ranges()` from the constructor `setup_memory_ranges()`, now `_setup_memory_ranges()`, had to be called by subclasses. Since `setup_memory_ranges() was always called at the top of the `_setup_board()` function (or could be), this function is now automatically called within the AbstractBoard's constructor prior to `_setup_board` and `_connect_things`. Change-Id: I6bf3231666b86059ffc484cfca44e45cfde52ea6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52883 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M src/python/gem5/components/boards/simple_board.py M src/python/gem5/components/boards/riscv_board.py M src/python/gem5/components/boards/test_board.py M src/python/gem5/components/boards/x86_board.py M src/python/gem5/components/boards/abstract_board.py 5 files changed, 45 insertions(+), 24 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/python/gem5/components/boards/abstract_board.py b/src/python/gem5/components/boards/abstract_board.py index 4055e17..a27cecd 100644 --- a/src/python/gem5/components/boards/abstract_board.py +++ b/src/python/gem5/components/boards/abstract_board.py @@ -86,6 +86,8 @@ self.memory = memory self.cache_hierarchy = cache_hierarchy +# Setup the board and memory system's memory ranges. +self._setup_memory_ranges() # Setup board properties unique to the board being constructed. self._setup_board() @@ -143,8 +145,9 @@ """ This function is called in the AbstractBoard constructor, before the memory, processor, and cache hierarchy components are incorporated via -`_connect_thing()`. This function should be overridden by boards to -specify components, connections unique to that board. +`_connect_thing()`, but after the `_setup_memory_ranges()` function. +This function should be overridden by boards to specify components, +connections unique to that board. """ raise NotImplementedError @@ -212,18 +215,24 @@ raise NotImplementedError @abstractmethod -def setup_memory_ranges(self) -> None: +def _setup_memory_ranges(self) -> None: """ -Set the memory ranges for this board. +Set the memory ranges for this board and memory system. -This is called by at the end of the constructor. It can query the -board's memory to determine the size and the set the memory ranges on -the memory if it needs to move the memory devices. +This is called in the constructor, prior to `_setup_board` and +`_connect_things`. It should query the board's memory to determine the +size and the set the memory ranges on the memory system and on the +board. -The simplest implementation just sets the board's memory range to be -the size of memory and memory's memory range to be the same as the -board. Full system implementations will likely need something more -complicated. +The simplest implementation sets the board's memory range to the size +of memory and memory system's range to be the same as the board. Full +system implementations will likely need something more complicated. + +Notes +- +* This *must* be called prior to the incorporation of the cache +hierarchy (via `_connect_things`) as cache hierarchies depend upon +knowing the memory system's ranges. """ raise NotImplementedError diff --git a/src/python/gem5/components/boards/riscv_board.py b/src/python/gem5/components/boards/riscv_board.py index f64640c..8945f22 100644 --- a/src/python/gem5/components/boards/riscv_board.py +++ b/src/python/gem5/components/boards/riscv_board.py @@ -121,9 +121,6 @@ self._on_chip_devices = [self.platform.clint, self.platform.plic] self._off_chip_devices = [self.platform.uart, self.disk] -# Set up the memory ranges -self.setup_memory_ranges() - def _setup_io_devices(self) -> None: """Connect the I/O devices to the I/O bus""" @@ -189,7 +186,7 @@ return self.iobus.mem_side_ports @overrides(AbstractBoard) -def setup_memory_ranges(self): +def _setup_memory_ranges(self): memory = self.get_memory() mem_size = memory.get_size() self.mem_ranges = [AddrRange(start=0x8000, size=mem_size)] diff --git a/src/python/gem5/components/boards/simple_board.py b/src/python/gem5/components/boards/simple_board.py index c011132..d0f4f2a
[gem5-dev] Change in gem5/gem5[develop]: stdlib: Call `setup_memory_ranges()` from the constructor
Bobby R. Bruce has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/52883 ) Change subject: stdlib: Call `setup_memory_ranges()` from the constructor .. stdlib: Call `setup_memory_ranges()` from the constructor `setup_memory_ranges()`, now `_setup_memory_ranges()`, had to be called by subclasses. Since `setup_memory_ranges() was always called at the top of the `_setup_board()` function (or could be), this function is now automatically called within the AbstractBoard's constructor prior to `_setup_board` and `_connect_things`. Change-Id: I6bf3231666b86059ffc484cfca44e45cfde52ea6 --- M src/python/gem5/components/boards/simple_board.py M src/python/gem5/components/boards/riscv_board.py M src/python/gem5/components/boards/test_board.py M src/python/gem5/components/boards/x86_board.py M src/python/gem5/components/boards/abstract_board.py 5 files changed, 41 insertions(+), 24 deletions(-) diff --git a/src/python/gem5/components/boards/abstract_board.py b/src/python/gem5/components/boards/abstract_board.py index 4055e17..a27cecd 100644 --- a/src/python/gem5/components/boards/abstract_board.py +++ b/src/python/gem5/components/boards/abstract_board.py @@ -86,6 +86,8 @@ self.memory = memory self.cache_hierarchy = cache_hierarchy +# Setup the board and memory system's memory ranges. +self._setup_memory_ranges() # Setup board properties unique to the board being constructed. self._setup_board() @@ -143,8 +145,9 @@ """ This function is called in the AbstractBoard constructor, before the memory, processor, and cache hierarchy components are incorporated via -`_connect_thing()`. This function should be overridden by boards to -specify components, connections unique to that board. +`_connect_thing()`, but after the `_setup_memory_ranges()` function. +This function should be overridden by boards to specify components, +connections unique to that board. """ raise NotImplementedError @@ -212,18 +215,24 @@ raise NotImplementedError @abstractmethod -def setup_memory_ranges(self) -> None: +def _setup_memory_ranges(self) -> None: """ -Set the memory ranges for this board. +Set the memory ranges for this board and memory system. -This is called by at the end of the constructor. It can query the -board's memory to determine the size and the set the memory ranges on -the memory if it needs to move the memory devices. +This is called in the constructor, prior to `_setup_board` and +`_connect_things`. It should query the board's memory to determine the +size and the set the memory ranges on the memory system and on the +board. -The simplest implementation just sets the board's memory range to be -the size of memory and memory's memory range to be the same as the -board. Full system implementations will likely need something more -complicated. +The simplest implementation sets the board's memory range to the size +of memory and memory system's range to be the same as the board. Full +system implementations will likely need something more complicated. + +Notes +- +* This *must* be called prior to the incorporation of the cache +hierarchy (via `_connect_things`) as cache hierarchies depend upon +knowing the memory system's ranges. """ raise NotImplementedError diff --git a/src/python/gem5/components/boards/riscv_board.py b/src/python/gem5/components/boards/riscv_board.py index f64640c..8945f22 100644 --- a/src/python/gem5/components/boards/riscv_board.py +++ b/src/python/gem5/components/boards/riscv_board.py @@ -121,9 +121,6 @@ self._on_chip_devices = [self.platform.clint, self.platform.plic] self._off_chip_devices = [self.platform.uart, self.disk] -# Set up the memory ranges -self.setup_memory_ranges() - def _setup_io_devices(self) -> None: """Connect the I/O devices to the I/O bus""" @@ -189,7 +186,7 @@ return self.iobus.mem_side_ports @overrides(AbstractBoard) -def setup_memory_ranges(self): +def _setup_memory_ranges(self): memory = self.get_memory() mem_size = memory.get_size() self.mem_ranges = [AddrRange(start=0x8000, size=mem_size)] diff --git a/src/python/gem5/components/boards/simple_board.py b/src/python/gem5/components/boards/simple_board.py index c011132..d0f4f2a 100644 --- a/src/python/gem5/components/boards/simple_board.py +++ b/src/python/gem5/components/boards/simple_board.py @@ -67,8 +67,7 @@ @overrides(AbstractBoard) def _setup_board(self) -> None: -# Set up the memory ranges -
