Daniel Carvalho has submitted this change and it was merged. (
https://gem5-review.googlesource.com/9601 )
Change subject: mem: Remove unused 'using namespace'
......................................................................
mem: Remove unused 'using namespace'
Removal of unused/barely used 'using namespace' from C++ files.
Change-Id: I66dc548c04506db2e41180b9ea7ab5abd7d5375a
Reviewed-on: https://gem5-review.googlesource.com/9601
Reviewed-by: Jason Lowe-Power <ja...@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikole...@arm.com>
---
M src/mem/cache/mshr.cc
M src/mem/cache/mshr_queue.cc
M src/mem/cache/tags/base.cc
M src/mem/cache/tags/base_set_assoc.cc
M src/mem/cache/tags/fa_lru.cc
M src/mem/cache/write_queue.cc
M src/mem/cache/write_queue_entry.cc
M src/mem/dram_ctrl.cc
M src/mem/drampower.cc
M src/mem/fs_translating_port_proxy.cc
M src/mem/mem_checker_monitor.cc
M src/mem/packet_queue.cc
M src/mem/page_table.cc
M src/mem/simple_mem.cc
14 files changed, 6 insertions(+), 35 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc
index 493b7f0..cc26b56 100644
--- a/src/mem/cache/mshr.cc
+++ b/src/mem/cache/mshr.cc
@@ -60,8 +60,6 @@
#include "mem/cache/cache.hh"
#include "sim/core.hh"
-using namespace std;
-
MSHR::MSHR() : downstreamPending(false),
pendingModified(false),
postInvalidate(false), postDowngrade(false),
@@ -617,7 +615,7 @@
std::string
MSHR::print() const
{
- ostringstream str;
+ std::ostringstream str;
print(str);
return str.str();
}
diff --git a/src/mem/cache/mshr_queue.cc b/src/mem/cache/mshr_queue.cc
index f4992e1..29358d7 100644
--- a/src/mem/cache/mshr_queue.cc
+++ b/src/mem/cache/mshr_queue.cc
@@ -47,8 +47,6 @@
#include "mem/cache/mshr_queue.hh"
-using namespace std;
-
MSHRQueue::MSHRQueue(const std::string &_label,
int num_entries, int reserve, int demand_reserve)
: Queue<MSHR>(_label, num_entries, reserve),
diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc
index d467019..d48acfb 100644
--- a/src/mem/cache/tags/base.cc
+++ b/src/mem/cache/tags/base.cc
@@ -52,8 +52,6 @@
#include "mem/cache/base.hh"
#include "sim/sim_exit.hh"
-using namespace std;
-
BaseTags::BaseTags(const Params *p)
: ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1),
size(p->size),
diff --git a/src/mem/cache/tags/base_set_assoc.cc
b/src/mem/cache/tags/base_set_assoc.cc
index 0ab806e..ac0e06f 100644
--- a/src/mem/cache/tags/base_set_assoc.cc
+++ b/src/mem/cache/tags/base_set_assoc.cc
@@ -52,8 +52,6 @@
#include "base/intmath.hh"
#include "sim/core.hh"
-using namespace std;
-
BaseSetAssoc::BaseSetAssoc(const Params *p)
:BaseTags(p), assoc(p->assoc), allocAssoc(p->assoc),
blks(p->size / p->block_size),
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 652abc3..f02b55a 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -53,8 +53,6 @@
#include "base/intmath.hh"
#include "base/logging.hh"
-using namespace std;
-
FALRU::FALRU(const Params *p)
: BaseTags(p), cacheBoundaries(nullptr)
{
@@ -122,7 +120,6 @@
void
FALRU::regStats()
{
- using namespace Stats;
BaseTags::regStats();
hits
.init(numCaches+1)
@@ -140,7 +137,7 @@
;
for (unsigned i = 0; i <= numCaches; ++i) {
- stringstream size_str;
+ std::stringstream size_str;
if (i < 3){
size_str << (1<<(i+7)) <<"K";
} else {
diff --git a/src/mem/cache/write_queue.cc b/src/mem/cache/write_queue.cc
index 7a876b3..13e0fc5 100644
--- a/src/mem/cache/write_queue.cc
+++ b/src/mem/cache/write_queue.cc
@@ -48,8 +48,6 @@
#include "mem/cache/write_queue.hh"
-using namespace std;
-
WriteQueue::WriteQueue(const std::string &_label,
int num_entries, int reserve)
: Queue<WriteQueueEntry>(_label, num_entries, reserve)
diff --git a/src/mem/cache/write_queue_entry.cc
b/src/mem/cache/write_queue_entry.cc
index 663c231..b8275e1 100644
--- a/src/mem/cache/write_queue_entry.cc
+++ b/src/mem/cache/write_queue_entry.cc
@@ -61,8 +61,6 @@
#include "mem/cache/cache.hh"
#include "sim/core.hh"
-using namespace std;
-
inline void
WriteQueueEntry::TargetList::add(PacketPtr pkt, Tick readyTime,
Counter order)
@@ -163,7 +161,7 @@
std::string
WriteQueueEntry::print() const
{
- ostringstream str;
+ std::ostringstream str;
print(str);
return str.str();
}
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 62de18d..fed519d 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -2302,8 +2302,6 @@
void
DRAMCtrl::Rank::regStats()
{
- using namespace Stats;
-
pwrStateTime
.init(6)
.name(name() + ".memoryStateTime")
@@ -2367,8 +2365,8 @@
.name(name() + ".totalIdleTime")
.desc("Total Idle time Per DRAM Rank");
- registerDumpCallback(new RankDumpCallback(this));
- registerResetCallback(new RankResetCallback(this));
+ Stats::registerDumpCallback(new RankDumpCallback(this));
+ Stats::registerResetCallback(new RankResetCallback(this));
}
void
DRAMCtrl::regStats()
diff --git a/src/mem/drampower.cc b/src/mem/drampower.cc
index d491c96..c4cdfb9 100644
--- a/src/mem/drampower.cc
+++ b/src/mem/drampower.cc
@@ -42,8 +42,6 @@
#include "base/intmath.hh"
#include "sim/core.hh"
-using namespace Data;
-
DRAMPower::DRAMPower(const DRAMCtrlParams* p, bool include_io) :
powerlib(libDRAMPower(getMemSpec(p), include_io))
{
diff --git a/src/mem/fs_translating_port_proxy.cc
b/src/mem/fs_translating_port_proxy.cc
index ef86bf7..15ad823 100644
--- a/src/mem/fs_translating_port_proxy.cc
+++ b/src/mem/fs_translating_port_proxy.cc
@@ -54,8 +54,6 @@
#include "cpu/thread_context.hh"
#include "sim/system.hh"
-using namespace TheISA;
-
FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
: PortProxy(tc->getCpuPtr()->getDataPort(),
tc->getSystemPtr()->cacheLineSize()), _tc(tc)
diff --git a/src/mem/mem_checker_monitor.cc b/src/mem/mem_checker_monitor.cc
index 2a25d21..c58ac54 100644
--- a/src/mem/mem_checker_monitor.cc
+++ b/src/mem/mem_checker_monitor.cc
@@ -47,8 +47,6 @@
#include "base/trace.hh"
#include "debug/MemCheckerMonitor.hh"
-using namespace std;
-
MemCheckerMonitor::MemCheckerMonitor(Params* params)
: MemObject(params),
masterPort(name() + "-master", *this),
diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index 7649fe5..a630f1f 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -47,8 +47,6 @@
#include "debug/Drain.hh"
#include "debug/PacketQueue.hh"
-using namespace std;
-
PacketQueue::PacketQueue(EventManager& _em, const std::string& _label,
const std::string& _sendEventName,
bool disable_sanity_check)
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index d771479..8abeb29 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -45,8 +45,6 @@
#include "sim/faults.hh"
#include "sim/serialize.hh"
-using namespace std;
-
void
EmulationPageTable::map(Addr vaddr, Addr paddr, int64_t size, uint64_t
flags)
{
@@ -100,7 +98,7 @@
EmulationPageTable::getMappings(std::vector<std::pair<Addr, Addr>>
*addr_maps)
{
for (auto &iter : pTable)
- addr_maps->push_back(make_pair(iter.first, iter.second.paddr));
+ addr_maps->push_back(std::make_pair(iter.first,
iter.second.paddr));
}
void
diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc
index 8358a82..6914ac4 100644
--- a/src/mem/simple_mem.cc
+++ b/src/mem/simple_mem.cc
@@ -48,8 +48,6 @@
#include "base/trace.hh"
#include "debug/Drain.hh"
-using namespace std;
-
SimpleMemory::SimpleMemory(const SimpleMemoryParams* p) :
AbstractMemory(p),
port(name() + ".port", *this), latency(p->latency),
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I66dc548c04506db2e41180b9ea7ab5abd7d5375a
Gerrit-Change-Number: 9601
Gerrit-PatchSet: 3
Gerrit-Owner: Daniel Carvalho <oda...@yahoo.com.br>
Gerrit-Assignee: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Daniel Carvalho <oda...@yahoo.com.br>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-MessageType: merged
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