[gem5-dev] Change in public/gem5[master]: arch-arm, configs: Treat the bootloader rom as cacheable memory
Nikos Nikoleris has submitted this change and it was merged. ( https://gem5-review.googlesource.com/8741 ) Change subject: arch-arm, configs: Treat the bootloader rom as cacheable memory .. arch-arm, configs: Treat the bootloader rom as cacheable memory Prior to this changeset the bootloader rom (instantiated as a SimpleMemory) in ruby Arm systems was treated as an IO device and it was fronted by a DMA controller. This changeset moves the bootloader rom and adds it to the system as another memory with a dedicated directory controller. Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0 Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/8741 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- M configs/common/FSConfig.py M configs/example/fs.py M configs/ruby/GPU_RfO.py M configs/ruby/GPU_VIPER.py M configs/ruby/GPU_VIPER_Baseline.py M configs/ruby/GPU_VIPER_Region.py M configs/ruby/Garnet_standalone.py M configs/ruby/MESI_Three_Level.py M configs/ruby/MESI_Two_Level.py M configs/ruby/MI_example.py M configs/ruby/MOESI_AMD_Base.py M configs/ruby/MOESI_CMP_directory.py M configs/ruby/MOESI_CMP_token.py M configs/ruby/MOESI_hammer.py M configs/ruby/Ruby.py M src/dev/arm/RealView.py M tests/configs/base_config.py 17 files changed, 109 insertions(+), 59 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 42cfafe..17498c4 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -1,4 +1,4 @@ -# Copyright (c) 2010-2012, 2015-2017 ARM Limited +# Copyright (c) 2010-2012, 2015-2018 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -326,8 +326,10 @@ # iobus, as gem5's membus is only used for initialization and # SST doesn't use it. Attaching nvmem to iobus solves this issue. # During initialization, system_port -> membus -> iobus -> nvmem. -if external_memory or ruby: +if external_memory: self.realview.setupBootLoader(self.iobus, self, binary) +elif ruby: +self.realview.setupBootLoader(None, self, binary) else: self.realview.setupBootLoader(self.membus, self, binary) self.gic_cpu_addr = self.realview.gic.cpu_addr @@ -386,8 +388,6 @@ elif ruby: self._dma_ports = [ ] self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports) -# Force Ruby to treat the boot ROM as an IO device. -self.realview.nvmem.in_addr_map = False self.realview.attachIO(self.iobus, dma_ports=self._dma_ports) else: self.realview.attachOnChipIO(self.membus, self.bridge) diff --git a/configs/example/fs.py b/configs/example/fs.py index 0f87e2b..4031fd0 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -152,8 +152,9 @@ test_sys.kvm_vm = KvmVM() if options.ruby: +bootmem = getattr(test_sys, 'bootmem', None) Ruby.create_system(options, True, test_sys, test_sys.iobus, - test_sys._dma_ports) + test_sys._dma_ports, bootmem) # Create a seperate clock domain for Ruby test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, diff --git a/configs/ruby/GPU_RfO.py b/configs/ruby/GPU_RfO.py index 832ea44..3331ab2 100644 --- a/configs/ruby/GPU_RfO.py +++ b/configs/ruby/GPU_RfO.py @@ -427,7 +427,8 @@ parser.add_option("--tcc-dir-factor", type='int', default=4, help="TCCdir size = factor *(TCPs + TCC)") -def create_system(options, full_system, system, dma_devices, ruby_system): +def create_system(options, full_system, system, dma_devices, bootmem, + ruby_system): if buildEnv['PROTOCOL'] != 'GPU_RfO': panic("This script requires the GPU_RfO protocol to be built.") diff --git a/configs/ruby/GPU_VIPER.py b/configs/ruby/GPU_VIPER.py index e4ba180..37136af 100644 --- a/configs/ruby/GPU_VIPER.py +++ b/configs/ruby/GPU_VIPER.py @@ -390,7 +390,8 @@ parser.add_option("--noL1", action = "store_true", default = False, help = "bypassL1") -def create_system(options, full_system, system, dma_devices, ruby_system): +def create_system(options, full_system, system, dma_devices, bootmem, + ruby_system): if buildEnv['PROTOCOL'] != 'GPU_VIPER': panic("This script requires the GPU_VIPER protocol to be built.") diff --git a/configs/ruby/GPU_VIPER_Baseline.py b/configs/ruby/GPU_VIPER_Baseline.py index 978d4cc..ec56925 100644 --- a/configs/ruby/GPU_VIPER_Baseline.py +++ b/configs/ruby/GPU_VIPER_Baseline.py @@ -373,7 +373,8 @@ parser.add_option("--noL2", action = "store_true", default = False, help = "bypassL2"
[gem5-dev] Change in public/gem5[master]: arch-arm, configs: Treat the bootloader rom as cacheable memory
Hello Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/8741 to look at the new patch set (#2). Change subject: arch-arm, configs: Treat the bootloader rom as cacheable memory .. arch-arm, configs: Treat the bootloader rom as cacheable memory Prior to this changeset the bootloader rom (instantiated as a SimpleMemory) in ruby Arm systems was treated as an IO device and it was fronted by a DMA controller. This changeset moves the bootloader rom and adds it to the system as another memory with a dedicated directory controller. Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0 Reviewed-by: Andreas Sandberg --- M configs/common/FSConfig.py M configs/example/fs.py M configs/ruby/GPU_RfO.py M configs/ruby/GPU_VIPER.py M configs/ruby/GPU_VIPER_Baseline.py M configs/ruby/GPU_VIPER_Region.py M configs/ruby/Garnet_standalone.py M configs/ruby/MESI_Three_Level.py M configs/ruby/MESI_Two_Level.py M configs/ruby/MI_example.py M configs/ruby/MOESI_AMD_Base.py M configs/ruby/MOESI_CMP_directory.py M configs/ruby/MOESI_CMP_token.py M configs/ruby/MOESI_hammer.py M configs/ruby/Ruby.py M src/dev/arm/RealView.py M tests/configs/base_config.py 17 files changed, 109 insertions(+), 59 deletions(-) -- To view, visit https://gem5-review.googlesource.com/8741 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0 Gerrit-Change-Number: 8741 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos Nikoleris Gerrit-Assignee: Jason Lowe-Power Gerrit-Reviewer: Andreas Sandberg Gerit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in public/gem5[master]: arch-arm, configs: Treat the bootloader rom as cacheable memory
Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/8741 to review the following change. Change subject: arch-arm, configs: Treat the bootloader rom as cacheable memory .. arch-arm, configs: Treat the bootloader rom as cacheable memory Prior to this changeset the bootloader rom (instantiated as a SimpleMemory) in ruby Arm systems was treated as an IO device and it was fronted by a DMA controller. This changeset moves the bootloader rom and adds it to the system as another memory with a dedicated directory controller. Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0 Reviewed-by: Andreas Sandberg --- M configs/common/FSConfig.py M configs/example/fs.py M configs/ruby/GPU_RfO.py M configs/ruby/GPU_VIPER.py M configs/ruby/GPU_VIPER_Baseline.py M configs/ruby/GPU_VIPER_Region.py M configs/ruby/Garnet_standalone.py M configs/ruby/MESI_Three_Level.py M configs/ruby/MESI_Two_Level.py M configs/ruby/MI_example.py M configs/ruby/MOESI_AMD_Base.py M configs/ruby/MOESI_CMP_directory.py M configs/ruby/MOESI_CMP_token.py M configs/ruby/MOESI_hammer.py M configs/ruby/Ruby.py M src/dev/arm/RealView.py M tests/configs/base_config.py 17 files changed, 109 insertions(+), 59 deletions(-) diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index fc8765b..dd9f894 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -1,4 +1,4 @@ -# Copyright (c) 2010-2012, 2015-2017 ARM Limited +# Copyright (c) 2010-2012, 2015-2018 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -323,8 +323,10 @@ # iobus, as gem5's membus is only used for initialization and # SST doesn't use it. Attaching nvmem to iobus solves this issue. # During initialization, system_port -> membus -> iobus -> nvmem. -if external_memory or ruby: +if external_memory: self.realview.setupBootLoader(self.iobus, self, binary) +elif ruby: +self.realview.setupBootLoader(None, self, binary) else: self.realview.setupBootLoader(self.membus, self, binary) self.gic_cpu_addr = self.realview.gic.cpu_addr @@ -383,8 +385,6 @@ elif ruby: self._dma_ports = [ ] self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports) -# Force Ruby to treat the boot ROM as an IO device. -self.realview.nvmem.in_addr_map = False self.realview.attachIO(self.iobus, dma_ports=self._dma_ports) else: self.realview.attachOnChipIO(self.membus, self.bridge) diff --git a/configs/example/fs.py b/configs/example/fs.py index f7115eb..c6d7bfa 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -150,8 +150,9 @@ test_sys.kvm_vm = KvmVM() if options.ruby: +bootmem = getattr(test_sys 'bootmem', None) Ruby.create_system(options, True, test_sys, test_sys.iobus, - test_sys._dma_ports) + test_sys._dma_ports, bootmem) # Create a seperate clock domain for Ruby test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, diff --git a/configs/ruby/GPU_RfO.py b/configs/ruby/GPU_RfO.py index 832ea44..3331ab2 100644 --- a/configs/ruby/GPU_RfO.py +++ b/configs/ruby/GPU_RfO.py @@ -427,7 +427,8 @@ parser.add_option("--tcc-dir-factor", type='int', default=4, help="TCCdir size = factor *(TCPs + TCC)") -def create_system(options, full_system, system, dma_devices, ruby_system): +def create_system(options, full_system, system, dma_devices, bootmem, + ruby_system): if buildEnv['PROTOCOL'] != 'GPU_RfO': panic("This script requires the GPU_RfO protocol to be built.") diff --git a/configs/ruby/GPU_VIPER.py b/configs/ruby/GPU_VIPER.py index e4ba180..37136af 100644 --- a/configs/ruby/GPU_VIPER.py +++ b/configs/ruby/GPU_VIPER.py @@ -390,7 +390,8 @@ parser.add_option("--noL1", action = "store_true", default = False, help = "bypassL1") -def create_system(options, full_system, system, dma_devices, ruby_system): +def create_system(options, full_system, system, dma_devices, bootmem, + ruby_system): if buildEnv['PROTOCOL'] != 'GPU_VIPER': panic("This script requires the GPU_VIPER protocol to be built.") diff --git a/configs/ruby/GPU_VIPER_Baseline.py b/configs/ruby/GPU_VIPER_Baseline.py index 978d4cc..ec56925 100644 --- a/configs/ruby/GPU_VIPER_Baseline.py +++ b/configs/ruby/GPU_VIPER_Baseline.py @@ -373,7 +373,8 @@ parser.add_option("--noL2", action = "store_true", default = False, help = "bypassL2") -def create_system(options, full_system, system, dma_devices, ruby_system): +def create_system(options, full_system, system, dma_devices, bootmem, +