[gem5-dev] Change in public/gem5[master]: arch-arm: isSecureBelow from armarm pseudocode

2018-02-07 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/7221 )


Change subject: arch-arm: isSecureBelow from armarm pseudocode
..

arch-arm: isSecureBelow from armarm pseudocode

This patch introduces the inSecureBelow pseudocode function
defined in the armarm documentation. It also replaces the
inSecureState function call which was improperly used in
ELIs32: we might be in secure state (EL3), but with non-secure
lower ELs (SCR.NS = 1).

Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-by: Chuan Zhu 
Reviewed-on: https://gem5-review.googlesource.com/7221
Maintainer: Andreas Sandberg 
---
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
2 files changed, 20 insertions(+), 6 deletions(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved
  Andreas Sandberg: Looks good to me, approved



diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 56503ac..a49f829 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2009-2014, 2016-2017 ARM Limited
+ * Copyright (c) 2009-2014, 2016-2018 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -184,6 +184,13 @@
 scr, tc->readMiscReg(MISCREG_CPSR));
 }

+inline bool
+isSecureBelowEL3(ThreadContext *tc)
+{
+SCR scr = tc->readMiscReg(MISCREG_SCR_EL3);
+return ArmSystem::haveEL(tc, EL3) && scr.ns == 0;
+}
+
 bool
 inAArch64(ThreadContext *tc)
 {
@@ -256,8 +263,8 @@

 HCR hcr = tc->readMiscReg(MISCREG_HCR_EL2);
 bool aarch32_at_el1 = (aarch32_below_el3
-|| (have_el2
-&& !inSecureState(tc) && hcr.rw == 0));
+   || (have_el2
+   && !isSecureBelowEL3(tc) && hcr.rw == 0));

 // Only know if EL0 using AArch32 from PSTATE
 if (el == EL0 && !aarch32_at_el1) {
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 622fd12..6e4e76b 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -201,10 +201,17 @@
 }
 }

-bool longDescFormatInUse(ThreadContext *tc);
-
 bool inSecureState(ThreadContext *tc);

+/**
+ * Return TRUE if an Exception level below EL3 is in Secure state.
+ * Differs from inSecureState in that it ignores the current EL
+ * or Mode in considering security state.
+ */
+inline bool isSecureBelowEL3(ThreadContext *tc);
+
+bool longDescFormatInUse(ThreadContext *tc);
+
 uint32_t getMPIDR(ArmSystem *arm_sys, ThreadContext *tc);

 static inline uint32_t

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778
Gerrit-Change-Number: 7221
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
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[gem5-dev] Change in public/gem5[master]: arch-arm: isSecureBelow from armarm pseudocode

2018-01-09 Thread Giacomo Travaglini (Gerrit) 

Hello Nikos Nikoleris,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/7221

to review the following change.


Change subject: arch-arm: isSecureBelow from armarm pseudocode
..

arch-arm: isSecureBelow from armarm pseudocode

This patch introduces the inSecureBelow pseudocode function
defined in the armarm documentation. It also replaces the
inSecureState function call which was improperly used in
ELIs32: we might be in secure state (EL3), but with non-secure
lower ELs (SCR.NS = 1).

Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Nikos Nikoleris 
Reviewed-by: Chuan Zhu 
---
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
2 files changed, 20 insertions(+), 6 deletions(-)



diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 56503ac..a49f829 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2009-2014, 2016-2017 ARM Limited
+ * Copyright (c) 2009-2014, 2016-2018 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -184,6 +184,13 @@
 scr, tc->readMiscReg(MISCREG_CPSR));
 }

+inline bool
+isSecureBelowEL3(ThreadContext *tc)
+{
+SCR scr = tc->readMiscReg(MISCREG_SCR_EL3);
+return ArmSystem::haveEL(tc, EL3) && scr.ns == 0;
+}
+
 bool
 inAArch64(ThreadContext *tc)
 {
@@ -256,8 +263,8 @@

 HCR hcr = tc->readMiscReg(MISCREG_HCR_EL2);
 bool aarch32_at_el1 = (aarch32_below_el3
-|| (have_el2
-&& !inSecureState(tc) && hcr.rw == 0));
+   || (have_el2
+   && !isSecureBelowEL3(tc) && hcr.rw == 0));

 // Only know if EL0 using AArch32 from PSTATE
 if (el == EL0 && !aarch32_at_el1) {
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 622fd12..6e4e76b 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -201,10 +201,17 @@
 }
 }

-bool longDescFormatInUse(ThreadContext *tc);
-
 bool inSecureState(ThreadContext *tc);

+/**
+ * Return TRUE if an Exception level below EL3 is in Secure state.
+ * Differs from inSecureState in that it ignores the current EL
+ * or Mode in considering security state.
+ */
+inline bool isSecureBelowEL3(ThreadContext *tc);
+
+bool longDescFormatInUse(ThreadContext *tc);
+
 uint32_t getMPIDR(ArmSystem *arm_sys, ThreadContext *tc);

 static inline uint32_t

--
To view, visit https://gem5-review.googlesource.com/7221
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778
Gerrit-Change-Number: 7221
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Nikos Nikoleris 
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