Re: [m5-dev] GEM5: Ruby Task List

2010-06-01 Thread Nilay Vaish
My patches replace Vector container used in Ruby with STL vector container. As you mentioned that your diffs leave nothing in the gems_common directory, so my patches would not be required. I have created an account on the review board with the user-name nilay. -- Nilay On Tue, 1 Jun 2010,

Re: [m5-dev] Review Request: ruby: get rid of RefCnt and Allocator stuff use base/refcnt.hh

2010-06-06 Thread Nilay Vaish
On 2010-06-06 12:34:28, Nilay Vaish wrote: The changes seem I have two observations 1. In several places we are using dynamic_cast. The patch under consideration moves some of these to safe_cast and retains dynamic_cast at other places. Should we not use safe_cast in all

Re: [m5-dev] Review Request: ruby: get rid of Vector and use STL

2010-06-07 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/22/#review38 --- Ship it! 1. Should we use resize() or should we use reserve() for setting

Re: [m5-dev] Review Request: ruby: get rid of Vector and use STL

2010-06-07 Thread Nilay Vaish
On 2010-06-07 20:11:13, Nilay Vaish wrote: 1. Should we use resize() or should we use reserve() for setting the capacity of a vector? Especially during initialization, reserve() might be faster since it does not initialize the allocated memory where as resize() carries out some

Re: [m5-dev] Review Request: ruby: get rid of the Map class

2010-06-09 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/23/#review41 --- Ship it! Looks fine to me. - Nilay On 2010-06-02 15:56:45, Nathan

Re: [m5-dev] Review Request: ruby: get rid of the Map class

2010-06-09 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/23/#review42 --- Ship it! Looks fine to me. - Nilay On 2010-06-02 15:56:45, Nathan

Re: [m5-dev] Review Request: ruby: get rid of PrioHeap and use STL

2010-06-09 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/24/#review43 --- Ship it! Looks good. - Nilay On 2010-06-02 15:56:55, Nathan Binkert

Re: [m5-dev] Review Request: ruby: get rid of Vector and use STL

2010-06-10 Thread Nilay Vaish
On 2010-06-07 20:11:13, Nilay Vaish wrote: 1. Should we use resize() or should we use reserve() for setting the capacity of a vector? Especially during initialization, reserve() might be faster since it does not initialize the allocated memory where as resize() carries out some

Re: [m5-dev] Review Request: ruby: get rid of RefCnt and Allocator stuff use base/refcnt.hh

2010-06-10 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/21/#review44 --- Ship it! - Nilay On 2010-06-02 15:56:26, Nathan Binkert wrote:

[m5-dev] Ruby Todo List

2010-06-13 Thread Nilay Vaish
What's next on the TODO list for Ruby? -- Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev

Re: [m5-dev] Ruby Todo List

2010-06-17 Thread Nilay Vaish
infrastructure and stats output file. ...Of course there is the Bochs work as well, but that isn't necessarily Ruby related. Others, please feel free to add to the list. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Vaish

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-19 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277/ --- (Updated 2010-10-19 17:30:48.985205) Review request for Default and Ruby

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-22 Thread Nilay Vaish
://reviews.m5sim.org/r/277/#review398 --- On 2010-10-19 17:30:48, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-22 Thread Nilay Vaish
://reviews.m5sim.org/r/277/#review399 --- On 2010-10-19 17:30:48, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-23 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277/#review398 --- On 2010-10-19 17:30:48, Nilay Vaish wrote: --- This is an automatically generated e

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-23 Thread Nilay Vaish
probably isn't the format string you want (basically it's just like printf, so you probably mean %s). Nilay Vaish wrote: The DPRINTF statements that appear in .sm files are re-written by the SLICC compiler. SLICC compiler provides the trace flag. Looking at the format specifier, the compiler

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-24 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277/ --- (Updated 2010-10-24 08:59:56.664764) Review request for Default and Ruby

Re: [m5-dev] Review Request: Moving Ruby to M5's debug print support

2010-10-25 Thread Nilay Vaish
--- On 2010-10-24 08:59:56, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277

[m5-dev] Implementation of findTagInSet

2010-11-02 Thread Nilay Vaish
did you arrive at the conclusion that findTagInSet() is a problem? What benchmarks, profiling tools to use? Thanks Nilay -- Forwarded message -- Date: Mon, 20 Sep 2010 22:57:39 -0500 From: Beckmann, Brad brad.beckm...@amd.com To: 'Nilay Vaish' ni...@cs.wisc.edu Cc: Daniel Gibson

Re: [m5-dev] Implementation of findTagInSet

2010-11-03 Thread Nilay Vaish
). If you've never used gprof before, this is a great time to learn! Steve On Tue, Nov 2, 2010 at 10:40 AM, Nilay Vaish ni...@cs.wisc.edu wrote: I am looking at possible performance optimizations in Ruby. As you can see grasp from the mail excerpt below, the function findTagInSet() consumes lots

Re: [m5-dev] Implementation of findTagInSet

2010-11-04 Thread Nilay Vaish
I tried running ruby_fs.py, below is the error message that I received. I don't think there is any documentation or mailing list discussion on how to run ruby_fs.py. To me it seems that some parameter relating to the DMA controller is missing from the command I tried out. -- Nilay

Re: [m5-dev] Implementation of findTagInSet

2010-11-05 Thread Nilay Vaish
I ran ALPHA_FS_MOESI_hammer using the following command -- ./build/ALPHA_FS_MOESI_hammer/m5.prof ./configs/example/ruby_fs.py I don't know how the benchmark is picked in case none is specified. Below is the gprof output -- % cumulative self self total time seconds

Re: [m5-dev] Implementation of findTagInSet

2010-11-05 Thread Nilay Vaish
to figure out how much time is spent in functions that get called from isTagPresent. If it's not specifically calling out findTagInSet, it may be because it's inlined in isTagPresent. Steve On Fri, Nov 5, 2010 at 7:58 AM, Nilay Vaish ni...@cs.wisc.edu wrote: I ran ALPHA_FS_MOESI_hammer using

Re: [m5-dev] Implementation of findTagInSet

2010-11-05 Thread Nilay Vaish
On Fri, 5 Nov 2010, Nilay Vaish wrote: Do you know what hash function is in use? Seems to me that the default hash function is to hash to self. May be we should test with a different hash function. -- Nilay On Fri, 5 Nov 2010, Steve Reinhardt wrote: You can look at the call graph profile

Re: [m5-dev] Implementation of findTagInSet

2010-11-07 Thread Nilay Vaish
I went through the implementation of hash_map in C++. I realized that the number of buckets get resized on the fly as the number of elements increase. This means that we would have more than num_of_cache_sets * num_ways buckets in the hash table. -- Nilay On Sat, 6 Nov 2010, Nilay Vaish

Re: [m5-dev] Implementation of findTagInSet

2010-11-12 Thread Nilay Vaish
and compares to match the tags). If we reorder the tags to search the MRU block first then we will probabilistically keep the average number of tags searched well below N. Steve On Fri, Nov 5, 2010 at 9:27 AM, Nilay Vaish ni...@cs.wisc.edu wrote: I had another look at the profile output

Re: [m5-dev] Implementation of findTagInSet

2010-11-16 Thread Nilay Vaish
. In order to reduce the number of calls made to tag lookup, I would need to read about the protocol itself. Can you point some documentation on MOESI_hammer protocol? -- Nilay On Fri, 12 Nov 2010, Steve Reinhardt wrote: On Fri, Nov 12, 2010 at 1:10 PM, Nilay Vaish ni...@cs.wisc.edu wrote

Re: [m5-dev] Implementation of findTagInSet

2010-11-16 Thread Nilay Vaish
On Fri, 12 Nov 2010, Steve Reinhardt wrote: Right now I am profiling with coherence protocol as MOESI_hammer. I am thinking of profiling using a different protocol to make sure that it is not an artifact of the protocol in use. That sounds like a good idea. All in all, we would ideally

Re: [m5-dev] Implementation of findTagInSet

2010-11-16 Thread Nilay Vaish
or false), getCacheEntry(address) is called. Surprisingly, the getCacheEntry() function calls the isTagPresent() function again. These calls are in the file src/mem/protocol/MOESI_hammer-cache.sm Thanks Nilay On Tue, 16 Nov 2010, Nilay Vaish wrote: I profiled M5 using MOESI_CMP_directory

Re: [m5-dev] Implementation of findTagInSet

2010-11-23 Thread Nilay Vaish
hope that doesn't lead to any coherence problems with the block changing out from under this cached copy... if so, perhaps an additional block check is required on hits. Steve On Tue, Nov 16, 2010 at 3:17 PM, Nilay Vaish ni...@cs.wisc.edu wrote: I was looking at the MOESI hammer protocol. I think

Re: [m5-dev] Implementation of findTagInSet

2010-11-25 Thread Nilay Vaish
2010, Nilay Vaish wrote: Brad and I will be having a discussion today on how to resolve this issue. -- Nilay On Tue, 23 Nov 2010, Steve Reinhardt wrote: Thanks for tracking that down; that confirms my suspicions. I think the long-term answer is that the system needs to be reworked to avoid

Re: [m5-dev] Implementation of findTagInSet

2010-11-26 Thread Nilay Vaish
m_cache_assoc; int m_start_index_bit; + +Address m_mru_address; +int m_mru_tag_index; + bool m_valid_mru_address; }; #endif // __MEM_RUBY_SYSTEM_CACHEMEMORY_HH__ On Thu, 25 Nov 2010, Nilay Vaish wrote: Brad and I had a discussion on Tuesday. We are still thinking how

Re: [m5-dev] Implementation of findTagInSet

2010-11-27 Thread Nilay Vaish
of the function calls. Steve On Fri, Nov 26, 2010 at 9:37 AM, Nilay Vaish ni...@cs.wisc.edu wrote: I profiled the un-modified and the modified m5 ten times (this time there was no load on the machine). Here are the average results: % time std. dev actual time std. dev un

Re: [m5-dev] Implementation of findTagInSet

2010-11-27 Thread Nilay Vaish
Is it not possible to redesign the functions to accept CacheEntry as a paramemter instead of a Address parameter? On Sat, 27 Nov 2010, Nilay Vaish wrote: I conducted an experiment to figure out how many calls are made to the hash table to check if the given address exists in the cache

Re: [m5-dev] Implementation of findTagInSet

2010-11-30 Thread Nilay Vaish
. I have a few other things I need to take care of first, but I may be able to look into the details of how to make this work by the end of the week. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Vaish Sent: Saturday

[m5-dev] changeset in m5: ruby: Converted old ruby debug calls to M5 debu...

2010-12-01 Thread Nilay Vaish
changeset 42da07116e12 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=42da07116e12 description: ruby: Converted old ruby debug calls to M5 debug calls This patch developed by Nilay Vaish converts all the old GEMS-style ruby debug calls

[m5-dev] Review Board error

2010-12-01 Thread Nilay Vaish
I was trying to create a new review request. On pressing the 'Create Review Request' button, I receive the following error. Something broke! (Error 500) It appears something broke when you tried to go to here. This is either a bug in Review Board or a server configuration error. Please report

Re: [m5-dev] Review Board error

2010-12-01 Thread Nilay Vaish
squashed. Gabe Nilay Vaish wrote: I was trying to create a new review request. On pressing the 'Create Review Request' button, I receive the following error. Something broke! (Error 500) It appears something broke when you tried to go to here. This is either a bug in Review Board or a server

Re: [m5-dev] Review Board error

2010-12-02 Thread Nilay Vaish
I tried again, but I still receive the same error. Nilay On Wed, 1 Dec 2010, Ali Saidi wrote: You might have just hit some issue. Try again. Ali On Dec 1, 2010, at 6:10 PM, Nilay Vaish wrote: Ali had updated the review board some time back. May be something was not correctly configured

Re: [m5-dev] Review Board error

2010-12-02 Thread Nilay Vaish
everything we're doing that works just fine? Ali On Thu, 2 Dec 2010 06:06:28 -0600 (CST), Nilay Vaish ni...@cs.wisc.edu wrote: I tried again, but I still receive the same error. Nilay On Wed, 1 Dec 2010, Ali Saidi wrote: You might have just hit some issue. Try again. Ali On Dec 1, 2010, at 6

Re: [m5-dev] Review Board error

2010-12-02 Thread Nilay Vaish
On Thu, 2 Dec 2010 13:09:45 -0600 (CST), Nilay Vaish ni...@cs.wisc.edu wrote: I click on the New Review Request button. Then, I click the browse button to supply the path of the diff file. After that when I press the Create Review Request button, I get the error I mentioned. I think the problem

[m5-dev] Review Request: NDEBUG for Ruby Assert statement

2010-12-02 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/337/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan

Re: [m5-dev] Review Request: NDEBUG for Ruby Assert statement

2010-12-02 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/337/ --- (Updated 2010-12-02 20:35:31.660861) Review request for Default. Summary ---

Re: [m5-dev] Implementation of findTagInSet

2010-12-03 Thread Nilay Vaish
has a valid state, then it is used. Else the state of the cache entry is looked and used if valid. Nilay On Tue, 30 Nov 2010, Nilay Vaish wrote: Is it possible to have variables local to a function in .sm files. I am thinking of storing getCacheEntry()'s return value in a local variable

Re: [m5-dev] Review Request: NDEBUG for Ruby Assert statement

2010-12-06 Thread Nilay Vaish
--- On 2010-12-02 20:35:31, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/337/ --- (Updated 2010-12-02 20:35:31

Re: [m5-dev] Implementation of findTagInSet

2010-12-07 Thread Nilay Vaish
I have made changes to SLICC to support local reference variables. I think we should reference variables in functions where back to back calls are made to lookup/getCacheEntry functions. Overall, I am still unclear how can we handle this issue. Nilay On Tue, 30 Nov 2010, Nilay Vaish wrote

Re: [m5-dev] Review Request: NDEBUG for Ruby Assert statement

2010-12-07 Thread Nilay Vaish
://reviews.m5sim.org/r/337/#review509 --- Ship it! Looks good to me. - Brad On 2010-12-02 20:35:31, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit

Re: [m5-dev] Implementation of findTagInSet

2010-12-07 Thread Nilay Vaish
this over a phone conversation. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Vaish Sent: Tuesday, December 07, 2010 12:16 AM To: M5 Developer List Subject: Re: [m5-dev] Implementation of findTagInSet I have made changes to SLICC

Re: [m5-dev] Implementation of findTagInSet

2010-12-08 Thread Nilay Vaish
really straight forward. Let's think it over some more and let me know if you want to discuss this in more detail over-the-phone. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Vaish Sent: Tuesday, December 07, 2010 5:21 PM To: M5

[m5-dev] Review Request: Replaces WARN and ERROR statements in Ruby with warn(), panic() and fatal()

2010-12-08 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/336/ --- Review request for Default. Summary --- This patch removes the WARN_* and

Re: [m5-dev] Implementation of findTagInSet

2010-12-09 Thread Nilay Vaish
to the end or removed entirely. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Vaish Sent: Wednesday, December 08, 2010 11:53 AM To: M5 Developer List Subject: Re: [m5-dev] Implementation of findTagInSet Hi Brad, A couple

Re: [m5-dev] Implementation of findTagInSet

2010-12-09 Thread Nilay Vaish
It works perfectly. Thanks! Nilay On Thu, 9 Dec 2010, Beckmann, Brad wrote: Hi Nilay, Yes, I believe a machine can be accessed within AST class functions, though I don't remember ever doing it myself. Look at the generate() function in TypeFieldEnumAST. Here you see that the machine

Re: [m5-dev] Implementation of findTagInSet

2010-12-11 Thread Nilay Vaish
Brad We would need to change the lookup functions for TBETable and CacheMemory. Currently the lookup functions assume that the address passed on to the lookup is present. This requires two lookups to the data structures associated with these classes, one for checking whether the address is in

Re: [m5-dev] Implementation of findTagInSet

2010-12-12 Thread Nilay Vaish
Brad, in case you want to have look at the changes that I made so far, I have attached the patch with this mail. On Sun, 12 Dec 2010, Nilay Vaish wrote: Hi Brad, I have added implicit variables for TBE and Cache entry pointers. These get inserted in to the doTransition() calls made

Re: [m5-dev] Review Request: Replace WARN and ERROR statements in Ruby

2010-12-17 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/336/ --- (Updated 2010-12-17 17:38:11.53) Review request for Default. Summary

Re: [m5-dev] Review Request: Replace WARN and ERROR statements in Ruby

2010-12-19 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/336/ --- (Updated 2010-12-19 12:02:55.605887) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Replace WARN and ERROR statements in Ruby

2010-12-19 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/336/#review540 --- On 2010-12-19 12:02:55, Nilay Vaish wrote

Re: [m5-dev] Implementation of findTagInSet

2010-12-19 Thread Nilay Vaish
Brad I have tested the changes that I made to files relating to SLICC and MESI_CMP_directory protocol. I see a 90% decrease in the number of calls to isTagPresent() when I run m5.prof for 200,000,000,000 ticks using configs/examples/ruby_fs.py. Thanks Nilay On Fri, 17 Dec 2010, Nilay

Re: [m5-dev] Implementation of findTagInSet (fwd)

2010-12-20 Thread Nilay Vaish
These profile results from testing ALPHA_FS_MESI_CMP_directory with configs/example/ruby_fs.py. The simulation was allowed to run for 200,000,000,000 ticks. Profile Result with unmodified SLICC % cumulative self self total time seconds secondscalls s/call

Re: [m5-dev] Implementation of findTagInSet (fwd)

2010-12-20 Thread Nilay Vaish
that seems high. Thanks, Steve On Mon, Dec 20, 2010 at 9:47 AM, Nilay Vaish ni...@cs.wisc.edu wrote: These profile results from testing ALPHA_FS_MESI_CMP_directory with configs/example/ruby_fs.py. The simulation was allowed to run for 200,000,000,000 ticks. Profile Result with unmodified

Re: [m5-dev] Review Request: Replace WARN and ERROR statements in Ruby

2010-12-21 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/336/ --- (Updated 2010-12-21 04:31:14.033111) Review request for Default. Changes ---

[m5-dev] Review board

2010-12-21 Thread Nilay Vaish
How do you make reviewboard accept two review requests A and B where both A and B make changes to some common files? -- Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev

Re: [m5-dev] Deadlock while running ruby_random_test.py

2010-12-21 Thread Nilay Vaish
[mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Vaish Sent: Tuesday, December 21, 2010 1:04 PM To: m5-dev@m5sim.org Subject: [m5-dev] Deadlock while running ruby_random_test.py I am running ALPHA_SE_MESI_CMP_directory with ruby_random_test.py. I supply the option -l as 2000. I have pasted

Re: [m5-dev] Review Request: Replace WARN and ERROR statements in Ruby

2010-12-21 Thread Nilay Vaish
21st, 2010, 4:31 a.m., Nilay Vaish wrote: Review request for Default. By Nilay Vaish. *Updated 2010-12-21 04:31:14* Description This patch removes the WARN_* and ERROR_* from src/mem/ruby/common/Debug.hh file. These statements have been replaced with warn(), panic() and fatal() defined in src

[m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2010-12-22 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/358/ --- Review request for Default. Summary --- The purpose of this patch is to

Re: [m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2010-12-22 Thread Nilay Vaish
the changes. -- Nilay - Nilay --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/358/#review570 --- On 2010-12-22 14:21:09, Nilay Vaish wrote

[m5-dev] Review Request: Updating MOESI CMP Directory protocol as per the new interface

2010-12-22 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/359/ --- Review request for Default. Summary --- This is a request for reviewing the

[m5-dev] changeset in m5: This patch removes the WARN_* and ERROR_* from ...

2010-12-22 Thread Nilay Vaish
changeset f249937228b5 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=f249937228b5 description: This patch removes the WARN_* and ERROR_* from src/mem/ruby/common/Debug.hh file. These statements have been replaced with warn(), panic() and fatal() defined in

Re: [m5-dev] Cron m5t...@zizzer /z/m5/regression/do-regression quick

2010-12-23 Thread Nilay Vaish
I am looking in to why the tests failed. -- Nilay On Thu, 23 Dec 2010, Cron Daemon wrote: scons: *** [build/ALPHA_SE_MOESI_CMP_directory/mem/protocol/L2Cache_changePermission.fo] Error 1 scons: *** [build/ALPHA_SE_MOESI_CMP_directory/mem/protocol/L2Cache_Controller.fo] Error 1 scons: ***

Re: [m5-dev] Cron m5t...@zizzer /z/m5/regression/do-regression quick

2010-12-23 Thread Nilay Vaish
to compile m5.fast. Things are compiled differently in m5.debug/m5.opt and m5.fast Nate On Thu, Dec 23, 2010 at 6:52 AM, Nilay Vaish ni...@cs.wisc.edu wrote: I am looking in to why the tests failed. -- Nilay On Thu, 23 Dec 2010, Cron Daemon wrote: scons: *** [build

Re: [m5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2010-12-23 Thread Nilay Vaish
If you're not seeing that with any of the builds, maybe you're using a different gcc version... zizzer has 4.2.4. Or maybe something's just messed up on zizzer... let me know if you think those errors are bogus. Steve On Thu, Dec 23, 2010 at 7:36 AM, Nilay Vaish ni...@cs.wisc.edu wrote: I ran

Re: [m5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2010-12-23 Thread Nilay Vaish
Steve, you had commented that panic() and fatal() are marked as no return. Then, why should these warnings appear? And why would the compiler be fine with ERROR_MSG? -- Nilay On Thu, 23 Dec 2010, Nilay Vaish wrote: I am using GCC 4.4, I never see any of these warnings. Let me try with 4.2.4

Re: [m5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2010-12-23 Thread Nilay Vaish
. That's just speculation on my part though. Does anyone else have any experience with this? Does the error go away on 4.2.4 if you put the dead 'return' statement back in the particular place that it's complaining about? Steve On Thu, Dec 23, 2010 at 8:12 AM, Nilay Vaish ni...@cs.wisc.edu wrote

Re: [m5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2010-12-23 Thread Nilay Vaish
is present in the cache @@ -167,6 +168,7 @@ PerfectCacheMemoryENTRY::cacheProbe(const Address newAddress) const { panic(cacheProbe called in perfect cache); +return newAddress; } // looks an address up in the cache On Thu, 23 Dec 2010, Nilay Vaish wrote: I do not have GCC 4.2.4

[m5-dev] changeset in m5: PerfectCacheMemory: Add return statements to tw...

2010-12-23 Thread Nilay Vaish
changeset fbf4b1b18202 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=fbf4b1b18202 description: PerfectCacheMemory: Add return statements to two functions. Two functions in src/mem/ruby/system/PerfectCacheMemory.hh, tryCacheAccess() and cacheProbe(),

Re: [m5-dev] changeset in m5: PerfectCacheMemory: Add return statements to tw...

2010-12-23 Thread Nilay Vaish
. As a stop gap, I guess this is OK, but this really is not the right fix. Nate On Thu, Dec 23, 2010 at 11:41 AM, Nilay Vaish ni...@cs.wisc.edu wrote: changeset fbf4b1b18202 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=fbf4b1b18202 description:        PerfectCacheMemory: Add

Re: [m5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2010-12-24 Thread Nilay Vaish
powered device On Dec 23, 2010, at 1:10 PM, Nilay Vaish ni...@cs.wisc.edu wrote: I am able to reproduce the warning. But I have to compile the files on my own (as in, write the compilation command on the command line) in order to reproduce the warning. This is the proposed patch. -- Nilay diff

[m5-dev] Review Request: Updates MI cache coherence protocol

2010-12-24 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/335/ --- Review request for Default. Summary --- This is a review request for the

Re: [m5-dev] Review Request: Updating MOESI CMP Directory protocol as per the new interface

2010-12-24 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/359/ --- (Updated 2010-12-24 09:02:20.653744) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2010-12-24 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/358/ --- (Updated 2010-12-24 09:04:02.816498) Review request for Default. Changes ---

[m5-dev] Review Request: Add seed option to ruby_random_test.py

2010-12-29 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/361/ --- Review request for Default. Summary --- This patch adds an option to the

[m5-dev] floorLog2()

2010-12-30 Thread Nilay Vaish
I was looking at the implementation of floorLog2() in src/base/intmath.hh. I think this implementation is not the best that can be done. We should use a GCC builtin __builtin_clz* to implement these functions. I have not carried out any test to get the execution times for two different

Re: [m5-dev] floorLog2()

2010-12-30 Thread Nilay Vaish
On Thu, 30 Dec 2010, nathan binkert wrote: I was looking at the implementation of floorLog2() in src/base/intmath.hh. I think this implementation is not the best that can be done. We should use a GCC builtin __builtin_clz* to implement these functions. I have not carried out any test to get

[m5-dev] Review Request: Ruby: Update MOESI Hammer protocol

2010-12-31 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/280/ --- Review request for Default. Summary --- This request is for reviewing the

Re: [m5-dev] Review Request: Ruby: Update MOESI Hammer protocol

2010-12-31 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/280/ --- (Updated 2010-12-31 17:26:11.666038) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Updates MI cache coherence protocol

2010-12-31 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/335/ --- (Updated 2010-12-31 17:28:19.882643) Review request for Default. Changes ---

[m5-dev] Review Request: Ruby: Update MOESI CMP token protocol

2010-12-31 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/326/ --- Review request for Default. Summary --- This request for reviewing the

Re: [m5-dev] Review Request: Updating MOESI CMP Directory protocol as per the new interface

2010-12-31 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/359/ --- (Updated 2010-12-31 17:35:16.274524) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2010-12-31 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/358/ --- (Updated 2010-12-31 17:50:59.779517) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Add seed option to ruby_random_test.py

2011-01-03 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/361/ --- (Updated 2011-01-03 09:54:30.940063) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Ruby: Update MOESI CMP token protocol

2011-01-03 Thread Nilay Vaish
. To reply, visit: http://reviews.m5sim.org/r/326/#review588 --- On 2010-12-31 17:33:04, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http

[m5-dev] changeset in m5: Ruby: Add option for random seed to Ruby.py

2011-01-03 Thread Nilay Vaish
changeset 9d94b886c61b in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=9d94b886c61b description: Ruby: Add option for random seed to Ruby.py This patch adds an option to the script Ruby.py for setting the parameter m_random_seed used for randomizing

Re: [m5-dev] Review Request: Updates MI cache coherence protocol

2011-01-03 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/335/#review589 --- On 2010-12-31 17:28:19, Nilay Vaish wrote

Re: [m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2011-01-03 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/358/ --- (Updated 2011-01-03 14:18:13.801375) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Updating MOESI CMP Directory protocol as per the new interface

2011-01-03 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/359/ --- (Updated 2011-01-03 14:20:22.706038) Review request for Default. Changes ---

Re: [m5-dev] Review Request: Ruby: Update MOESI CMP token protocol

2011-01-03 Thread Nilay Vaish
unwieldy and also seem to cause a lot of redundant testing. Can we factor out the check so we have a single test to set one valid entry_ptr variable, then use that in all these calls? I see there are some similar calls in MOESI_CMP_directory too, though not as many. Nilay Vaish wrote

Re: [m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2011-01-04 Thread Nilay Vaish
-03 14:18:13, Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/358/ --- (Updated 2011-01-03 14:18:13) Review

[m5-dev] Fixing MESI CMP directory protocol

2011-01-04 Thread Nilay Vaish
What threshold do you use? On Tue, 4 Jan 2011, Arkaprava Basu wrote: Hi Nilay, On deadlock issue with MESI_CMP_directory : Yes, this can happen as ruby_tester or Sequencer only reports *possible* deadlocks. With higher number of processors there is more contention (and thus latency)

Re: [m5-dev] Review Request: Changing how CacheMemory interfaces with SLICC

2011-01-04 Thread Nilay Vaish
Brad Is there a reason why each action name follows the pattern combination of several letters_action performed by the action? The letters used are not abbreviations of the action performed. Can we use any combination? Thanks Nilay On Tue, 4 Jan 2011, Beckmann, Brad wrote: Hi Nilay, My

[m5-dev] Review Request: Hammer protocol: Change how data to copied from L1 to L2 cache and vice-versa

2011-01-04 Thread Nilay Vaish
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/334/ --- Review request for Default. Summary --- This patch changes the manner in

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