[gem5-dev] Review Request: sparc: init. cache state in TLB

2011-06-08 Thread Korey Sewell 

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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan 
Binkert.


Summary
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sparc: init. cache state in TLB
valgrind complains and its a potential source of instability, so go ahead
and set it to 0 to start


Diffs
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  src/arch/sparc/tlb.cc 77d12d8f7971 

Diff: http://reviews.m5sim.org/r/739/diff


Testing
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Thanks,

Korey

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Re: [gem5-dev] Review Request: sparc: init. cache state in TLB

2011-06-08 Thread Gabe Black 

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Ship it!


- Gabe


On 2011-06-08 22:48:14, Korey Sewell wrote:
 
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 http://reviews.m5sim.org/r/739/
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 (Updated 2011-06-08 22:48:14)
 
 
 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.
 
 
 Summary
 ---
 
 sparc: init. cache state in TLB
 valgrind complains and its a potential source of instability, so go ahead
 and set it to 0 to start
 
 
 Diffs
 -
 
   src/arch/sparc/tlb.cc 77d12d8f7971 
 
 Diff: http://reviews.m5sim.org/r/739/diff
 
 
 Testing
 ---
 
 
 Thanks,
 
 Korey
 


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