changeset ce8b9a250021 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=ce8b9a250021
description:
o3: missing newlines on some dprintfs
diffstat:
src/cpu/o3/commit_impl.hh | 4 ++--
src/cpu/o3/fetch_impl.hh | 2 +-
src/cpu/o3/lsq_impl.hh | 6 +++---
src/cpu/o3/rename_map.cc | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diffs (84 lines):
diff -r 9bb24e6edc35 -r ce8b9a250021 src/cpu/o3/commit_impl.hh
--- a/src/cpu/o3/commit_impl.hh Fri Jun 10 22:15:32 2011 -0400
+++ b/src/cpu/o3/commit_impl.hh Fri Jun 10 22:15:32 2011 -0400
@@ -118,7 +118,7 @@
if (policy == "aggressive"){
commitPolicy = Aggressive;
- DPRINTF(Commit,"Commit Policy set to Aggressive.");
+ DPRINTF(Commit,"Commit Policy set to Aggressive.\n");
} else if (policy == "roundrobin"){
commitPolicy = RoundRobin;
@@ -127,7 +127,7 @@
priority_list.push_back(tid);
}
- DPRINTF(Commit,"Commit Policy set to Round Robin.");
+ DPRINTF(Commit,"Commit Policy set to Round Robin.\n");
} else if (policy == "oldestready"){
commitPolicy = OldestReady;
diff -r 9bb24e6edc35 -r ce8b9a250021 src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh Fri Jun 10 22:15:32 2011 -0400
+++ b/src/cpu/o3/fetch_impl.hh Fri Jun 10 22:15:32 2011 -0400
@@ -90,7 +90,7 @@
DefaultFetch<Impl>::IcachePort::recvFunctional(PacketPtr pkt)
{
DPRINTF(Fetch, "DefaultFetch doesn't update its state from a "
- "functional call.");
+ "functional call.\n");
}
template<class Impl>
diff -r 9bb24e6edc35 -r ce8b9a250021 src/cpu/o3/lsq_impl.hh
--- a/src/cpu/o3/lsq_impl.hh Fri Jun 10 22:15:32 2011 -0400
+++ b/src/cpu/o3/lsq_impl.hh Fri Jun 10 22:15:32 2011 -0400
@@ -65,7 +65,7 @@
void
LSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt)
{
- DPRINTF(LSQ, "LSQ doesn't update things on a recvFunctional.");
+ DPRINTF(LSQ, "LSQ doesn't update things on a recvFunctional.\n");
}
template <class Impl>
@@ -151,7 +151,7 @@
maxSQEntries = SQEntries / numThreads;
DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: "
- "%i entries per LQ | %i entries per SQ",
+ "%i entries per LQ | %i entries per SQ\n",
maxLQEntries,maxSQEntries);
} else if (policy == "threshold") {
lsqPolicy = Threshold;
@@ -166,7 +166,7 @@
maxSQEntries = params->smtLSQThreshold;
DPRINTF(LSQ, "LSQ sharing policy set to Threshold: "
- "%i entries per LQ | %i entries per SQ",
+ "%i entries per LQ | %i entries per SQ\n",
maxLQEntries,maxSQEntries);
} else {
assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic,"
diff -r 9bb24e6edc35 -r ce8b9a250021 src/cpu/o3/rename_map.cc
--- a/src/cpu/o3/rename_map.cc Fri Jun 10 22:15:32 2011 -0400
+++ b/src/cpu/o3/rename_map.cc Fri Jun 10 22:15:32 2011 -0400
@@ -88,7 +88,7 @@
floatRenameMap.resize(numLogicalRegs);
if (bindRegs) {
- DPRINTF(Rename, "Binding registers into rename map %i",id);
+ DPRINTF(Rename, "Binding registers into rename map %i\n",id);
// Initialize the entries in the integer rename map to point to the
// physical registers of the same index
@@ -108,7 +108,7 @@
floatRenameMap[index].physical_reg = freg_idx++;
}
} else {
- DPRINTF(Rename, "Binding registers into rename map %i",id);
+ DPRINTF(Rename, "Binding registers into rename map %i\n",id);
PhysRegIndex temp_ireg = ireg_idx;
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