Re: [gem5-users] Question on coded memory performance simulation using Gem5

2018-02-26 Thread Venkata Yaswanth Raparti
If you have the latency model for coding schemes, it should be possible integrated into the memory model. I think gem5 has plugins to integrate systemC based main memory simulators to it. On Mon, Feb 26, 2018 at 1:07 PM, Jack Huang wrote: > I wanted to compare generic performances of several c

Re: [gem5-users] Question on coded memory performance simulation using Gem5

2018-02-26 Thread Jack Huang
I wanted to compare generic performances of several coding schemes (redundancies for reliability) for main memory write operations. Best, Jack On Mon, Feb 26, 2018 at 2:41 PM, Venkata Yaswanth Raparti < yaswa...@rams.colostate.edu> wrote: > Did you mean that you wanted to have your own main memo

Re: [gem5-users] Question on coded memory performance simulation using Gem5

2018-02-26 Thread Venkata Yaswanth Raparti
Did you mean that you wanted to have your own main memory performance model integrated into gem5? On Mon, Feb 26, 2018 at 10:03 AM, Jack Huang wrote: > Hello, > > Is is possible to simulate coded main memory performance using Gem5? > Thanks. > > Best regard, > Jack >

Re: [gem5-users] Errors building on Ubuntu 17.10

2018-02-26 Thread Jason Lowe-Power
Hi Paul, It's in my brain, why don't other know this automatically ;). ARM works well with all of the CPU models and the classic caches. There are limited cases where ARM works with Ruby. To find out what ARM+Ruby is supported I would look back through the commit log to see which protocols have b

[gem5-users] Question on coded memory performance simulation using Gem5

2018-02-26 Thread Jack Huang
Hello, Is is possible to simulate coded main memory performance using Gem5? Thanks. Best regard, Jack ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users