Hi Gabe,
I wrote this implementation for the frndint macroop:
*def macroop FRNDINT {cvtf_d2i st(0), st(0)};*
However, when I run the application using this instruction on gem5, I seem
to get this error:* gem5.opt: build/X86/cpu/simple_thread.hh:251: RegVal
SimpleThread::readIntReg(int):
This should be now fixed. I just merged
https://gem5-review.googlesource.com/c/public/gem5/+/17828
Cheers,
Jason
On Tue, Mar 19, 2019 at 5:52 AM Nikos Nikoleris
wrote:
> Have a look at the discussion here [1], you might be running into the
> same issue. However, the patch is not ready yet, I
Hi
I am new to gem5. I have simulated a High Performance In-order ARM CPU model in
FS mode. I want Hardware Transactional Memory support with the system so as to
run STAMP benchmarks on it. The processor may not necessarily be ARM. I can go
for x86 as well.
Regards.
