Thank you for your help!
-Chang Hyun Park
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Hi Abhishek,
Regarding to the git error, you’ll need to “git commit” the changes in the
git repos that you created.
Using celery is not required, but it is useful to manage a large amount of
gem5art runs. You might find these links helpful,
- What is task/celery?
Hi Hao,
I followed all git commands and I get the following error:
(gem5art-env) abs218@comparchT640:~/gem5art_fs/spec2017-experiments$
python3 launch_spec2017_experiments.py
*fatal: your current branch 'master' does not have any commits yet*Traceback
(most recent call last):
File
Hi,
I do not understand how it will be different, is it anyway using my host
machine library?
When I mount the image, the binaries are present in "/usr" as you mentioned.
Also is this sed command correct? sed -i
"s/\/opt\/rh\/devtoolset-7\/root\/usr/\/usr/g"
Hi Hoa,
I mounted the spec image and found that in file "myconfig.x86.cfg" file
which is used to compile spec benchmarks have this gcc linking to
"/SW/compilers/GCC/Linux/x86_64/gcc-6.3.0"
Did you guys use this "myconfig.x86.cfg" file in the result shown on the "
I mounted the image and there was no SW folder
On Tue, Mar 3, 2020 at 8:42 PM Hoa Nguyen wrote:
> Hi,
>
> I'm not sure where is the error, but I would look into why the path to gcc
> is "/SW/compilers/GCC/Linux/x86_64/gcc-6.3.0/bin/gcc".
>
> Regards,
> Hoa Nguyen
>
> On Tue, Mar 3, 2020, 5:28
Hi,
I'm not sure where is the error, but I would look into why the path to gcc
is "/SW/compilers/GCC/Linux/x86_64/gcc-6.3.0/bin/gcc".
Regards,
Hoa Nguyen
On Tue, Mar 3, 2020, 5:28 PM Abhishek Singh
wrote:
> Hi Hoa,
>
> For now, I will try to get a single-core.
>
> In Building the Disk Image
Hi Hoa,
For now, I will try to get a single-core.
In Building the Disk Image Step, I get an error in compiling spec
benchmarks in the image i.e., after this command ./packer build
spec2017/spec2017.json
I have posted the long error message, I also looked into most of the
make.out the file, the
Hi Abhishek,
Yes, but the gem5 config only has one-core O3CPU. It could be tweaked to
multiple cores.
Regards,
Hoa Nguyen
On Tue, Mar 3, 2020, 3:48 PM Abhishek Singh
wrote:
> Hi,
>
> In order to run SPEC2k17 benchmarks, should we follow the same tutorial "
>
Hi,
In order to run SPEC2k17 benchmarks, should we follow the same tutorial "
https://gem5art.readthedocs.io/en/latest/tutorials/spec2017-tutorial.html;?
Best regards,
Abhishek
On Tue, Mar 3, 2020 at 6:45 PM Hoa Nguyen wrote:
> Hi Abhishek,
>
> We ran a few spec2017 workloads on O3CPU, and
Hi Abhishek,
We ran a few spec2017 workloads on O3CPU, and they ran successfully.
We used gem5 19.
Regards,
Hoa Nguyen
On 3/3/20, Abhishek Singh wrote:
> Hi Hoa,
> Are you able to run on o3 cpu.
> Also, is it same gem5 commit as mentioned on the website?
>
> On Tue, Mar 3, 2020 at 4:35 AM Hoa
Hi Ayaz,
Thanks for getting back, I was able to solve this problem by using another
method.
Best regards,
Abhishek
On Tue, Mar 3, 2020 at 6:37 PM Ayaz Akram wrote:
> Hi Abhishek,
>
> By default, the root/.bashrc on this image has an m5 exit call and will
> lead to simulation termination
Hi Abhishek,
By default, the root/.bashrc on this image has an m5 exit call and will
lead to simulation termination after linux boot up. If you update the
.bashrc file by adding a m5 readfile, you should be able to use an rcS
script with this image. Please, refer to the following script on how to
Hi,
You are right about values of ports not being sensible.
Set the values depending on the architecture (coffee lake, skylake, etc)
Correct values of hardware components can be found in their manual
On Tue, Mar 3, 2020 at 5:32 PM Chang Hyun Park
wrote:
> Thank you, Abhishek for your reply.
>
Thank you, Abhishek for your reply.
(For some reason your mail didn't make it into my inbox).
The reason I brought the question up was because the other parameters
(ROB size, register file size, dispatch width, etc) look like sensible
values, but the cacheLoad/StorePorts just seemed way off.
And
Hello Everyone,
Does anyone has ported spec 2017 benchmarks to SE gem5?
If yes, can you share some steps?
Currently, I am trying FS from gem5art but having some error with the
scripts and I am trying to solve but FS mode according to gem5art, can be
used only with 1 CPU in o3 CPU mode with the
Hello Ayaz,
Can this image accept the rcS script provided using the Command line?
For example in this way:
./build/X86/gem5.opt
--outdir=/home/abs218/whisper_gem5_setup/gem5_latest/scalibility_chkpt/
--stats-file=scalibility_chkpt.simout --dump-config=scalibility_chkpt.ini
--redirect-stderr
Hi Hoa,
Are you able to run on o3 cpu.
Also, is it same gem5 commit as mentioned on the website?
On Tue, Mar 3, 2020 at 4:35 AM Hoa Nguyen wrote:
> Hi there,
>
> We're actually able to run SPEC 2017 workloads in FS mode using the
> gem5art's tutorial.
>
> The table should have been updated.
>
>
Hi,
If I understand your commands properly, I think you compile spec for
x86_64 but your image is for the arm architecture. You need to compile
spec for arm as well. You can try cross-compiling, using qemu to chroot
to an arm linux image and compile spec from there or take a look at the
Hi,
This fault depends on the benchmark. For some benchmarks this is
appearing early and for others this is appearing later on the execution.
Thank you for your reply, will have a look on your way to compile over Qemu.
Carlos
On 3/3/20 11:24, Dimitrios Chasapis wrote:
Hi Carlos,
Does
Which toolchain did you use?
Giacomo
From: gem5-users on behalf of Dimitrios Chasapis
Sent: 03 March 2020 10:24
To: gem5 users mailing list
Subject: Re: [gem5-users] [ARM se Ruby] Page fault with SPEC CPU 2006 for ARM
ISA
Hi Carlos,
Does this fault appear
Hi Carlos,
Does this fault appear early on in the execution? Have you tried
booting with 1 core, create a checkpoint and then when restoring from it
(basically skipping boot) you can have multiple cores. I had a similar
problem and this is how I solved it, but I am not sure it's the same
Hi there,
We're actually able to run SPEC 2017 workloads in FS mode using the
gem5art's tutorial.
The table should have been updated.
Sorry about the confusion!
Regards,
Hoa Nguyen
On Mon, Mar 2, 2020, 7:55 PM Abhishek Singh
wrote:
> Hi,
>
> This is the i got in past when I was trying to
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