[gem5-users] Re: Problem with gem5 memory latency

2020-06-17 Thread Jason Lowe-Power via gem5-users
Hi everyone, Just FYI, it's not the best practice to modify files in src/ (e.g., src/mem/cache/Cache.py) if you want to change a parameter. Those are *source* files. Everything in those files can be overridden in the *python configuration* files. You can simply change something in your config

[gem5-users] Re: Problem with gem5 memory latency

2020-06-17 Thread Muhammet Abdullah Soytürk via gem5-users
Hi Ahmed, You could either follow Abhishek's advice and use default configuration scripts (se.py or fs.py) or you can create your own script to manipulate those options. Writing your own configuration script is recommended (You can check this book to learn how to

[gem5-users] Re: Problem with gem5 memory latency

2020-06-17 Thread Abhishek Singh via gem5-users
Hey. You can change those parameters for classic cache in config/common/Caches.py For main memory search for python files in src/mem/ directory, mostly it’s DRAMCtlr.py file On Wed, Jun 17, 2020 at 4:00 PM ahmed khalil via gem5-users < gem5-users@gem5.org> wrote: > Hi, I am a beginner in gem5

[gem5-users] Problem with gem5 memory latency

2020-06-17 Thread ahmed khalil via gem5-users
Hi, I am a beginner in gem5 ,I want to change the memory and cache latency of the system simulated using gem5 , but iI didn't find a parameter in the options.py file to use .can you help me ? thanks Ahmed ___ gem5-users mailing list --

[gem5-users] Re: Address incrementing by 8 instead of 4 for int when SimpleMemory is configured as SPM

2020-06-17 Thread Muhammad Aamir Saeed via gem5-users
Here is the attached disassembly code, which has been generated by the -S flag of g++ https://drive.google.com/file/d/1xyuX3-f-JShikUzhPbXJ5VmRJjOX_K3K/view?usp=sharing On 17.06.2020 19:26, Eliot Moss via gem5-users wrote: Can you show us a disassembly of your compiled code? I am wondering

[gem5-users] Re: Address incrementing by 8 instead of 4 for int when SimpleMemory is configured as SPM

2020-06-17 Thread Eliot Moss via gem5-users
Can you show us a disassembly of your compiled code? I am wondering if the compiler may have been really smart and done 10 8-byte stores instead of 20 4-byte stores to copy data from a constant array ... Best - Eliot Moss ___ gem5-users mailing list

[gem5-users] Re: Address incrementing by 8 instead of 4 for int when SimpleMemory is configured as SPM

2020-06-17 Thread Muhammad Aamir via gem5-users
Hi Bobby, In my workload, am simply calling pointer++ once, but I do not know how it automatically increments as if I am calling pointer++ twice, here is an example of a very simple version of my workload which also provides the incorrect address reading int main() { // spm address starts

[gem5-users] Re: Address incrementing by 8 instead of 4 for int when SimpleMemory is configured as SPM

2020-06-17 Thread Bobby Bruce via gem5-users
Is the problem you are facing in the gem5 code or your guest-code running in the simulation? This looks to be a problem in the guest-code. You're calling pointer++ twice, which should, naturally, increment the address by 8. Based on this information, I do not know why the first incrementation

[gem5-users] Re: GCN3 GPU Simulation Start-Up Time

2020-06-17 Thread Daniel Gerzhoy via gem5-users
Hey Matt, Thanks for pushing those changes. I updated the head of the amd staging branch and tried to run square. The time to get into main stays about the same (5min) FYI. But the hipDeviceSynchronize() fails even when I add hipSetDeviceFlags(hipDeviceScheduleSpin); unfortunately. panic:

[gem5-users] Address incrementing by 8 instead of 4 for int when SimpleMemory is configured as SPM

2020-06-17 Thread Muhammad Aamir via gem5-users
Hi again everyone, It would be really nice if someone could assist me as I've tried almost everything and I cannot figure it out. Thanks ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org