[gem5-users] Re: How page table walk works in TimingSimpleCPU

I think the confusion comes from the fact that accesses in atomic mode return right away, where in timing mode they are split into a call which starts the transaction, and a callback with the results. In atomic mode, the same function can loop through all the lookups that might be necessary since

[gem5-users] Re: How to add a new pcie device on GEM5

thanks all，any more better examples are welcome！ 李翼超 charlie Mobile：+86-15858232899 Email：liyic...@huawei.com 发件人： Pouya Fotouhi via gem5-usersmailto:gem5-users@gem5.org>> 收件人： gem5 users mailing listmailto:gem5-users@gem5.org>>

[gem5-users] Re: How to add a new pcie device on GEM5

I second Gabe's suggestion. I think the IDE controller is a good starting point since it mostly models the controller and passes more complicated (device specific) functions to the disks. I mostly templated based on the IDE controller when we started adding a PCI interface for GPU (see WIP here:

[gem5-users] How page table walk works in TimingSimpleCPU

Hi all, I would like to know how page table walking actually works in x86 TimingSImpleCPU, which uses a timing access memory model. Previously, I tried to look at how the page table is walker for AtomicSimpleCPU which uses an atomic access memory model. In function

[gem5-users] Re: How to use the new libm5.a

Hi Wenqi. The updated libm5.a should be used in basically the same way as the old version. Just link against the library, include the header file, and call into the op you want using the normal function call syntax. Hoa, the documentation you've linked to is a little out of date. How can it be

[gem5-users] Re: How to add a new pcie device on GEM5

The VirtIO device would be a pretty good example, although it does some unusual things as far as determining how big it's BARs are supposed to be. The IDE controller is a pretty simple device that's a little more representative in that way. A lot of the complexity is in the actual disks

[gem5-users] Re: Cache-line contains both instructions and data?

Thanks everyone for all of your help. Yes, I do! Hopefully sometime in the near future you'll see an article involving it!  All my best, Derrick Greenspan MSCS From: Gambord, Ryan Sent: Monday, October 26, 2020 8:15 PM To: m...@cs.umass.edu Cc:

[gem5-users] Re: Cache-line contains both instructions and data?

Sounds like Derrick has a memory system simulator to patch up ;) I made a few typos transcribing the asm above, so I'll fix them below for anyone who finds this thread in the future and wants to repeat the steps. hello.asm SECTION .data str: db "Hello World!",10 len: equ $-str SECTION .text

[gem5-users] ruby_random_test.py to test MOESI_hammer, panic

Hello Everyone: I used ruby_random_test.py to test the MOESI_hammer protocol with multiple CPUs, but an error was reported, panic: Action/check failure: proc: 2 address: 0x3aec data: 0x5ee15b40 byte_number: 0 m_value+byte_number: 158 byte: 36 [15084, value: 158, status: Check_Pending,

[gem5-users] Re: Cache-line contains both instructions and data?

On 10/26/2020 10:12 AM, Derrick.Greenspan wrote: Well, the strange thing is that even if you do compile with -static, you still get the .rel.plt section and dynamic linking, apparently. The hello32 binary is a static binary according to file. Yes. it seems difficult to build a fully linked

[gem5-users] Re: Cache-line contains both instructions and data?

On 10/25/2020 10:19 PM, Derrick.Greenspan wrote: Thank you! I was under the impression that self-modifying code is rare. Here's a quick follow-up question: compiling with static apparently keeps the .rel.plt section (since the hello32 binary is static). Is it possible to compile in such a way

[gem5-users] Re: Cache-line contains both instructions and data?

Well, the strange thing is that even if you do compile with -static, you still get the .rel.plt section and dynamic linking, apparently. The hello32 binary is a static binary according to file. All the best, Derrick Greenspan MSCS From: Eliot Moss Sent:

[gem5-users] Re: --script parameter doesn't work

Hi Tracy, It seems like there is a problem in the m5 pseudo op which doesn’t get recognised by gem5. Could you open a JIRA ticket for this? https://gem5.atlassian.net/secure/BrowseProjects.jspa Feel free to assign it to me Kind Regards Giacomo From: Tracy Mac via gem5-users Sent: 25

[gem5-users] Re: Need help in building gem5

Hey Raghul, I sorry can't tell immediately from this information what's wrong with your process, but I'd advise trying the following steps: 1) Ensure HDF5 is set up correctly on your system. Perhaps you're using an old version? Try reinstalling it and see if that works. 2) If you haven't

[gem5-users] Re: Cache-line contains both instructions and data?

On 10/26/2020 8:04 AM, Gambord, Ryan wrote: I am not sure if it is possible to get gcc to compile hello.c without relocations. Why not just roll your own asm? hello.asm SECTION .data string: db "Hello World!",10 len: equ $-str SECTION .text global _start _start: mov ecx, str mov edx, len mov

[gem5-users] Re: Cache-line contains both instructions and data?

I am not sure if it is possible to get gcc to compile hello.c without relocations. Why not just roll your own asm? hello.asm SECTION .data string: db "Hello World!",10 len: equ $-str SECTION .text global _start _start: mov ecx, str mov edx, len mov ebx, 1 mov eax, 4 int 0x80 mov ebx, 0 mov eax,

[gem5-users] ??????Why does gem5 run parsec3.0 encounter deadlock error??

Last email was incomplete sorry for that.There is no --scripts option in the command line I gave, so we won't discuss it first. The key problem is that even if I do not modify the source code at all, I cannot run ARM+garnet2.0+FS. I want to know if such a deadlock problem is due to support

[gem5-users] Why does gem5 run parsec3.0 encounter deadlock error??

Hi all I run gem5 full system mode on a multi-core system, use AtomicCPU to establish a checkpoint, and then turn to O3CPU to start, and execute a command similar to the following: ./build/ARM_MOESI_hammer/gem5.opt -d fs_results/simple/begin configs/example/fs.py --ruby